Lines Matching full:1600
696 V4L2_INIT_BT_TIMINGS(1600, 900, 0, \
705 V4L2_INIT_BT_TIMINGS(1600, 1200, 0, \
713 V4L2_INIT_BT_TIMINGS(1600, 1200, 0, \
721 V4L2_INIT_BT_TIMINGS(1600, 1200, 0, \
729 V4L2_INIT_BT_TIMINGS(1600, 1200, 0, \
737 V4L2_INIT_BT_TIMINGS(1600, 1200, 0, \
745 V4L2_INIT_BT_TIMINGS(1600, 1200, 0, V4L2_DV_HSYNC_POS_POL, \
906 V4L2_INIT_BT_TIMINGS(2560, 1600, 0, V4L2_DV_HSYNC_POS_POL, \
914 V4L2_INIT_BT_TIMINGS(2560, 1600, 0, V4L2_DV_VSYNC_POS_POL, \
921 V4L2_INIT_BT_TIMINGS(2560, 1600, 0, V4L2_DV_VSYNC_POS_POL, \
928 V4L2_INIT_BT_TIMINGS(2560, 1600, 0, V4L2_DV_VSYNC_POS_POL, \
935 V4L2_INIT_BT_TIMINGS(2560, 1600, 0, V4L2_DV_HSYNC_POS_POL, \