Lines Matching +full:5 +full:mbps

23 #define MDIO_MMD_DTEXS		5	/* DTE Extender Sublayer */
37 #define MDIO_DEVS1		5	/* Devices in package */
50 #define MDIO_PMA_NG_EXTABLE	21	/* 2.5G/5G PMA/PMD extended ability */
121 /* 5 Gb/s */
144 #define MDIO_PMA_SPEED_5G		0x4000	/* 5G capable */
147 #define MDIO_PCS_SPEED_5G		0x0080	/* 5G capable */
182 #define MDIO_PMA_CTRL2_5GBT		0x0031  /* 5GBaseT type */
238 #define MDIO_PMA_EXTABLE_NBT		0x4000  /* 2.5/5GBASE-T ability */
242 #define MDIO_AN_C73_0_E_MASK		GENMASK(9, 5)
250 #define MDIO_AN_C73_1_1000BASE_KX	BIT(5)
304 #define MDIO_AN_10GBT_CTRL_ADV5G	0x0100	/* Advertise 5GBASE-T */
309 #define MDIO_AN_10GBT_STAT_LP5G		0x0040  /* LP is 5GBT capable */
425 #define MDIO_EEE_5GT		0x0002	/* 5GT EEE cap */
430 /* 2.5G/5G Extended abilities register. */
432 #define MDIO_PMA_NG_EXTABLE_5GBT	0x0002	/* 5GBASET ability */
464 	return MDIO_PHY_ID_C45 | (prtad << 5) | devad;  in mdio_phy_id_c45()
473 #define MDIO_USXGMII_10			0x0000	/* 10Mbps */
474 #define MDIO_USXGMII_10HALF		0x0000	/* 10Mbps half-duplex */
475 #define MDIO_USXGMII_10FULL		0x1000	/* 10Mbps full-duplex */
476 #define MDIO_USXGMII_100		0x0200	/* 100Mbps */
477 #define MDIO_USXGMII_100HALF		0x0200	/* 100Mbps half-duplex */
478 #define MDIO_USXGMII_100FULL		0x1200	/* 100Mbps full-duplex */
479 #define MDIO_USXGMII_1000		0x0400	/* 1000Mbps */
480 #define MDIO_USXGMII_1000HALF		0x0400	/* 1000Mbps half-duplex */
481 #define MDIO_USXGMII_1000FULL		0x1400	/* 1000Mbps full-duplex */
485 #define MDIO_USXGMII_2500		0x0800	/* 2500Mbps */
486 #define MDIO_USXGMII_2500HALF		0x0800	/* 2500Mbps half-duplex */
487 #define MDIO_USXGMII_2500FULL		0x1800	/* 2500Mbps full-duplex */
488 #define MDIO_USXGMII_5000		0x0a00	/* 5000Mbps */
489 #define MDIO_USXGMII_5000HALF		0x0a00	/* 5000Mbps half-duplex */
490 #define MDIO_USXGMII_5000FULL		0x1a00	/* 5000Mbps full-duplex */