Lines Matching +full:stream +full:- +full:id +full:- +full:range
1 /* SPDX-License-Identifier: MIT */
17 * subject to backwards-compatibility constraints.
28 * The diagram below represents a high-level simplification of a discrete
72 * - &DRM_IOCTL_XE_DEVICE_QUERY
73 * - &DRM_IOCTL_XE_GEM_CREATE
74 * - &DRM_IOCTL_XE_GEM_MMAP_OFFSET
75 * - &DRM_IOCTL_XE_VM_CREATE
76 * - &DRM_IOCTL_XE_VM_DESTROY
77 * - &DRM_IOCTL_XE_VM_BIND
78 * - &DRM_IOCTL_XE_EXEC_QUEUE_CREATE
79 * - &DRM_IOCTL_XE_EXEC_QUEUE_DESTROY
80 * - &DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY
81 * - &DRM_IOCTL_XE_EXEC
82 * - &DRM_IOCTL_XE_WAIT_USER_FENCE
83 * - &DRM_IOCTL_XE_OBSERVATION
89 * The device specific ioctl range is [DRM_COMMAND_BASE, DRM_COMMAND_END) ie
106 /* Must be kept compact -- no holes */
141 * .. code-block:: C
162 * struct drm_xe_user_extension - Base class for defining a chain of extensions
192 * struct drm_xe_ext_set_property - Generic set property extension
215 * struct drm_xe_engine_class_instance - instance of an engine class
222 * - %DRM_XE_ENGINE_CLASS_RENDER
223 * - %DRM_XE_ENGINE_CLASS_COPY
224 * - %DRM_XE_ENGINE_CLASS_VIDEO_DECODE
225 * - %DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE
226 * - %DRM_XE_ENGINE_CLASS_COMPUTE
227 * - %DRM_XE_ENGINE_CLASS_VM_BIND - Kernel only classes (not actual
238 /** @engine_class: engine class id */
240 /** @engine_instance: engine instance id */
242 /** @gt_id: Unique ID of this GT within the PCI Device */
249 * struct drm_xe_engine - describe hardware engine
260 * struct drm_xe_query_engines - describe engines
276 * enum drm_xe_memory_class - Supported memory classes.
290 * struct drm_xe_mem_region - Describes some region as known to
301 * @instance: The unique ID for this region, which serves as the
307 * @min_page_size: Min page-size in bytes for this region.
315 * address and range aligned to this value.
316 * Affected IOCTLS will return %-EINVAL if alignment restrictions are
366 * struct drm_xe_query_mem_regions - describe memory regions
382 * struct drm_xe_query_config - describe the device configuration
389 * - %DRM_XE_QUERY_CONFIG_REV_AND_DEVICE_ID - Device ID (lower 16 bits)
391 * - %DRM_XE_QUERY_CONFIG_FLAGS - Flags describing the device
394 * - %DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM - Flag is set if the device
396 * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment
398 * - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address
399 * - %DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY - Value of the highest
420 * struct drm_xe_gt - describe an individual GT.
428 * - %DRM_XE_QUERY_GT_TYPE_MAIN
429 * - %DRM_XE_QUERY_GT_TYPE_MEDIA
436 /** @tile_id: Tile ID where this GT lives (Information only) */
438 /** @gt_id: Unique ID of this GT within the PCI Device */
479 * struct drm_xe_query_gt_list - A list with GT description items.
495 * struct drm_xe_query_topology_mask - describe the topology mask of a GT
505 * - %DRM_XE_TOPO_DSS_GEOMETRY - To query the mask of Dual Sub Slices
510 * - %DRM_XE_TOPO_DSS_COMPUTE - To query the mask of Dual Sub Slices
515 * - %DRM_XE_TOPO_L3_BANK - To query the mask of enabled L3 banks. This type
518 * - %DRM_XE_TOPO_EU_PER_DSS - To query the mask of Execution Units (EU)
524 * - %DRM_XE_TOPO_SIMD16_EU_PER_DSS - To query the mask of SIMD16 Execution
532 /** @gt_id: GT ID the mask is associated with */
546 /** @mask: little-endian mask of @num_bytes */
551 * struct drm_xe_query_engine_cycles - correlate CPU and GPU timestamps
571 * @clockid: This is input by the user and is the reference clock id for
602 * struct drm_xe_query_uc_fw_version - query a micro-controller firmware version
605 * of the micro-controller firmware.
608 /** @uc_type: The micro-controller type to query firmware version */
633 * struct drm_xe_device_query - Input of &DRM_IOCTL_XE_DEVICE_QUERY - main
641 * - %DRM_XE_DEVICE_QUERY_ENGINES
642 * - %DRM_XE_DEVICE_QUERY_MEM_REGIONS
643 * - %DRM_XE_DEVICE_QUERY_CONFIG
644 * - %DRM_XE_DEVICE_QUERY_GT_LIST
645 * - %DRM_XE_DEVICE_QUERY_HWCONFIG - Query type to retrieve the hardware
649 * - %DRM_XE_DEVICE_QUERY_GT_TOPOLOGY
650 * - %DRM_XE_DEVICE_QUERY_ENGINE_CYCLES
656 * IOCTL call returns -EINVAL.
661 * .. code-block:: C
674 * for (int i = 0; i < engines->num_engines; i++) {
676 * engines->engines[i].instance.engine_class ==
678 * engines->engines[i].instance.engine_class ==
680 * engines->engines[i].instance.engine_class ==
682 * engines->engines[i].instance.engine_class ==
684 * engines->engines[i].instance.engine_class ==
717 * struct drm_xe_gem_create - Input of &DRM_IOCTL_XE_GEM_CREATE - A structure for
721 * - %DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING
722 * - %DRM_XE_GEM_CREATE_FLAG_SCANOUT
723 * - %DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM - When using VRAM as a
726 * for small-bar systems (on full-bar systems this gets turned into a
733 * Note2: For clear-color CCS surfaces the kernel needs to read the
734 * clear-color value stored in the buffer, and on discrete platforms we
737 * small-bar systems.
740 * - %DRM_XE_GEM_CPU_CACHING_WB - Allocate the pages with write-back
743 * - %DRM_XE_GEM_CPU_CACHING_WC - Allocate the pages as write-combined. This
800 * between GPU- and CPU is guaranteed. The caching mode of
801 * existing CPU-mappings will be updated transparently to
802 * user-space clients.
813 * struct drm_xe_gem_mmap_offset - Input of &DRM_IOCTL_XE_GEM_MMAP_OFFSET
833 * struct drm_xe_vm_create - Input of &DRM_IOCTL_XE_VM_CREATE
836 * - %DRM_XE_VM_CREATE_FLAG_SCRATCH_PAGE
837 * - %DRM_XE_VM_CREATE_FLAG_LR_MODE - An LR, or Long Running VM accepts
842 * used as out-syncobjs, that is, together with DRM_XE_SYNC_FLAG_SIGNAL.
843 * LR VMs can be created in recoverable page-fault mode using
846 * different per-VM overcommit semantics that are enabled by
849 * - %DRM_XE_VM_CREATE_FLAG_FAULT_MODE - Requires also
851 * demand when accessed, and also allows per-VM overcommit of memory.
865 /** @vm_id: Returned VM ID */
873 * struct drm_xe_vm_destroy - Input of &DRM_IOCTL_XE_VM_DESTROY
876 /** @vm_id: VM ID */
887 * struct drm_xe_vm_bind_op - run bind operations
890 * - %DRM_XE_VM_BIND_OP_MAP
891 * - %DRM_XE_VM_BIND_OP_UNMAP
892 * - %DRM_XE_VM_BIND_OP_MAP_USERPTR
893 * - %DRM_XE_VM_BIND_OP_UNMAP_ALL
894 * - %DRM_XE_VM_BIND_OP_PREFETCH
897 * - %DRM_XE_VM_BIND_FLAG_READONLY - Setup the page tables as read-only
899 * - %DRM_XE_VM_BIND_FLAG_IMMEDIATE - On a faulting VM, do the
901 * fault handler. This is implied on a non-faulting VM as there is no
903 * - %DRM_XE_VM_BIND_FLAG_NULL - When the NULL flag is set, the page
930 * there is a mismatch (see note below for pre-MTL platforms).
932 * Note: On pre-MTL platforms there is only a caching mode and no
934 * shared-LLC (or is dgpu) so all GT memory accesses are coherent with
939 * levels into the following coherency buckets on all pre-MTL platforms:
941 * ppGTT UC -> COH_NONE
942 * ppGTT WC -> COH_NONE
943 * ppGTT WT -> COH_NONE
944 * ppGTT WB -> COH_AT_LEAST_1WAY
947 * such platforms (or perhaps in general for dma-buf if shared with
950 * have a shared-LLC. On MTL+ this completely changes and the HW
954 * Note: For userptr and externally imported dma-buf the kernel expects
980 * @range: Number of bytes from the object to bind to addr, MBZ for UNMAP_ALL
982 __u64 range; member
1017 * struct drm_xe_vm_bind - Input of &DRM_IOCTL_XE_VM_BIND
1024 * .. code-block:: C
1032 * .bind.range = BO_SIZE,
1047 /** @vm_id: The ID of the VM to bind to */
1088 * struct drm_xe_exec_queue_create - Input of &DRM_IOCTL_XE_EXEC_QUEUE_CREATE
1094 * .. code-block:: C
1129 /** @exec_queue_id: Returned exec queue ID */
1133 * @instances: user pointer to a 2-d array of struct
1146 * struct drm_xe_exec_queue_destroy - Input of &DRM_IOCTL_XE_EXEC_QUEUE_DESTROY
1149 /** @exec_queue_id: Exec queue ID */
1160 * struct drm_xe_exec_queue_get_property - Input of &DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY
1163 * - %DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN
1169 /** @exec_queue_id: Exec queue ID */
1184 * struct drm_xe_sync - sync object
1187 * - %DRM_XE_SYNC_TYPE_SYNCOBJ
1188 * - %DRM_XE_SYNC_TYPE_TIMELINE_SYNCOBJ
1189 * - %DRM_XE_SYNC_TYPE_USER_FENCE
1192 * - %DRM_XE_SYNC_FLAG_SIGNAL
1196 * .. code-block:: C
1258 * struct drm_xe_exec - Input of &DRM_IOCTL_XE_EXEC
1265 * .. code-block:: C
1281 /** @exec_queue_id: Exec queue ID for the batch buffer */
1310 * struct drm_xe_wait_user_fence - Input of &DRM_IOCTL_XE_WAIT_USER_FENCE
1312 * Wait on user fence, XE will wake-up on every HW engine interrupt in the
1320 * - %DRM_XE_UFENCE_WAIT_OP_EQ
1321 * - %DRM_XE_UFENCE_WAIT_OP_NEQ
1322 * - %DRM_XE_UFENCE_WAIT_OP_GT
1323 * - %DRM_XE_UFENCE_WAIT_OP_GTE
1324 * - %DRM_XE_UFENCE_WAIT_OP_LT
1325 * - %DRM_XE_UFENCE_WAIT_OP_LTE
1328 * - %DRM_XE_UFENCE_WAIT_FLAG_ABSTIME
1329 * - %DRM_XE_UFENCE_WAIT_FLAG_SOFT_OP
1332 * - 0xffu for u8
1333 * - 0xffffu for u16
1334 * - 0xffffffffu for u32
1335 * - 0xffffffffffffffffu for u64
1395 * enum drm_xe_observation_type - Observation stream types
1398 /** @DRM_XE_OBSERVATION_TYPE_OA: OA observation stream type */
1403 * enum drm_xe_observation_op - Observation stream ops
1406 /** @DRM_XE_OBSERVATION_OP_STREAM_OPEN: Open an observation stream */
1409 /** @DRM_XE_OBSERVATION_OP_ADD_CONFIG: Add observation stream config */
1412 /** @DRM_XE_OBSERVATION_OP_REMOVE_CONFIG: Remove observation stream config */
1417 * struct drm_xe_observation_param - Input of &DRM_XE_OBSERVATION
1420 * multiple types. The actual params for a particular stream operation are
1427 /** @observation_type: observation stream type, of enum @drm_xe_observation_type */
1429 /** @observation_op: observation stream op, of enum @drm_xe_observation_op */
1431 /** @param: Pointer to actual stream params */
1436 * enum drm_xe_observation_ioctls - Observation stream fd ioctl's
1439 * ioctl's is stream type specific
1442 /** @DRM_XE_OBSERVATION_IOCTL_ENABLE: Enable data capture for an observation stream */
1445 /** @DRM_XE_OBSERVATION_IOCTL_DISABLE: Disable data capture for a observation stream */
1448 /** @DRM_XE_OBSERVATION_IOCTL_CONFIG: Change observation stream configuration */
1451 /** @DRM_XE_OBSERVATION_IOCTL_STATUS: Return observation stream status */
1454 /** @DRM_XE_OBSERVATION_IOCTL_INFO: Return observation stream info */
1459 * enum drm_xe_oa_unit_type - OA unit types
1464 * sub-types of OAG. For OAR/OAC, use OAG.
1473 * struct drm_xe_oa_unit - describe OA unit
1479 /** @oa_unit_id: OA unit ID */
1485 /** @capabilities: OA capabilities bit-mask */
1506 * struct drm_xe_query_oa_units - describe OA units
1515 * .. code-block:: C
1522 * poau = (u8 *)&qoa->oa_units[0];
1523 * for (int i = 0; i < qoa->num_oa_units; i++) {
1526 * poau += sizeof(*oau) + oau->num_engines * sizeof(oau->eci[0]);
1545 * enum drm_xe_oa_format_type - OA format types as specified in PRM/Bspec
1564 * enum drm_xe_oa_property_id - OA stream property id's
1566 * Stream params are specified as a chain of @drm_xe_ext_set_property
1572 * Exactly the same mechanism is also used for stream reconfiguration using the
1573 * @DRM_XE_OBSERVATION_IOCTL_CONFIG observation stream fd ioctl, though only a
1574 * subset of properties below can be specified for stream reconfiguration.
1579 * @DRM_XE_OA_PROPERTY_OA_UNIT_ID: ID of the OA unit on which to open
1580 * the OA stream, see @oa_unit_id in 'struct
1587 * OA unit reports or stream samples in a global buffer attached to an
1619 * stream in a DISABLED state (see @DRM_XE_OBSERVATION_IOCTL_ENABLE).
1624 * @DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID: Open the stream for a specific
1637 * to be disabled for the stream exec queue.
1673 * struct drm_xe_oa_config - OA metric configuration
1676 * particular config can be specified when opening an OA stream using
1683 /** @uuid: String formatted like "%\08x-%\04x-%\04x-%\04x-%\012x" */
1697 * struct drm_xe_oa_stream_status - OA stream status returned from
1698 * @DRM_XE_OBSERVATION_IOCTL_STATUS observation stream fd ioctl. Userspace can
1699 * call the ioctl to query stream status in response to EIO errno from
1706 /** @oa_status: OA stream status (see Bspec 46717/61226) */
1718 * struct drm_xe_oa_stream_info - OA stream info returned from
1719 * @DRM_XE_OBSERVATION_IOCTL_INFO observation stream fd ioctl