Lines Matching +full:9 +full:- +full:bit
1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
13 #define QSYS_PORT_MODE_DEQUEUE_DIS BIT(1)
14 #define QSYS_PORT_MODE_DEQUEUE_LATE BIT(0)
16 #define QSYS_STAT_CNT_CFG_TX_GREEN_CNT_MODE BIT(5)
17 #define QSYS_STAT_CNT_CFG_TX_YELLOW_CNT_MODE BIT(4)
18 #define QSYS_STAT_CNT_CFG_DROP_GREEN_CNT_MODE BIT(3)
19 #define QSYS_STAT_CNT_CFG_DROP_YELLOW_CNT_MODE BIT(2)
20 #define QSYS_STAT_CNT_CFG_DROP_COUNT_ONCE BIT(1)
21 #define QSYS_STAT_CNT_CFG_DROP_COUNT_EGRESS BIT(0)
54 #define QSYS_TFRM_MISC_TIMED_CANCEL_SLOT(x) (((x) << 9) & GENMASK(18, 9))
55 #define QSYS_TFRM_MISC_TIMED_CANCEL_SLOT_M GENMASK(18, 9)
56 #define QSYS_TFRM_MISC_TIMED_CANCEL_SLOT_X(x) (((x) & GENMASK(18, 9)) >> 9)
57 #define QSYS_TFRM_MISC_TIMED_CANCEL_1SHOT BIT(8)
58 #define QSYS_TFRM_MISC_TIMED_SLOT_MODE_MC BIT(7)
103 #define QSYS_PREEMPTION_CFG_MM_ADD_FRAG_SIZE(x) (((x) << 8) & GENMASK(9, 8))
104 #define QSYS_PREEMPTION_CFG_MM_ADD_FRAG_SIZE_M GENMASK(9, 8)
105 #define QSYS_PREEMPTION_CFG_MM_ADD_FRAG_SIZE_X(x) (((x) & GENMASK(9, 8)) >> 8)
129 #define QSYS_EIR_CFG_EIR_MARK_ENA BIT(0)
133 #define QSYS_SE_CFG_SE_DWRR_CNT(x) (((x) << 6) & GENMASK(9, 6))
134 #define QSYS_SE_CFG_SE_DWRR_CNT_M GENMASK(9, 6)
135 #define QSYS_SE_CFG_SE_DWRR_CNT_X(x) (((x) & GENMASK(9, 6)) >> 6)
136 #define QSYS_SE_CFG_SE_RR_ENA BIT(5)
137 #define QSYS_SE_CFG_SE_AVB_ENA BIT(4)
141 #define QSYS_SE_CFG_SE_EXC_ENA BIT(1)
142 #define QSYS_SE_CFG_SE_EXC_FWD BIT(0)
152 #define QSYS_SE_CONNECT_SE_INP_IDX(x) (((x) << 9) & GENMASK(16, 9))
153 #define QSYS_SE_CONNECT_SE_INP_IDX_M GENMASK(16, 9)
154 #define QSYS_SE_CONNECT_SE_INP_IDX_X(x) (((x) & GENMASK(16, 9)) >> 9)
161 #define QSYS_SE_CONNECT_SE_TERMINAL BIT(0)
174 #define QSYS_SE_DLB_SENSE_SE_DLB_PRIO_ENA BIT(2)
175 #define QSYS_SE_DLB_SENSE_SE_DLB_SPORT_ENA BIT(1)
176 #define QSYS_SE_DLB_SENSE_SE_DLB_DPORT_ENA BIT(0)
193 #define QSYS_SE_STATE_SE_WAS_YEL BIT(0)
195 #define QSYS_HSCH_MISC_CFG_SE_CONNECT_VLD BIT(8)
199 #define QSYS_HSCH_MISC_CFG_LEAK_DIS BIT(2)
200 #define QSYS_HSCH_MISC_CFG_QSHP_EXC_ENA BIT(1)
201 #define QSYS_HSCH_MISC_CFG_PFC_BYP_UPD BIT(0)
205 #define QSYS_TAG_CONFIG_ENABLE BIT(0)
218 #define QSYS_TAS_PARAM_CFG_CTRL_ALWAYS_GUARD_BAND_SCH_Q BIT(8)
219 #define QSYS_TAS_PARAM_CFG_CTRL_CONFIG_CHANGE BIT(16)
246 #define QSYS_PARAM_STATUS_REG_8_CONFIG_PENDING BIT(24)