Lines Matching +full:pcm +full:- +full:clock +full:- +full:mode
1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
43 #define SDW_SHIM_SYNC_SYNCPRD_VAL_24 (24000 / SDW_CADENCE_GSYNC_KHZ - 1)
44 #define SDW_SHIM_SYNC_SYNCPRD_VAL_24_576 (24576 / SDW_CADENCE_GSYNC_KHZ - 1)
45 #define SDW_SHIM_SYNC_SYNCPRD_VAL_38_4 (38400 / SDW_CADENCE_GSYNC_KHZ - 1)
46 #define SDW_SHIM_SYNC_SYNCPRD_VAL_96 (96000 / SDW_CADENCE_GSYNC_KHZ - 1)
60 /* PCM Stream capabilities */
67 /* PCM Stream Channel Map */
70 /* PCM Stream Channel Count */
117 * ACE2.x definitions for SHIM registers - only accessible when the
126 /* Read-only capabilities */
128 #define SDW_SHIM2_LECAP_HDS BIT(0) /* unset -> Host mode */
131 /* PCM Stream capabilities */
133 #define SDW_SHIM2_PCMSCAP_ISS GENMASK(3, 0) /* Input-only streams */
134 #define SDW_SHIM2_PCMSCAP_OSS GENMASK(7, 4) /* Output-only streams */
137 /* Read-only PCM Stream Channel Count, y variable is stream */
141 /* PCM Stream Channel Map */
148 /* SHIM2 vendor-specific registers */
229 * struct sdw_intel_acpi_info - Soundwire Intel information found in ACPI tables
231 * @count: link count found with "sdw-master-count" or "sdw-manager-list" property
232 * @link_mask: bit-wise mask listing links enabled by BIOS menu
246 /* Intel clock-stop/pm_runtime quirk definitions */
249 * Force the clock to remain on during pm_runtime suspend. This might
250 * be needed if Slave devices do not have an alternate clock source or
257 * reset and re-enumeration will be performed when the bus
258 * restarts. This mode shall not be used if Slave devices can generate
259 * in-band wakes.
265 * (e.g. speaker amplifiers). The clock-stop mode is typically
266 * slightly higher power than when the IP is completely powered-off.
271 * Require a bus reset (and complete re-enumeration) when exiting
272 * clock stop modes. This may be needed if the controller power was
283 * struct sdw_intel_ctx - context allocated by the controller
288 * @link_mask: bit-wise mask listing SoundWire links reported by the
291 * @ldev: information for each link (controller-specific and kept
315 * struct sdw_intel_res - Soundwire Intel global resource structure,
326 * @link_mask: bit-wise mask listing links selected by the DSP driver
328 * machine-specific quirks are handled in the DSP driver.
335 * @eml_lock: mutex protecting shared registers in the HDaudio multi-link
365 * on e.g. which machine driver to select (I2S mode, HDaudio or
386 /* struct intel_sdw_hw_ops - SoundWire ops for Intel platforms.
391 * @check_clock_stop: throw error message if clock is not stopped.
394 * @start_bus_after_clock_stop: start after mode0 clock stop
396 * @link_power_up: power-up using chip-specific helpers
397 * @link_power_down: power-down with chip-specific helpers
399 * @shim_wake: enable/disable in-band wake management
402 * @sync_arm: helper for multi-link synchronization
403 * @sync_go_unlocked: helper for multi-link synchronization -
405 * @sync_go: helper for multi-link synchronization
406 * @sync_check_cmdsync_unlocked: helper for multi-link synchronization
407 * and bank switch - shim_lock is assumed to be locked at higher level
446 * and 6 system-unique Device Numbers for wake-capable devices.