Lines Matching +full:rx +full:- +full:crci

1 /* SPDX-License-Identifier: GPL-2.0 */
196 #define dev_cmd_reg_addr(nandc, reg) ((nandc)->props->dev_cmd_reg_start + (reg))
199 #define nandc_reg_phys(chip, offset) ((chip)->base_phys + (offset))
203 	((chip)->reg_read_dma + \
204 	((u8 *)(vaddr) - (u8 *)(chip)->reg_read_buf))
233  * @bam_ce - the array of BAM command elements
234  * @cmd_sgl - sgl for NAND BAM command pipe
235  * @data_sgl - sgl for NAND BAM consumer/producer pipe
236  * @last_data_desc - last DMA desc in data channel (tx/rx).
237  * @last_cmd_desc - last DMA desc in command channel.
238  * @txn_done - completion for NAND transfer.
239  * @bam_ce_pos - the index in bam_ce which is available for next sgl
240  * @bam_ce_start - the index in bam_ce which marks the start position ce
243  * @cmd_sgl_pos - current index in command sgl.
244  * @cmd_sgl_start - start index in command sgl.
245  * @tx_sgl_pos - current index in data sgl for tx.
246  * @tx_sgl_start - start index in data sgl for tx.
247  * @rx_sgl_pos - current index in data sgl for rx.
248  * @rx_sgl_start - start index in data sgl for rx.
272  * @dma_desc - low level DMA engine descriptor
273  * @list - list for desc_info
275  * @adm_sgl - sgl which will be used for single sgl dma descriptor. Only used by
277  * @bam_sgl - sgl which will be used for dma descriptor. Only used by BAM
278  * @sgl_cnt - number of SGL in bam_sgl. Only used by BAM
279  * @dir - DMA transfer direction
355  * @cmd_crci:			ADM DMA CRCI for command flow control
356  * @data_crci:			ADM DMA CRCI for data flow control
369  * @buf_size/count/start:	markers for chip->legacy.read_buf/write_buf
436  * @ecc_modes - ecc mode for NAND
437  * @dev_cmd_reg_start - NAND_DEV_CMD_* registers starting offset
438  * @supports_bam - whether NAND controller is using BAM
439  * @nandc_part_of_qpic - whether NAND controller is part of qpic IP
440  * @qpic_version2 - flag to indicate QPIC IP version 2
441  * @use_codeword_fixup - whether NAND has different layout for boot partitions