Lines Matching +full:5 +full:- +full:7
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2015-2017 Dialog Semiconductor
159 #define DA9062AA_REVERT_SHIFT 7
160 #define DA9062AA_REVERT_MASK BIT(7)
201 #define DA9062AA_KEY_RESET_SHIFT 5
202 #define DA9062AA_KEY_RESET_MASK BIT(5)
205 #define DA9062AA_WAIT_SHUT_SHIFT 7
206 #define DA9062AA_WAIT_SHUT_MASK BIT(7)
219 #define DA9062AA_EVENTS_B_SHIFT 5
220 #define DA9062AA_EVENTS_B_MASK BIT(5)
229 #define DA9062AA_E_DVC_RDY_SHIFT 5
230 #define DA9062AA_E_DVC_RDY_MASK BIT(5)
231 #define DA9062AA_E_VDD_WARN_SHIFT 7
232 #define DA9062AA_E_VDD_WARN_MASK BIT(7)
263 #define DA9062AA_M_DVC_RDY_SHIFT 5
264 #define DA9062AA_M_DVC_RDY_MASK BIT(5)
265 #define DA9062AA_M_VDD_WARN_SHIFT 7
266 #define DA9062AA_M_VDD_WARN_MASK BIT(7)
291 #define DA9062AA_M_POWER_EN_SHIFT 5
292 #define DA9062AA_M_POWER_EN_MASK BIT(5)
305 #define DA9062AA_NFREEZE_SHIFT 5
306 #define DA9062AA_NFREEZE_MASK (0x03 << 5)
307 #define DA9062AA_BUCK_SLOWSTART_SHIFT 7
308 #define DA9062AA_BUCK_SLOWSTART_MASK BIT(7)
317 #define DA9062AA_SLEW_RATE_SHIFT 5
318 #define DA9062AA_SLEW_RATE_MASK (0x03 << 5)
319 #define DA9062AA_DEF_SUPPLY_SHIFT 7
320 #define DA9062AA_DEF_SUPPLY_MASK BIT(7)
333 #define DA9062AA_V_LOCK_SHIFT 7
334 #define DA9062AA_V_LOCK_MASK BIT(7)
351 #define DA9062AA_BBAT_DIS_SHIFT 5
352 #define DA9062AA_BBAT_DIS_MASK BIT(5)
355 #define DA9062AA_PMCONT_DIS_SHIFT 7
356 #define DA9062AA_PMCONT_DIS_MASK BIT(7)
369 #define DA9062AA_GPIO1_WEN_SHIFT 7
370 #define DA9062AA_GPIO1_WEN_MASK BIT(7)
383 #define DA9062AA_GPIO3_WEN_SHIFT 7
384 #define DA9062AA_GPIO3_WEN_MASK BIT(7)
439 #define DA9062AA_VBUCK2_GPI_SHIFT 5
440 #define DA9062AA_VBUCK2_GPI_MASK (0x03 << 5)
449 #define DA9062AA_VBUCK1_GPI_SHIFT 5
450 #define DA9062AA_VBUCK1_GPI_MASK (0x03 << 5)
459 #define DA9062AA_VBUCK4_GPI_SHIFT 5
460 #define DA9062AA_VBUCK4_GPI_MASK (0x03 << 5)
469 #define DA9062AA_VBUCK3_GPI_SHIFT 5
470 #define DA9062AA_VBUCK3_GPI_MASK (0x03 << 5)
479 #define DA9062AA_VLDO1_GPI_SHIFT 5
480 #define DA9062AA_VLDO1_GPI_MASK (0x03 << 5)
481 #define DA9062AA_LDO1_CONF_SHIFT 7
482 #define DA9062AA_LDO1_CONF_MASK BIT(7)
491 #define DA9062AA_VLDO2_GPI_SHIFT 5
492 #define DA9062AA_VLDO2_GPI_MASK (0x03 << 5)
493 #define DA9062AA_LDO2_CONF_SHIFT 7
494 #define DA9062AA_LDO2_CONF_MASK BIT(7)
503 #define DA9062AA_VLDO3_GPI_SHIFT 5
504 #define DA9062AA_VLDO3_GPI_MASK (0x03 << 5)
505 #define DA9062AA_LDO3_CONF_SHIFT 7
506 #define DA9062AA_LDO3_CONF_MASK BIT(7)
515 #define DA9062AA_VLDO4_GPI_SHIFT 5
516 #define DA9062AA_VLDO4_GPI_MASK (0x03 << 5)
517 #define DA9062AA_LDO4_CONF_SHIFT 7
518 #define DA9062AA_LDO4_CONF_MASK BIT(7)
531 #define DA9062AA_VLDO2_SEL_SHIFT 5
532 #define DA9062AA_VLDO2_SEL_MASK BIT(5)
535 #define DA9062AA_VLDO4_SEL_SHIFT 7
536 #define DA9062AA_VLDO4_SEL_MASK BIT(7)
541 #define DA9062AA_RTC_READ_SHIFT 7
542 #define DA9062AA_RTC_READ_MASK BIT(7)
589 #define DA9062AA_TICK_WAKE_SHIFT 5
590 #define DA9062AA_TICK_WAKE_MASK BIT(5)
597 #define DA9062AA_TICK_ON_SHIFT 7
598 #define DA9062AA_TICK_ON_MASK BIT(7)
709 #define DA9062AA_TIME_OUT_SHIFT 5
710 #define DA9062AA_TIME_OUT_MASK BIT(5)
721 #define DA9062AA_OUT_CLOCK_SHIFT 5
722 #define DA9062AA_OUT_CLOCK_MASK BIT(5)
725 #define DA9062AA_EN_32KOUT_SHIFT 7
726 #define DA9062AA_EN_32KOUT_MASK BIT(7)
749 #define DA9062AA_BUCK2_PD_DIS_SHIFT 5
750 #define DA9062AA_BUCK2_PD_DIS_MASK BIT(5)
755 #define DA9062AA_BUCK1_PD_DIS_SHIFT 5
756 #define DA9062AA_BUCK1_PD_DIS_MASK BIT(5)
765 #define DA9062AA_BUCK4_PD_DIS_SHIFT 5
766 #define DA9062AA_BUCK4_PD_DIS_MASK BIT(5)
771 #define DA9062AA_BUCK3_PD_DIS_SHIFT 5
772 #define DA9062AA_BUCK3_PD_DIS_MASK BIT(5)
779 #define DA9062AA_BUCK2_SL_A_SHIFT 7
780 #define DA9062AA_BUCK2_SL_A_MASK BIT(7)
785 #define DA9062AA_BUCK1_SL_A_SHIFT 7
786 #define DA9062AA_BUCK1_SL_A_MASK BIT(7)
791 #define DA9062AA_BUCK4_SL_A_SHIFT 7
792 #define DA9062AA_BUCK4_SL_A_MASK BIT(7)
797 #define DA9062AA_BUCK3_SL_A_SHIFT 7
798 #define DA9062AA_BUCK3_SL_A_MASK BIT(7)
800 /* DA9062AA_VLDO[1-4]_A common */
806 #define DA9062AA_LDO1_SL_A_SHIFT 7
807 #define DA9062AA_LDO1_SL_A_MASK BIT(7)
812 #define DA9062AA_LDO2_SL_A_SHIFT 7
813 #define DA9062AA_LDO2_SL_A_MASK BIT(7)
818 #define DA9062AA_LDO3_SL_A_SHIFT 7
819 #define DA9062AA_LDO3_SL_A_MASK BIT(7)
824 #define DA9062AA_LDO4_SL_A_SHIFT 7
825 #define DA9062AA_LDO4_SL_A_MASK BIT(7)
830 #define DA9062AA_BUCK2_SL_B_SHIFT 7
831 #define DA9062AA_BUCK2_SL_B_MASK BIT(7)
836 #define DA9062AA_BUCK1_SL_B_SHIFT 7
837 #define DA9062AA_BUCK1_SL_B_MASK BIT(7)
842 #define DA9062AA_BUCK4_SL_B_SHIFT 7
843 #define DA9062AA_BUCK4_SL_B_MASK BIT(7)
848 #define DA9062AA_BUCK3_SL_B_SHIFT 7
849 #define DA9062AA_BUCK3_SL_B_MASK BIT(7)
854 #define DA9062AA_LDO1_SL_B_SHIFT 7
855 #define DA9062AA_LDO1_SL_B_MASK BIT(7)
860 #define DA9062AA_LDO2_SL_B_SHIFT 7
861 #define DA9062AA_LDO2_SL_B_MASK BIT(7)
866 #define DA9062AA_LDO3_SL_B_SHIFT 7
867 #define DA9062AA_LDO3_SL_B_MASK BIT(7)
872 #define DA9062AA_LDO4_SL_B_SHIFT 7
873 #define DA9062AA_LDO4_SL_B_MASK BIT(7)
894 #define DA9062AA_PM_IF_FMP_SHIFT 5
895 #define DA9062AA_PM_IF_FMP_MASK BIT(5)
922 #define DA9062AA_FORCE_RESET_SHIFT 5
923 #define DA9062AA_FORCE_RESET_MASK BIT(5)
948 #define DA9062AA_BUCK2_OD_SHIFT 5
949 #define DA9062AA_BUCK2_OD_MASK BIT(5)
962 #define DA9062AA_HOST_SD_MODE_SHIFT 5
963 #define DA9062AA_HOST_SD_MODE_MASK BIT(5)
966 #define DA9062AA_LDO_SD_SHIFT 7
967 #define DA9062AA_LDO_SD_MASK BIT(7)
978 #define DA9062AA_IF_RESET_SHIFT 7
979 #define DA9062AA_IF_RESET_MASK BIT(7)