Lines Matching +full:4 +full:- +full:7
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2015-2017 Dialog Semiconductor
159 #define DA9062AA_REVERT_SHIFT 7
160 #define DA9062AA_REVERT_MASK BIT(7)
177 #define DA9062AA_GPI4_SHIFT 4
178 #define DA9062AA_GPI4_MASK BIT(4)
199 #define DA9062AA_TEMP_CRIT_SHIFT 4
200 #define DA9062AA_TEMP_CRIT_MASK BIT(4)
205 #define DA9062AA_WAIT_SHUT_SHIFT 7
206 #define DA9062AA_WAIT_SHUT_MASK BIT(7)
217 #define DA9062AA_E_SEQ_RDY_SHIFT 4
218 #define DA9062AA_E_SEQ_RDY_MASK BIT(4)
231 #define DA9062AA_E_VDD_WARN_SHIFT 7
232 #define DA9062AA_E_VDD_WARN_MASK BIT(7)
243 #define DA9062AA_E_GPI4_SHIFT 4
244 #define DA9062AA_E_GPI4_MASK BIT(4)
255 #define DA9062AA_M_SEQ_RDY_SHIFT 4
256 #define DA9062AA_M_SEQ_RDY_MASK BIT(4)
265 #define DA9062AA_M_VDD_WARN_SHIFT 7
266 #define DA9062AA_M_VDD_WARN_MASK BIT(7)
277 #define DA9062AA_M_GPI4_SHIFT 4
278 #define DA9062AA_M_GPI4_MASK BIT(4)
289 #define DA9062AA_M_SYSTEM_EN_SHIFT 4
290 #define DA9062AA_M_SYSTEM_EN_MASK BIT(4)
303 #define DA9062AA_NONKEY_LOCK_SHIFT 4
304 #define DA9062AA_NONKEY_LOCK_MASK BIT(4)
307 #define DA9062AA_BUCK_SLOWSTART_SHIFT 7
308 #define DA9062AA_BUCK_SLOWSTART_MASK BIT(7)
315 #define DA9062AA_OTPREAD_EN_SHIFT 4
316 #define DA9062AA_OTPREAD_EN_MASK BIT(4)
319 #define DA9062AA_DEF_SUPPLY_SHIFT 7
320 #define DA9062AA_DEF_SUPPLY_MASK BIT(7)
333 #define DA9062AA_V_LOCK_SHIFT 7
334 #define DA9062AA_V_LOCK_MASK BIT(7)
349 #define DA9062AA_CLDR_PAUSE_SHIFT 4
350 #define DA9062AA_CLDR_PAUSE_MASK BIT(4)
355 #define DA9062AA_PMCONT_DIS_SHIFT 7
356 #define DA9062AA_PMCONT_DIS_MASK BIT(7)
365 #define DA9062AA_GPIO1_PIN_SHIFT 4
366 #define DA9062AA_GPIO1_PIN_MASK (0x03 << 4)
369 #define DA9062AA_GPIO1_WEN_SHIFT 7
370 #define DA9062AA_GPIO1_WEN_MASK BIT(7)
379 #define DA9062AA_GPIO3_PIN_SHIFT 4
380 #define DA9062AA_GPIO3_PIN_MASK (0x03 << 4)
383 #define DA9062AA_GPIO3_WEN_SHIFT 7
384 #define DA9062AA_GPIO3_WEN_MASK BIT(7)
403 #define DA9062AA_GPIO4_WKUP_MODE_SHIFT 4
404 #define DA9062AA_GPIO4_WKUP_MODE_MASK BIT(4)
415 #define DA9062AA_GPIO4_MODE_SHIFT 4
416 #define DA9062AA_GPIO4_MODE_MASK BIT(4)
481 #define DA9062AA_LDO1_CONF_SHIFT 7
482 #define DA9062AA_LDO1_CONF_MASK BIT(7)
493 #define DA9062AA_LDO2_CONF_SHIFT 7
494 #define DA9062AA_LDO2_CONF_MASK BIT(7)
505 #define DA9062AA_LDO3_CONF_SHIFT 7
506 #define DA9062AA_LDO3_CONF_MASK BIT(7)
517 #define DA9062AA_LDO4_CONF_SHIFT 7
518 #define DA9062AA_LDO4_CONF_MASK BIT(7)
529 #define DA9062AA_VLDO1_SEL_SHIFT 4
530 #define DA9062AA_VLDO1_SEL_MASK BIT(4)
535 #define DA9062AA_VLDO4_SEL_SHIFT 7
536 #define DA9062AA_VLDO4_SEL_MASK BIT(7)
541 #define DA9062AA_RTC_READ_SHIFT 7
542 #define DA9062AA_RTC_READ_MASK BIT(7)
587 #define DA9062AA_TICK_TYPE_SHIFT 4
588 #define DA9062AA_TICK_TYPE_MASK BIT(4)
597 #define DA9062AA_TICK_ON_SHIFT 7
598 #define DA9062AA_TICK_ON_MASK BIT(7)
619 #define DA9062AA_NXT_SEQ_START_SHIFT 4
620 #define DA9062AA_NXT_SEQ_START_MASK (0x0f << 4)
625 #define DA9062AA_SEQ_DUMMY_SHIFT 4
626 #define DA9062AA_SEQ_DUMMY_MASK (0x0f << 4)
631 #define DA9062AA_LDO2_STEP_SHIFT 4
632 #define DA9062AA_LDO2_STEP_MASK (0x0f << 4)
637 #define DA9062AA_LDO4_STEP_SHIFT 4
638 #define DA9062AA_LDO4_STEP_MASK (0x0f << 4)
641 #define DA9062AA_PD_DIS_STEP_SHIFT 4
642 #define DA9062AA_PD_DIS_STEP_MASK (0x0f << 4)
647 #define DA9062AA_BUCK2_STEP_SHIFT 4
648 #define DA9062AA_BUCK2_STEP_MASK (0x0f << 4)
653 #define DA9062AA_BUCK3_STEP_SHIFT 4
654 #define DA9062AA_BUCK3_STEP_MASK (0x0f << 4)
659 #define DA9062AA_GP_FALL1_STEP_SHIFT 4
660 #define DA9062AA_GP_FALL1_STEP_MASK (0x0f << 4)
665 #define DA9062AA_GP_FALL2_STEP_SHIFT 4
666 #define DA9062AA_GP_FALL2_STEP_MASK (0x0f << 4)
671 #define DA9062AA_GP_FALL3_STEP_SHIFT 4
672 #define DA9062AA_GP_FALL3_STEP_MASK (0x0f << 4)
677 #define DA9062AA_GP_FALL4_STEP_SHIFT 4
678 #define DA9062AA_GP_FALL4_STEP_MASK (0x0f << 4)
683 #define DA9062AA_GP_FALL5_STEP_SHIFT 4
684 #define DA9062AA_GP_FALL5_STEP_MASK (0x0f << 4)
689 #define DA9062AA_EN32K_STEP_SHIFT 4
690 #define DA9062AA_EN32K_STEP_MASK (0x0f << 4)
695 #define DA9062AA_POWER_END_SHIFT 4
696 #define DA9062AA_POWER_END_MASK (0x0f << 4)
701 #define DA9062AA_PART_DOWN_SHIFT 4
702 #define DA9062AA_PART_DOWN_MASK (0x0f << 4)
707 #define DA9062AA_WAIT_MODE_SHIFT 4
708 #define DA9062AA_WAIT_MODE_MASK BIT(4)
719 #define DA9062AA_DELAY_MODE_SHIFT 4
720 #define DA9062AA_DELAY_MODE_MASK BIT(4)
725 #define DA9062AA_EN_32KOUT_SHIFT 7
726 #define DA9062AA_EN_32KOUT_MASK BIT(7)
745 #define DA9062AA_BUCK2_ILIM_SHIFT 4
746 #define DA9062AA_BUCK2_ILIM_MASK (0x0f << 4)
763 #define DA9062AA_BUCK4_VTT_EN_SHIFT 4
764 #define DA9062AA_BUCK4_VTT_EN_MASK BIT(4)
779 #define DA9062AA_BUCK2_SL_A_SHIFT 7
780 #define DA9062AA_BUCK2_SL_A_MASK BIT(7)
785 #define DA9062AA_BUCK1_SL_A_SHIFT 7
786 #define DA9062AA_BUCK1_SL_A_MASK BIT(7)
791 #define DA9062AA_BUCK4_SL_A_SHIFT 7
792 #define DA9062AA_BUCK4_SL_A_MASK BIT(7)
797 #define DA9062AA_BUCK3_SL_A_SHIFT 7
798 #define DA9062AA_BUCK3_SL_A_MASK BIT(7)
800 /* DA9062AA_VLDO[1-4]_A common */
806 #define DA9062AA_LDO1_SL_A_SHIFT 7
807 #define DA9062AA_LDO1_SL_A_MASK BIT(7)
812 #define DA9062AA_LDO2_SL_A_SHIFT 7
813 #define DA9062AA_LDO2_SL_A_MASK BIT(7)
818 #define DA9062AA_LDO3_SL_A_SHIFT 7
819 #define DA9062AA_LDO3_SL_A_MASK BIT(7)
824 #define DA9062AA_LDO4_SL_A_SHIFT 7
825 #define DA9062AA_LDO4_SL_A_MASK BIT(7)
830 #define DA9062AA_BUCK2_SL_B_SHIFT 7
831 #define DA9062AA_BUCK2_SL_B_MASK BIT(7)
836 #define DA9062AA_BUCK1_SL_B_SHIFT 7
837 #define DA9062AA_BUCK1_SL_B_MASK BIT(7)
842 #define DA9062AA_BUCK4_SL_B_SHIFT 7
843 #define DA9062AA_BUCK4_SL_B_MASK BIT(7)
848 #define DA9062AA_BUCK3_SL_B_SHIFT 7
849 #define DA9062AA_BUCK3_SL_B_MASK BIT(7)
854 #define DA9062AA_LDO1_SL_B_SHIFT 7
855 #define DA9062AA_LDO1_SL_B_MASK BIT(7)
860 #define DA9062AA_LDO2_SL_B_SHIFT 7
861 #define DA9062AA_LDO2_SL_B_MASK BIT(7)
866 #define DA9062AA_LDO3_SL_B_SHIFT 7
867 #define DA9062AA_LDO3_SL_B_MASK BIT(7)
872 #define DA9062AA_LDO4_SL_B_SHIFT 7
873 #define DA9062AA_LDO4_SL_B_MASK BIT(7)
878 #define DA9062AA_BCHG_ISET_SHIFT 4
879 #define DA9062AA_BCHG_ISET_MASK (0x0f << 4)
882 #define DA9062AA_IF_BASE_ADDR_SHIFT 4
883 #define DA9062AA_IF_BASE_ADDR_MASK (0x0f << 4)
892 #define DA9062AA_PM_IF_V_SHIFT 4
893 #define DA9062AA_PM_IF_V_MASK BIT(4)
902 #define DA9062AA_VDD_HYST_ADJ_SHIFT 4
903 #define DA9062AA_VDD_HYST_ADJ_MASK (0x07 << 4)
910 #define DA9062AA_BUCK4_CLK_INV_SHIFT 4
911 #define DA9062AA_BUCK4_CLK_INV_MASK BIT(4)
932 #define DA9062AA_BUCK3_AUTO_SHIFT 4
933 #define DA9062AA_BUCK3_AUTO_MASK BIT(4)
960 #define DA9062AA_KEY_SD_MODE_SHIFT 4
961 #define DA9062AA_KEY_SD_MODE_MASK BIT(4)
966 #define DA9062AA_LDO_SD_SHIFT 7
967 #define DA9062AA_LDO_SD_MASK BIT(7)
974 #define DA9062AA_RESET_DURATION_SHIFT 4
975 #define DA9062AA_RESET_DURATION_MASK (0x03 << 4)
978 #define DA9062AA_IF_RESET_SHIFT 7
979 #define DA9062AA_IF_RESET_MASK BIT(7)
990 #define DA9062AA_GPIO4_PUPD_SHIFT 4
991 #define DA9062AA_GPIO4_PUPD_MASK BIT(4)
998 #define DA9062AA_OSC_FRQ_SHIFT 4
999 #define DA9062AA_OSC_FRQ_MASK (0x0f << 4)
1092 #define DA9062AA_MRC_SHIFT 4
1093 #define DA9062AA_MRC_MASK (0x0f << 4)