Lines Matching +full:half +full:- +full:period

1 /* SPDX-License-Identifier: GPL-2.0-only */
3  *  Extend a 32-bit counter to 63 bits
31  * cnt32_to_63 - Expand a 32-bit counter to a 63-bit counter
35  * a relatively short period making wrap-arounds rather frequent.  This
36  * is a problem when implementing sched_clock() for example, where a 64-bit
37  * non-wrapping monotonic value is expected to be returned.
39  * To overcome that limitation, let's extend a 32-bit counter to 63 bits
42  * memory is used to synchronize with the hardware clock half-period.  When
55  * 1) this code must be called at least once per each half period of the
56  *    32-bit counter;
59  *    32-bit counter half period minus the longest period between two
89  * clear-bit instruction. Otherwise caller must remember to clear the top