Lines Matching +full:- +full:16 +full:g
1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
9 #include <dt-bindings/memory/mtk-memory-port.h>
33 #define SMI_L15_ID 16
45 * MM IOMMU supports 16GB dma address. We separate it to four ranges:
46 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
49 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
53 * modules dma-address-region larbs-ports
54 * disp 0 ~ 4G larb0/1/2/3
55 * vcodec 4G ~ 8G larb19(21)[1]/21(22)/23
56 * cam/mdp 8G ~ 12G the other larbs.
57 * N/A 12G ~ 16G
62 * iommu-vdo: larb0/2/5/9/10/11A/11C/13/16B/17B/19/21
63 * iommu-vpp: larb1/3/4/6/7/11B/12/14/15/16A/17A/23/27
69 /* LARB 0 -- VDO-0 */
78 /* LARB 1 -- VD0-0 */
87 /* LARB 2 -- VDO-1 */
94 /* LARB 3 -- VDO-1 */
103 /* LARB 4 -- VPP-0 */
112 /* LARB 5 -- VPP-1 */
122 /* LARB 6 -- VPP-1 */
128 /* LARB 7 -- WPE */
133 /* LARB 9 -- IMG-M */
150 #define M4U_PORT_L9_IMGCI_T1_B MTK_M4U_ID(SMI_L9_ID, 16)
160 /* LARB 10 -- IMG-D */
177 #define M4U_PORT_L10_TNRMO_D1 MTK_M4U_ID(SMI_L10_ID, 16)
182 /* LARB 11A -- IMG-D */
199 #define M4U_PORT_L11A_YUVBO_T1_C MTK_M4U_ID(SMI_L11A_ID, 16)
214 /* LARB 11B -- IMG-D */
231 #define M4U_PORT_L11B_YUVBO_T1_C MTK_M4U_ID(SMI_L11B_ID, 16)
246 /* LARB 11C -- IMG-D */
263 #define M4U_PORT_L11C_YUVBO_T1_C MTK_M4U_ID(SMI_L11C_ID, 16)
278 /* LARB 12 -- IPE */
296 /* LARB 13 -- CAM-1 */
313 #define M4U_PORT_L13_GCAMSV_A_UFEO_2 MTK_M4U_ID(SMI_L13_ID, 16)
322 /* LARB 14 -- CAM-1 */
339 #define M4U_PORT_L14_GCAMSV_D_UFEO_1 MTK_M4U_ID(SMI_L14_ID, 16)
347 /* LARB 15 -- IMG-D */
364 #define M4U_PORT_L15_SMTO_D9 MTK_M4U_ID(SMI_L15_ID, 16)
368 /* LARB 16A -- CAM */
385 #define M4U_PORT_L16A_FLKO_R1 MTK_M4U_ID(SMI_L16A_ID, 16)
387 /* LARB 16B -- CAM */
404 #define M4U_PORT_L16B_FLKO_R1 MTK_M4U_ID(SMI_L16B_ID, 16)
406 /* LARB 17A -- CAM */
415 /* LARB 17B -- CAM */
424 /* LARB 19 -- VENC */
441 #define M4U_PORT_L19_VENC_NBM_WDMA_LITE MTK_M4U_ID(SMI_L19_ID, 16)
453 /* LARB 21 -- VDEC-CORE0 */
466 /* LARB 23 -- VDEC-SOC */
477 /* LARB 27 -- CCU */
483 /* LARB 28 -- AXI-CCU */