161 static void octeon_wdt_write_string(const char *str)  in octeon_wdt_write_string()  function
227 	octeon_wdt_write_string("\r\n*** NMI Watchdog interrupt on Core 0x");  in octeon_wdt_nmi_stage3()
229 	octeon_wdt_write_string(" ***\r\n");  in octeon_wdt_nmi_stage3()
231 		octeon_wdt_write_string("\t");  in octeon_wdt_nmi_stage3()
232 		octeon_wdt_write_string(reg_name[i]);  in octeon_wdt_nmi_stage3()
233 		octeon_wdt_write_string("\t0x");  in octeon_wdt_nmi_stage3()
236 			octeon_wdt_write_string("\r\n");  in octeon_wdt_nmi_stage3()
238 	octeon_wdt_write_string("\terr_epc\t0x");  in octeon_wdt_nmi_stage3()
241 	octeon_wdt_write_string("\tepc\t0x");  in octeon_wdt_nmi_stage3()
243 	octeon_wdt_write_string("\r\n");  in octeon_wdt_nmi_stage3()
245 	octeon_wdt_write_string("\tstatus\t0x");  in octeon_wdt_nmi_stage3()
247 	octeon_wdt_write_string("\tcause\t0x");  in octeon_wdt_nmi_stage3()
249 	octeon_wdt_write_string("\r\n");  in octeon_wdt_nmi_stage3()
253 		octeon_wdt_write_string("\tsrc_wd\t0x");  in octeon_wdt_nmi_stage3()
255 		octeon_wdt_write_string("\ten_wd\t0x");  in octeon_wdt_nmi_stage3()
257 		octeon_wdt_write_string("\r\n");  in octeon_wdt_nmi_stage3()
258 		octeon_wdt_write_string("\tsrc_rml\t0x");  in octeon_wdt_nmi_stage3()
260 		octeon_wdt_write_string("\ten_rml\t0x");  in octeon_wdt_nmi_stage3()
262 		octeon_wdt_write_string("\r\n");  in octeon_wdt_nmi_stage3()
263 		octeon_wdt_write_string("\tsum\t0x");  in octeon_wdt_nmi_stage3()
265 		octeon_wdt_write_string("\r\n");  in octeon_wdt_nmi_stage3()
267 		octeon_wdt_write_string("\tsum0\t0x");  in octeon_wdt_nmi_stage3()
269 		octeon_wdt_write_string("\ten0\t0x");  in octeon_wdt_nmi_stage3()
271 		octeon_wdt_write_string("\r\n");  in octeon_wdt_nmi_stage3()
274 	octeon_wdt_write_string("*** Chip soft reset soon ***\r\n");  in octeon_wdt_nmi_stage3()