Lines Matching +full:0 +full:x3230
16 #define PCI_VIA_VENDOR_ID 0x1106
20 #define UNICHROME_CLE266_DID 0x3122
21 #define CLE266_REVISION_AX 0x0A
22 #define CLE266_REVISION_CX 0x0C
25 #define UNICHROME_K400_DID 0x7205
28 #define UNICHROME_K800_DID 0x3108
31 #define UNICHROME_PM800_DID 0x3118
34 #define UNICHROME_CN700_DID 0x3344
37 #define UNICHROME_CX700_DID 0x3157
38 #define CX700_REVISION_700 0x0
39 #define CX700_REVISION_700M 0x1
40 #define CX700_REVISION_700M2 0x2
43 #define UNICHROME_CN750_DID 0x3225
46 #define UNICHROME_K8M890_DID 0x3230
49 #define UNICHROME_P4M890_DID 0x3343
52 #define UNICHROME_P4M900_DID 0x3371
55 #define UNICHROME_VX800_DID 0x1122
58 #define UNICHROME_VX855_DID 0x5122
61 #define UNICHROME_VX900_DID 0x7122
68 #define NON_TMDS_TRANSMITTER 0x00
69 #define VT1632_TMDS 0x01
70 #define INTEGRATED_TMDS 0x42
73 #define VT1632_TMDS_I2C_ADDR 0x10
80 #define NON_LVDS_TRANSMITTER 0x00
81 #define VT1631_LVDS 0x01
82 #define VT1636_LVDS 0x0E
83 #define INTEGRATED_LVDS 0x41
86 #define TX_DATA_12_BITS 0x01
87 #define TX_DATA_24_BITS 0x02
88 #define TX_DATA_DDR_MODE 0x04
89 #define TX_DATA_SDR_MODE 0x08
92 #define VT1631_LVDS_I2C_ADDR 0x70
93 #define VT3271_LVDS_I2C_ADDR 0x80
94 #define VT1636_LVDS_I2C_ADDR 0x80
146 u8 DVP0; /* CR96[3:0] */
151 u8 DVP1; /* CR9B[3:0] */
152 u8 DVP1Driving; /* SR65[3:0], Data and Clock driving */
153 u8 DFPHigh; /* CR97[3:0] */
154 u8 DFPLow; /* CR99[3:0] */