Lines Matching +full:individual +full:- +full:port +full:- +full:switching
1 /* SPDX-License-Identifier: GPL-2.0 */
5 * COPYRIGHT (C) by L. Wassmann <LW@KARO-electronics.de>
8 /* ------------------------------------------------------------------------- */
20 /* ------------------------------------------------------------------------- */
70 * Bitmasks for the individual bits of these registers are defined in "ohci.h"
201 /* Philips transfer descriptor, cpu-endian */
228 /* ------------------------------------------------------------------------- */
231 * Hardware transfer status codes -- CC from PTD
253 /* CRC Error */ -EILSEQ,
254 /* Bit Stuff */ -EPROTO,
255 /* Data Togg */ -EILSEQ,
256 /* Stall */ -EPIPE,
257 /* DevNotResp */ -ETIMEDOUT,
258 /* PIDCheck */ -EPROTO,
259 /* UnExpPID */ -EPROTO,
260 /* DataOver */ -EOVERFLOW,
261 /* DataUnder */ -EREMOTEIO,
262 /* (for hw) */ -EIO,
263 /* (for hw) */ -EIO,
264 /* BufferOver */ -ECOMM,
265 /* BuffUnder */ -ENOSR,
266 /* (for HCD) */ -EALREADY,
267 /* (for HCD) */ -EALREADY
278 /* pre-shifted values for HCFS */
308 #define RH_PS_PES 0x00000002 /* port enable status*/
309 #define RH_PS_PSS 0x00000004 /* port suspend status */
310 #define RH_PS_POCI 0x00000008 /* port over current indicator */
311 #define RH_PS_PRS 0x00000010 /* port reset status */
312 #define RH_PS_PPS 0x00000100 /* port power status */
315 #define RH_PS_PESC 0x00020000 /* port enable status change */
316 #define RH_PS_PSSC 0x00040000 /* port suspend status change */
318 #define RH_PS_PRSC 0x00100000 /* port reset status change */
330 #define RH_B_PPCM 0xffff0000 /* port power control mask */
334 #define RH_A_PSM (1 << 8) /* power switching mode */
335 #define RH_A_NPS (1 << 9) /* no power switching */
341 #define FI 0x2edf /* 12000 bits per frame (-1) */
342 #define FSMP(fi) (0x7fff & ((6 * ((fi) - 210)) / 7))
345 /* ------------------------------------------------------------------------- */
348 #define PTD_GET_COUNT(p) (((p)->count & PTD_COUNT_MSK) >> 0)
350 #define PTD_GET_TOGGLE(p) (((p)->count & PTD_TOGGLE_MSK) >> 10)
352 #define PTD_GET_ACTIVE(p) (((p)->count & PTD_ACTIVE_MSK) >> 11)
354 #define PTD_GET_CC(p) (((p)->count & PTD_CC_MSK) >> 12)
356 #define PTD_GET_MPS(p) (((p)->mps & PTD_MPS_MSK) >> 0)
358 #define PTD_GET_SPD(p) (((p)->mps & PTD_SPD_MSK) >> 10)
360 #define PTD_GET_LAST(p) (((p)->mps & PTD_LAST_MSK) >> 11)
362 #define PTD_GET_EP(p) (((p)->mps & PTD_EP_MSK) >> 12)
364 #define PTD_GET_LEN(p) (((p)->len & PTD_LEN_MSK) >> 0)
366 #define PTD_GET_DIR(p) (((p)->len & PTD_DIR_MSK) >> 10)
368 #define PTD_GET_FA(p) (((p)->faddr & PTD_FA_MSK) >> 0)
370 #define PTD_GET_SF_INT(p) (((p)->faddr & PTD_SF_INT_MSK) >> 8)
372 #define PTD_GET_SF_ISO(p) (((p)->faddr & PTD_SF_ISO_MSK) >> 8)
374 #define PTD_GET_PR(p) (((p)->faddr & PTD_PR_MSK) >> 13)
512 isp1362_hcd->stat16++; in ALIGNSTAT()
514 isp1362_hcd->stat8++; in ALIGNSTAT()
516 isp1362_hcd->stat4++; in ALIGNSTAT()
518 isp1362_hcd->stat2++; in ALIGNSTAT()
520 isp1362_hcd->stat1++; in ALIGNSTAT()
525 return (struct isp1362_hcd *) (hcd->hcd_priv); in hcd_to_isp1362_hcd()
533 #define frame_before(f1, f2) ((s16)((u16)f1 - (u16)f2) < 0)
568 #define isp1362_delay(h, d) (h)->board->delay(isp1362_hcd_to_hcd(h)->self.controller, d)
576 BUG_ON(list_empty(&ep->hep->urb_list)); \
577 container_of(ep->hep->urb_list.next, struct urb, urb_list); \
589 writew(ISP1362_REG_NO(reg), isp1362_hcd->addr_reg); in isp1362_write_addr()
597 writew(val, isp1362_hcd->data_reg); in isp1362_write_data16()
605 val = readw(isp1362_hcd->data_reg); in isp1362_read_data16()
614 writel(val, isp1362_hcd->data_reg); in isp1362_write_data32()
617 writew((u16)val, isp1362_hcd->data_reg); in isp1362_write_data32()
619 writew(val >> 16, isp1362_hcd->data_reg); in isp1362_write_data32()
629 val = readl(isp1362_hcd->data_reg); in isp1362_read_data32()
632 val = (u32)readw(isp1362_hcd->data_reg); in isp1362_read_data32()
634 val |= (u32)readw(isp1362_hcd->data_reg) << 16; in isp1362_read_data32()
653 readsl(isp1362_hcd->data_reg, dp, len >> 2); in isp1362_read_fifo()
660 insw((unsigned long)isp1362_hcd->data_reg, dp, len >> 1); in isp1362_read_fifo()
684 for (; len > 1; len -= 2) { in isp1362_write_fifo()
698 writesl(isp1362_hcd->data_reg, dp, len >> 2); in isp1362_write_fifo()
705 outsw((unsigned long)isp1362_hcd->data_reg, dp, len >> 1); in isp1362_write_fifo()
788 DBG(0, "%-12s[%02x]: %08x\n", #r, \
791 DBG(0, "%-12s[%02x]: %04x\n", #r, \
872 DBG(0, " %04x %04x %04x %04x\n", ptd->count, ptd->mps, ptd->len, ptd->faddr); in dump_ptd()
879 DBG(0, "--out->\n"); in dump_ptd_out_data()
889 DBG(0, "<--in--\n"); in dump_ptd_in_data()
892 DBG(0, "-----\n"); in dump_ptd_in_data()
902 list_for_each_entry(ep, &epq->active, active) { in dump_ptd_queue()
903 dump_ptd(&ep->ptd); in dump_ptd_queue()
904 dump_data(ep->data, ep->length); in dump_ptd_queue()