68 #define FUSB300_GCR_SYNC_FIFO1_CLR	(1 << 5)
93 #define FUSB300_DAR_DRVADDR(x)	(x & 0x7F)  argument
100 #define FUSB300_CSR_LEN(x)	((x & 0xFFFF) << 8)  argument
118 #define FUSB300_EPSET1_START_ENTRY(x)	((x & 0xFF) << 24)  argument
120 #define FUSB300_EPSET1_FIFOENTRY(x)	((x & 0x1F) << 12)  argument
122 #define FUSB300_EPSET1_INTERVAL(x)	((x & 0x7) << 6)  argument
123 #define FUSB300_EPSET1_BWNUM(x)		((x & 0x3) << 4)  argument
127 #define FUSB300_EPSET1_TYPE(x)		((x & 0x3) << 2)  argument
131 #define FUSB300_EPSET1_DIR(x)		((x & 0x1) << 1)  argument
140 #define FUSB300_EPSET2_ADDROFS(x)	((x & 0x7FFF) << 16)  argument
142 #define FUSB300_EPSET2_MPS(x)		(x & 0x7FF)  argument
157 #define FUSB300_STRID_STRID(x)	(x & 0xFFFF)  argument
174 #define FUSB300_HSCR_HS_GOSUSP		(1 << 5)
182 #define FUSB300_HSCR_IDLECNT_5MS	5
189 #define FUSB300_SSCR0_MAX_INTERVAL(x)	((x & 0x7) << 4)  argument
199 #define FUSB300_SSCR1_FORCE_RECOVERY	(1 << 5)
211 #define FUSB300_SSCR2_U2_INACT_TIMEOUT(x)	((x & 0xFF) << 16)  argument
212 #define FUSB300_SSCR2_U1TIMEOUT(x)		((x & 0xFF) << 8)  argument
213 #define FUSB300_SSCR2_U2TIMEOUT(x)		(x & 0xFF)  argument
218 #define FUSB300_DEVNOTF_CONTEXT0(x)		((x & 0xFFFFFF) << 8)  argument
236 #define FUSB300_VSIC_VCTL(x)	(x & 0x3F)  argument
282 #define FUSB300_IGR0_EP5_FIFO_INT	(1 << 5)
317 #define FUSB300_IGR1_CX_OUT_INT		(1 << 5)
351 #define FUSB300_IGR2_EP2_STR_PRIME_INT		(1 << 5)
358 #define FUSB300_IGR2_EP_STR_ACCEPT_INT(n)	(1 << (5 * n - 1))
359 #define FUSB300_IGR2_EP_STR_RESUME_INT(n)	(1 << (5 * n - 2))
360 #define FUSB300_IGR2_EP_STR_REQ_INT(n)		(1 << (5 * n - 3))
361 #define FUSB300_IGR2_EP_STR_NOTRDY_INT(n)	(1 << (5 * n - 4))
362 #define FUSB300_IGR2_EP_STR_PRIME_INT(n)	(1 << (5 * n - 5))
391 #define FUSB300_IGR3_EP8_STR_PRIME_INT		(1 << 5)
398 #define FUSB300_IGR3_EP_STR_ACCEPT_INT(n)	(1 << (5 * (n - 6) - 1))
399 #define FUSB300_IGR3_EP_STR_RESUME_INT(n)	(1 << (5 * (n - 6) - 2))
400 #define FUSB300_IGR3_EP_STR_REQ_INT(n)		(1 << (5 * (n - 6) - 3))
401 #define FUSB300_IGR3_EP_STR_NOTRDY_INT(n)	(1 << (5 * (n - 6) - 4))
402 #define FUSB300_IGR3_EP_STR_PRIME_INT(n)	(1 << (5 * (n - 6) - 5))
422 #define FUSB300_IGR4_EP_RX0_INT(x)		(1 << (x + 16))  argument
432 #define FUSB300_IGR4_EP14_STR_PRIME_INT		(1 << 5)
439 #define FUSB300_IGR4_EP_STR_ACCEPT_INT(n)	(1 << (5 * (n - 12) - 1))
440 #define FUSB300_IGR4_EP_STR_RESUME_INT(n)	(1 << (5 * (n - 12) - 2))
441 #define FUSB300_IGR4_EP_STR_REQ_INT(n)		(1 << (5 * (n - 12) - 3))
442 #define FUSB300_IGR4_EP_STR_NOTRDY_INT(n)	(1 << (5 * (n - 12) - 4))
443 #define FUSB300_IGR4_EP_STR_PRIME_INT(n)	(1 << (5 * (n - 12) - 5))
446  * *Interrupt Group 5 Register (offset = 414H)
480 #define FUSB300_IGER0_EEP5_FIFO_INT	(1 << 5)
515 #define FUSB300_IGER1_CX_OUT_INT	(1 << 5)
525 #define FUSB300_IGER2_EEP_STR_ACCEPT_INT(n)	(1 << (5 * n - 1))
526 #define FUSB300_IGER2_EEP_STR_RESUME_INT(n)	(1 << (5 * n - 2))
527 #define FUSB300_IGER2_EEP_STR_REQ_INT(n)	(1 << (5 * n - 3))
528 #define FUSB300_IGER2_EEP_STR_NOTRDY_INT(n)	(1 << (5 * n - 4))
529 #define FUSB300_IGER2_EEP_STR_PRIME_INT(n)	(1 << (5 * n - 5))
535 #define FUSB300_IGER3_EEP_STR_ACCEPT_INT(n)	(1 << (5 * (n - 6) - 1))
536 #define FUSB300_IGER3_EEP_STR_RESUME_INT(n)	(1 << (5 * (n - 6) - 2))
537 #define FUSB300_IGER3_EEP_STR_REQ_INT(n)	(1 << (5 * (n - 6) - 3))
538 #define FUSB300_IGER3_EEP_STR_NOTRDY_INT(n)	(1 << (5 * (n - 6) - 4))
539 #define FUSB300_IGER3_EEP_STR_PRIME_INT(n)	(1 << (5 * (n - 6) - 5))
546 #define FUSB300_IGER4_EEP_STR_ACCEPT_INT(n)	(1 << (5 * (n - 6) - 1))
547 #define FUSB300_IGER4_EEP_STR_RESUME_INT(n)	(1 << (5 * (n - 6) - 2))
548 #define FUSB300_IGER4_EEP_STR_REQ_INT(n)	(1 << (5 * (n - 6) - 3))
549 #define FUSB300_IGER4_EEP_STR_NOTRDY_INT(n)	(1 << (5 * (n - 6) - 4))
550 #define FUSB300_IGER4_EEP_STR_PRIME_INT(n)	(1 << (5 * (n - 6) - 5))
564 #define FUSB300_EPPRDR_EP5_PRD_RDY		(1 << 5)
576 #define FUSB300_AHBBCR_S1_8entry		(5 << 12)
580 #define FUSB300_AHBBCR_S0_8entry		(5 << 8)
585 #define FUSB300_AHBBCR_M1_BURST_INCR8		(5 << 4)
590 #define FUSB300_AHBBCR_M0_BURST_INCR8		5