Lines Matching +full:xps +full:- +full:uartlite +full:- +full:1
1 // SPDX-License-Identifier: GPL-2.0
3 * uartlite.c: Serial driver for Xilinx uartlite serial controller
36 /* ---------------------------------------------------------------------
70 * struct uartlite_data - Driver private data
120 struct uartlite_data *pdata = port->private_data; in uart_in32()
122 return pdata->reg_ops->in(port->membase + offset); in uart_in32()
127 struct uartlite_data *pdata = port->private_data; in uart_out32()
129 pdata->reg_ops->out(val, port->membase + offset); in uart_out32()
136 /* ---------------------------------------------------------------------
142 struct tty_port *tport = &port->state->port; in ulite_receive()
152 port->icount.rx++; in ulite_receive()
156 port->icount.parity++; in ulite_receive()
160 port->icount.overrun++; in ulite_receive()
163 port->icount.frame++; in ulite_receive()
167 if (stat & port->ignore_status_mask & ULITE_STATUS_PARITY) in ulite_receive()
170 stat &= port->read_status_mask; in ulite_receive()
176 stat &= ~port->ignore_status_mask; in ulite_receive()
187 return 1; in ulite_receive()
192 struct tty_port *tport = &port->state->port; in ulite_transmit()
198 if (port->x_char) { in ulite_transmit()
199 uart_out32(port->x_char, ULITE_TX, port); in ulite_transmit()
200 port->x_char = 0; in ulite_transmit()
201 port->icount.tx++; in ulite_transmit()
202 return 1; in ulite_transmit()
214 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) in ulite_transmit()
217 return 1; in ulite_transmit()
236 if (n > 1) { in ulite_isr()
237 tty_flip_buffer_push(&port->state->port); in ulite_isr()
279 port->ignore_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_PARITY in ulite_stop_rx()
290 struct uartlite_data *pdata = port->private_data; in ulite_startup()
293 ret = clk_enable(pdata->clk); in ulite_startup()
295 dev_err(port->dev, "Failed to enable clock\n"); in ulite_startup()
299 ret = request_irq(port->irq, ulite_isr, IRQF_SHARED | IRQF_TRIGGER_RISING, in ulite_startup()
300 "uartlite", port); in ulite_startup()
313 struct uartlite_data *pdata = port->private_data; in ulite_shutdown()
317 free_irq(port->irq, port); in ulite_shutdown()
318 clk_disable(pdata->clk); in ulite_shutdown()
326 struct uartlite_data *pdata = port->private_data; in ulite_set_termios()
329 termios->c_iflag &= ~BRKINT; in ulite_set_termios()
330 termios->c_cflag &= ~(CSTOPB | PARENB | PARODD | CSIZE); in ulite_set_termios()
331 termios->c_cflag |= pdata->cflags & (PARENB | PARODD | CSIZE); in ulite_set_termios()
332 tty_termios_encode_baud_rate(termios, pdata->baud, pdata->baud); in ulite_set_termios()
336 port->read_status_mask = ULITE_STATUS_RXVALID | ULITE_STATUS_OVERRUN in ulite_set_termios()
339 if (termios->c_iflag & INPCK) in ulite_set_termios()
340 port->read_status_mask |= in ulite_set_termios()
343 port->ignore_status_mask = 0; in ulite_set_termios()
344 if (termios->c_iflag & IGNPAR) in ulite_set_termios()
345 port->ignore_status_mask |= ULITE_STATUS_PARITY in ulite_set_termios()
349 if ((termios->c_cflag & CREAD) == 0) in ulite_set_termios()
350 port->ignore_status_mask |= in ulite_set_termios()
355 uart_update_timeout(port, termios->c_cflag, pdata->baud); in ulite_set_termios()
362 return port->type == PORT_UARTLITE ? "uartlite" : NULL; in ulite_type()
367 release_mem_region(port->mapbase, ULITE_REGION); in ulite_release_port()
368 iounmap(port->membase); in ulite_release_port()
369 port->membase = NULL; in ulite_release_port()
374 struct uartlite_data *pdata = port->private_data; in ulite_request_port()
377 pr_debug("ulite console: port=%p; port->mapbase=%llx\n", in ulite_request_port()
378 port, (unsigned long long) port->mapbase); in ulite_request_port()
380 if (!request_mem_region(port->mapbase, ULITE_REGION, "uartlite")) { in ulite_request_port()
381 dev_err(port->dev, "Memory region busy\n"); in ulite_request_port()
382 return -EBUSY; in ulite_request_port()
385 port->membase = ioremap(port->mapbase, ULITE_REGION); in ulite_request_port()
386 if (!port->membase) { in ulite_request_port()
387 dev_err(port->dev, "Unable to map registers\n"); in ulite_request_port()
388 release_mem_region(port->mapbase, ULITE_REGION); in ulite_request_port()
389 return -EBUSY; in ulite_request_port()
392 pdata->reg_ops = &uartlite_be; in ulite_request_port()
398 pdata->reg_ops = &uartlite_le; in ulite_request_port()
406 port->type = PORT_UARTLITE; in ulite_config_port()
412 return -EINVAL; in ulite_verify_port()
421 ret = pm_runtime_get_sync(port->dev); in ulite_pm()
423 dev_err(port->dev, "Failed to enable clocks\n"); in ulite_pm()
425 pm_runtime_mark_last_busy(port->dev); in ulite_pm()
426 pm_runtime_put_autosuspend(port->dev); in ulite_pm()
472 /* ---------------------------------------------------------------------
483 * When using the Microblaze Debug Module this can take up to 1s in ulite_console_wait_tx()
487 dev_warn(port->dev, in ulite_console_wait_tx()
503 int locked = 1; in ulite_console_write()
534 if (co->index >= 0 && co->index < ULITE_NR_UARTS) in ulite_console_setup()
535 port = ulite_ports + co->index; in ulite_console_setup()
538 if (!port || !port->mapbase) { in ulite_console_setup()
539 pr_debug("console on ttyUL%i not present\n", co->index); in ulite_console_setup()
540 return -ENODEV; in ulite_console_setup()
546 if (!port->membase) { in ulite_console_setup()
548 return -ENODEV; in ulite_console_setup()
563 .index = -1, /* Specified on the cmdline (e.g. console=ttyUL0 ) */
572 * set, or any other issue on the UARTLITE. in early_uartlite_putc()
578 while (--retries && in early_uartlite_putc()
579 (readl(port->membase + ULITE_STATUS) & ULITE_STATUS_TXFULL)) in early_uartlite_putc()
584 writel(c & 0xff, port->membase + ULITE_TX); in early_uartlite_putc()
590 struct earlycon_device *device = console->data; in early_uartlite_write()
591 uart_console_write(&device->port, s, n, early_uartlite_putc); in early_uartlite_write()
597 if (!device->port.membase) in early_uartlite_setup()
598 return -ENODEV; in early_uartlite_setup()
600 device->con->write = early_uartlite_write; in early_uartlite_setup()
603 EARLYCON_DECLARE(uartlite, early_uartlite_setup);
604 OF_EARLYCON_DECLARE(uartlite_b, "xlnx,opb-uartlite-1.00.b", early_uartlite_setup);
605 OF_EARLYCON_DECLARE(uartlite_a, "xlnx,xps-uartlite-1.00.a", early_uartlite_setup);
611 .driver_name = "uartlite",
621 /* ---------------------------------------------------------------------
625 /** ulite_assign: register a uartlite device with the driver
628 * @id: requested id number. Pass -1 for automatic port assignment
629 * @base: base address of uartlite registers
630 * @irq: irq number for uartlite
631 * @pdata: private data for uartlite
641 /* if id = -1; then scan for a free id and use that */ in ulite_assign()
649 return -EINVAL; in ulite_assign()
655 return -EBUSY; in ulite_assign()
660 spin_lock_init(&port->lock); in ulite_assign()
661 port->fifosize = 16; in ulite_assign()
662 port->regshift = 2; in ulite_assign()
663 port->iotype = UPIO_MEM; in ulite_assign()
664 port->iobase = 1; /* mark port in use */ in ulite_assign()
665 port->mapbase = base; in ulite_assign()
666 port->membase = NULL; in ulite_assign()
667 port->ops = &ulite_ops; in ulite_assign()
668 port->irq = irq; in ulite_assign()
669 port->flags = UPF_BOOT_AUTOCONF; in ulite_assign()
670 port->dev = dev; in ulite_assign()
671 port->type = PORT_UNKNOWN; in ulite_assign()
672 port->line = id; in ulite_assign()
673 port->private_data = pdata; in ulite_assign()
681 port->mapbase = 0; in ulite_assign()
689 /** ulite_release: register a uartlite device with the driver
700 port->mapbase = 0; in ulite_release()
705 * ulite_suspend - Stop the device.
721 * ulite_resume - Resume the device.
739 struct uartlite_data *pdata = port->private_data; in ulite_runtime_suspend()
741 clk_disable(pdata->clk); in ulite_runtime_suspend()
748 struct uartlite_data *pdata = port->private_data; in ulite_runtime_resume()
751 ret = clk_enable(pdata->clk); in ulite_runtime_resume()
759 /* ---------------------------------------------------------------------
772 { .compatible = "xlnx,opb-uartlite-1.00.b", },
773 { .compatible = "xlnx,xps-uartlite-1.00.a", },
784 int id = pdev->id; in ulite_probe()
786 pdata = devm_kzalloc(&pdev->dev, sizeof(struct uartlite_data), in ulite_probe()
789 return -ENOMEM; in ulite_probe()
793 struct device_node *np = pdev->dev.of_node; in ulite_probe()
796 prop = "port-number"; in ulite_probe()
798 if (ret && ret != -EINVAL) in ulite_probe()
800 return dev_err_probe(&pdev->dev, ret, in ulite_probe()
803 prop = "current-speed"; in ulite_probe()
804 ret = of_property_read_u32(np, prop, &pdata->baud); in ulite_probe()
808 prop = "xlnx,use-parity"; in ulite_probe()
810 if (ret && ret != -EINVAL) in ulite_probe()
814 prop = "xlnx,odd-parity"; in ulite_probe()
820 pdata->cflags |= PARODD; in ulite_probe()
821 pdata->cflags |= PARENB; in ulite_probe()
825 prop = "xlnx,data-bits"; in ulite_probe()
827 if (ret && ret != -EINVAL) in ulite_probe()
832 pdata->cflags |= CS5; in ulite_probe()
835 pdata->cflags |= CS6; in ulite_probe()
838 pdata->cflags |= CS7; in ulite_probe()
841 pdata->cflags |= CS8; in ulite_probe()
844 return dev_err_probe(&pdev->dev, -EINVAL, in ulite_probe()
848 pdata->baud = 9600; in ulite_probe()
849 pdata->cflags = CS8; in ulite_probe()
854 return -ENODEV; in ulite_probe()
860 pdata->clk = devm_clk_get(&pdev->dev, "s_axi_aclk"); in ulite_probe()
861 if (IS_ERR(pdata->clk)) { in ulite_probe()
862 if (PTR_ERR(pdata->clk) != -ENOENT) in ulite_probe()
863 return PTR_ERR(pdata->clk); in ulite_probe()
869 pdata->clk = NULL; in ulite_probe()
872 ret = clk_prepare_enable(pdata->clk); in ulite_probe()
874 dev_err(&pdev->dev, "Failed to prepare clock\n"); in ulite_probe()
878 pm_runtime_use_autosuspend(&pdev->dev); in ulite_probe()
879 pm_runtime_set_autosuspend_delay(&pdev->dev, UART_AUTOSUSPEND_TIMEOUT); in ulite_probe()
880 pm_runtime_set_active(&pdev->dev); in ulite_probe()
881 pm_runtime_enable(&pdev->dev); in ulite_probe()
884 dev_dbg(&pdev->dev, "uartlite: calling uart_register_driver()\n"); in ulite_probe()
887 dev_err(&pdev->dev, "Failed to register driver\n"); in ulite_probe()
888 clk_disable_unprepare(pdata->clk); in ulite_probe()
893 ret = ulite_assign(&pdev->dev, id, res->start, irq, pdata); in ulite_probe()
895 pm_runtime_mark_last_busy(&pdev->dev); in ulite_probe()
896 pm_runtime_put_autosuspend(&pdev->dev); in ulite_probe()
903 struct uart_port *port = dev_get_drvdata(&pdev->dev); in ulite_remove()
904 struct uartlite_data *pdata = port->private_data; in ulite_remove()
906 clk_disable_unprepare(pdata->clk); in ulite_remove()
907 ulite_release(&pdev->dev); in ulite_remove()
908 pm_runtime_disable(&pdev->dev); in ulite_remove()
909 pm_runtime_set_suspended(&pdev->dev); in ulite_remove()
910 pm_runtime_dont_use_autosuspend(&pdev->dev); in ulite_remove()
914 MODULE_ALIAS("platform:uartlite");
920 .name = "uartlite",
926 /* ---------------------------------------------------------------------
933 pr_debug("uartlite: calling platform_driver_register()\n"); in ulite_init()
948 MODULE_DESCRIPTION("Xilinx uartlite serial driver");