198 	uport->membase = devm_platform_ioremap_resource(pdev, 0);  in qcom_geni_serial_request_port()
199 	if (IS_ERR(uport->membase))  in qcom_geni_serial_request_port()
200 		return PTR_ERR(uport->membase);  in qcom_geni_serial_request_port()
201 	port->se.base = uport->membase;  in qcom_geni_serial_request_port()
221 		geni_ios = readl(uport->membase + SE_GENI_IOS);  in qcom_geni_serial_get_mctrl()
243 	writel(uart_manual_rfr, uport->membase + SE_UART_MANUAL_RFR);  in qcom_geni_serial_set_mctrl()
265 	return readl(uport->membase + SE_GENI_STATUS) & M_GENI_CMD_ACTIVE;  in qcom_geni_serial_main_active()
270 	return readl(uport->membase + SE_GENI_STATUS) & S_GENI_CMD_ACTIVE;  in qcom_geni_serial_secondary_active()
293 		reg = readl(uport->membase + offset);  in qcom_geni_serial_poll_bitfield()
312 	writel(xmit_size, uport->membase + SE_UART_TX_TRANS_LEN);  in qcom_geni_serial_setup_tx()
314 	writel(m_cmd, uport->membase + SE_GENI_M_CMD0);  in qcom_geni_serial_setup_tx()
324 		writel(M_GENI_CMD_ABORT, uport->membase +  in qcom_geni_serial_poll_tx_done()
328 		writel(M_CMD_ABORT_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_poll_tx_done()
336 	writel(S_GENI_CMD_ABORT, uport->membase + SE_GENI_S_CMD_CTRL_REG);  in qcom_geni_serial_abort_rx()
339 	writel(irq_clear, uport->membase + SE_GENI_S_IRQ_CLEAR);  in qcom_geni_serial_abort_rx()
340 	writel(FORCE_DEFAULT, uport->membase + GENI_FORCE_DEFAULT_REG);  in qcom_geni_serial_abort_rx()
352 		status = readl(uport->membase + SE_GENI_M_IRQ_STATUS);  in qcom_geni_serial_get_char()
353 		writel(status, uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_get_char()
355 		status = readl(uport->membase + SE_GENI_S_IRQ_STATUS);  in qcom_geni_serial_get_char()
356 		writel(status, uport->membase + SE_GENI_S_IRQ_CLEAR);  in qcom_geni_serial_get_char()
358 		status = readl(uport->membase + SE_GENI_RX_FIFO_STATUS);  in qcom_geni_serial_get_char()
376 			readl(uport->membase + SE_GENI_RX_FIFOn);  in qcom_geni_serial_get_char()
394 	writel(M_CMD_DONE_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_poll_put_char()
396 	writel(c, uport->membase + SE_GENI_TX_FIFOn);  in qcom_geni_serial_poll_put_char()
437 		       uport->membase + SE_GENI_TX_FIFOn);  in qcom_geni_serial_wr_char()
460 	writel(DEF_TX_WM, uport->membase + SE_GENI_TX_WATERMARK_REG);  in __qcom_geni_serial_console_write()
461 	writel(M_CMD_DONE_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in __qcom_geni_serial_console_write()
479 		writel(M_TX_FIFO_WATERMARK_EN, uport->membase +  in __qcom_geni_serial_console_write()
488 		       uport->membase + SE_GENI_TX_FIFOn);  in __qcom_geni_serial_console_write()
516 	m_irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_console_write()
517 	s_irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN);  in qcom_geni_serial_console_write()
518 	writel(0, uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_console_write()
519 	writel(0, uport->membase + SE_GENI_S_IRQ_EN);  in qcom_geni_serial_console_write()
533 	writel(m_irq_en, uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_console_write()
534 	writel(s_irq_en, uport->membase + SE_GENI_S_IRQ_EN);  in qcom_geni_serial_console_write()
552 		ioread32_rep(uport->membase + SE_GENI_RX_FIFOn, buf, 1);  in handle_rx_console()
600 	return !readl(uport->membase + SE_GENI_TX_FIFO_STATUS);  in qcom_geni_serial_tx_empty()
628 		writel(M_CMD_ABORT_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_stop_tx_dma()
631 	writel(M_CMD_CANCEL_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_stop_tx_dma()
677 			writel(M_CMD_DONE_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_start_tx_fifo()
679 			writel(c, uport->membase + SE_GENI_TX_FIFOn);  in qcom_geni_serial_start_tx_fifo()
683 	irq_en = readl(uport->membase +	SE_GENI_M_IRQ_EN);  in qcom_geni_serial_start_tx_fifo()
685 	writel(DEF_TX_WM, uport->membase + SE_GENI_TX_WATERMARK_REG);  in qcom_geni_serial_start_tx_fifo()
686 	writel(irq_en, uport->membase +	SE_GENI_M_IRQ_EN);  in qcom_geni_serial_start_tx_fifo()
693 	irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_stop_tx_fifo()
695 	writel(0, uport->membase + SE_GENI_TX_WATERMARK_REG);  in qcom_geni_serial_stop_tx_fifo()
696 	writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_stop_tx_fifo()
709 		writel(M_CMD_ABORT_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in __qcom_geni_serial_cancel_tx_cmd()
711 	writel(M_CMD_CANCEL_EN, uport->membase + SE_GENI_M_IRQ_CLEAR);  in __qcom_geni_serial_cancel_tx_cmd()
735 	status = readl(uport->membase +	SE_GENI_RX_FIFO_STATUS);  in qcom_geni_serial_handle_rx_fifo()
757 	irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN);  in qcom_geni_serial_stop_rx_fifo()
759 	writel(irq_en, uport->membase + SE_GENI_S_IRQ_EN);  in qcom_geni_serial_stop_rx_fifo()
761 	irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_stop_rx_fifo()
763 	writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_stop_rx_fifo()
775 	s_irq_status = readl(uport->membase + SE_GENI_S_IRQ_STATUS);  in qcom_geni_serial_stop_rx_fifo()
779 	writel(s_irq_status, uport->membase + SE_GENI_S_IRQ_CLEAR);  in qcom_geni_serial_stop_rx_fifo()
795 	irq_en = readl(uport->membase + SE_GENI_S_IRQ_EN);  in qcom_geni_serial_start_rx_fifo()
797 	writel(irq_en, uport->membase + SE_GENI_S_IRQ_EN);  in qcom_geni_serial_start_rx_fifo()
799 	irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_start_rx_fifo()
801 	writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_start_rx_fifo()
817 				uport->membase + SE_DMA_RX_IRQ_CLR);  in qcom_geni_serial_stop_rx_dma()
821 		writel(1, uport->membase + SE_DMA_RX_FSM_RST);  in qcom_geni_serial_stop_rx_dma()
825 				uport->membase + SE_DMA_RX_IRQ_CLR);  in qcom_geni_serial_stop_rx_dma()
869 	rx_in = readl(uport->membase + SE_DMA_RX_LEN_IN);  in qcom_geni_serial_handle_rx_dma()
915 		iowrite32_rep(uport->membase + SE_GENI_TX_FIFOn, buf, 1);  in qcom_geni_serial_send_chunk_fifo()
933 	status = readl(uport->membase + SE_GENI_TX_FIFO_STATUS);  in qcom_geni_serial_handle_tx_fifo()
963 		irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_handle_tx_fifo()
966 					uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_handle_tx_fifo()
978 			uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_handle_tx_fifo()
982 		irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_handle_tx_fifo()
985 					uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_handle_tx_fifo()
1028 	m_irq_status = readl(uport->membase + SE_GENI_M_IRQ_STATUS);  in qcom_geni_serial_isr()
1029 	s_irq_status = readl(uport->membase + SE_GENI_S_IRQ_STATUS);  in qcom_geni_serial_isr()
1030 	dma_tx_status = readl(uport->membase + SE_DMA_TX_IRQ_STAT);  in qcom_geni_serial_isr()
1031 	dma_rx_status = readl(uport->membase + SE_DMA_RX_IRQ_STAT);  in qcom_geni_serial_isr()
1032 	geni_status = readl(uport->membase + SE_GENI_STATUS);  in qcom_geni_serial_isr()
1033 	dma = readl(uport->membase + SE_GENI_DMA_MODE_EN);  in qcom_geni_serial_isr()
1034 	m_irq_en = readl(uport->membase + SE_GENI_M_IRQ_EN);  in qcom_geni_serial_isr()
1035 	writel(m_irq_status, uport->membase + SE_GENI_M_IRQ_CLEAR);  in qcom_geni_serial_isr()
1036 	writel(s_irq_status, uport->membase + SE_GENI_S_IRQ_CLEAR);  in qcom_geni_serial_isr()
1037 	writel(dma_tx_status, uport->membase + SE_DMA_TX_IRQ_CLR);  in qcom_geni_serial_isr()
1038 	writel(dma_rx_status, uport->membase + SE_DMA_RX_IRQ_CLR);  in qcom_geni_serial_isr()
1159 	writel(rxstale, uport->membase + SE_UART_RX_STALE_CNT);  in qcom_geni_serial_port_setup()
1161 	pin_swap = readl(uport->membase + SE_UART_IO_MACRO_CTRL);  in qcom_geni_serial_port_setup()
1172 		writel(pin_swap, uport->membase + SE_UART_IO_MACRO_CTRL);  in qcom_geni_serial_port_setup()
1327 	tx_trans_cfg = readl(uport->membase + SE_UART_TX_TRANS_CFG);  in qcom_geni_serial_set_termios()
1328 	tx_parity_cfg = readl(uport->membase + SE_UART_TX_PARITY_CFG);  in qcom_geni_serial_set_termios()
1329 	rx_trans_cfg = readl(uport->membase + SE_UART_RX_TRANS_CFG);  in qcom_geni_serial_set_termios()
1330 	rx_parity_cfg = readl(uport->membase + SE_UART_RX_PARITY_CFG);  in qcom_geni_serial_set_termios()
1385 				uport->membase + SE_UART_LOOPBACK_CFG);  in qcom_geni_serial_set_termios()
1386 	writel(tx_trans_cfg, uport->membase + SE_UART_TX_TRANS_CFG);  in qcom_geni_serial_set_termios()
1387 	writel(tx_parity_cfg, uport->membase + SE_UART_TX_PARITY_CFG);  in qcom_geni_serial_set_termios()
1388 	writel(rx_trans_cfg, uport->membase + SE_UART_RX_TRANS_CFG);  in qcom_geni_serial_set_termios()
1389 	writel(rx_parity_cfg, uport->membase + SE_UART_RX_PARITY_CFG);  in qcom_geni_serial_set_termios()
1390 	writel(bits_per_char, uport->membase + SE_UART_TX_WORD_LEN);  in qcom_geni_serial_set_termios()
1391 	writel(bits_per_char, uport->membase + SE_UART_RX_WORD_LEN);  in qcom_geni_serial_set_termios()
1392 	writel(stop_bit_len, uport->membase + SE_UART_TX_STOP_BIT_LEN);  in qcom_geni_serial_set_termios()
1393 	writel(ser_clk_cfg, uport->membase + GENI_SER_M_CLK_CFG);  in qcom_geni_serial_set_termios()
1394 	writel(ser_clk_cfg, uport->membase + GENI_SER_S_CLK_CFG);  in qcom_geni_serial_set_termios()
1419 	if (unlikely(!uport->membase))  in qcom_geni_console_setup()
1486 	if (!uport->membase)  in qcom_geni_serial_earlycon_setup()
1492 	se.base = uport->membase;  in qcom_geni_serial_earlycon_setup()
1513 	writel(tx_trans_cfg, uport->membase + SE_UART_TX_TRANS_CFG);  in qcom_geni_serial_earlycon_setup()
1514 	writel(tx_parity_cfg, uport->membase + SE_UART_TX_PARITY_CFG);  in qcom_geni_serial_earlycon_setup()
1515 	writel(rx_trans_cfg, uport->membase + SE_UART_RX_TRANS_CFG);  in qcom_geni_serial_earlycon_setup()
1516 	writel(rx_parity_cfg, uport->membase + SE_UART_RX_PARITY_CFG);  in qcom_geni_serial_earlycon_setup()
1517 	writel(bits_per_char, uport->membase + SE_UART_TX_WORD_LEN);  in qcom_geni_serial_earlycon_setup()
1518 	writel(bits_per_char, uport->membase + SE_UART_RX_WORD_LEN);  in qcom_geni_serial_earlycon_setup()
1519 	writel(stop_bit_len, uport->membase + SE_UART_TX_STOP_BIT_LEN);  in qcom_geni_serial_earlycon_setup()