Lines Matching +full:uart +full:- +full:w +full:- +full:state
1 /* SPDX-License-Identifier: GPL-2.0+ */
49 dev_dbg(pdev->dev, fmt, ##__VA_ARGS__); \
76 /* Board State Definitions */
94 #define JSM_VERSION "jsm: 1.2-1-INKERNEL"
95 #define JSM_PARTNUM "40002438_A-INKERNEL"
122 * Per-board information
126 int boardnum; /* Board number: 0-32 */
148 u32 bd_uart_offset; /* Space between each UART */
168 #define CH_OPENING 0x0080 /* Port in fragile open state */
169 #define CH_CLOSING 0x0100 /* Port in fragile close state */
178 #define RQUEUEMASK 0x1FFF /* 8 K - 1 */
179 #define EQUEUEMASK 0x1FFF /* 8 K - 1 */
210 /* Pointers to the "mapped" UART structs */
216 u8 *ch_rqueue; /* Our read queue buffer - malloc'ed */
220 u8 *ch_equeue; /* Our error queue buffer - malloc'ed */
246 * Per channel/port Classic UART structures *
250 * W = read write R = read only *
255 u8 txrx; /* WR RHR/THR - Holding Reg */
256 u8 ier; /* WR IER - Interrupt Enable Reg */
257 u8 isr_fcr; /* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg*/
258 u8 lcr; /* WR LCR - Line Control Reg */
259 u8 mcr; /* WR MCR - Modem Control Reg */
260 u8 lsr; /* WR LSR - Line Status Reg */
261 u8 msr; /* WR MSR - Modem Status Reg */
262 u8 spr; /* WR SPR - Scratch Pad Reg */
280 #define UART_IIR_CTSRTS 0x20 /* Received CTS/RTS change of state */
301 * Per channel/port NEO UART structure *
305 * W = read write R = read only *
310 u8 txrx; /* WR RHR/THR - Holding Reg */
311 u8 ier; /* WR IER - Interrupt Enable Reg */
312 u8 isr_fcr; /* WR ISR/FCR - Interrupt Status Reg/Fifo Control Reg */
313 u8 lcr; /* WR LCR - Line Control Reg */
314 u8 mcr; /* WR MCR - Modem Control Reg */
315 u8 lsr; /* WR LSR - Line Status Reg */
316 u8 msr; /* WR MSR - Modem Status Reg */
317 u8 spr; /* WR SPR - Scratch Pad Reg */
318 u8 fctr; /* WR FCTR - Feature Control Reg */
319 u8 efr; /* WR EFR - Enhanced Function Reg */
320 u8 tfifo; /* WR TXCNT/TXTRG - Transmit FIFO Reg */
321 u8 rfifo; /* WR RXCNT/RXTRG - Receive FIFO Reg */
322 u8 xoffchar1; /* WR XOFF 1 - XOff Character 1 Reg */
323 u8 xoffchar2; /* WR XOFF 2 - XOff Character 2 Reg */
324 u8 xonchar1; /* WR XON 1 - Xon Character 1 Reg */
325 u8 xonchar2; /* WR XON 2 - XOn Character 2 Reg */
327 u8 reserved1[0x2ff - 0x200]; /* U Reserved by Exar */
329 u8 reserved2[0x37f - 0x340]; /* U Reserved by Exar */
376 #define UART_17158_IIR_HWFLOW_STATE_CHANGE 0x20 /* CTS/DSR or RTS/DTR state change */
381 * back to us from the UART's 32bit interrupt register
386 #define UART_17158_MSR 0x4 /* Modem State Change */
388 #define UART_17158_RX_FIFO_DATA_ERROR 0x80 /* UART detected an RX FIFO Data error */
408 #define PCI_DEVICE_NEO_2DB9_PCI_NAME "Neo 2 - DB9 Universal PCI"
409 #define PCI_DEVICE_NEO_2DB9PRI_PCI_NAME "Neo 2 - DB9 Universal PCI - Powered Ring Indicator"
410 #define PCI_DEVICE_NEO_2RJ45_PCI_NAME "Neo 2 - RJ45 Universal PCI"
411 #define PCI_DEVICE_NEO_2RJ45PRI_PCI_NAME "Neo 2 - RJ45 Universal PCI - Powered Ring Indicator"
412 #define PCIE_DEVICE_NEO_IBM_PCI_NAME "Neo 4 - PCI Express - IBM"
424 * Prototypes for non-static functions used in more than one module