47 #define USR2  0x98 /* Status Register 2 */  macro
350 	 * all FIFOs and register USR1, USR2, UBIR, UBMR, UBRC, URXD, UTXD  in imx_uart_soft_reset()
353 	 * We don't need to restore the old values from USR1, USR2, URXD and  in imx_uart_soft_reset()
414 	u32 ucr1, ucr4, usr2;  in imx_uart_stop_tx()  local
430 	usr2 = imx_uart_readl(sport, USR2);  in imx_uart_stop_tx()
431 	if ((!(usr2 & USR2_TXDC)) && (ucr4 & UCR4_TCEN)) {  in imx_uart_stop_tx()
828 static void imx_uart_check_flood(struct imx_port *sport, u32 usr2)  in imx_uart_check_flood()  argument
853 	if (usr2 & USR2_WAKE) {  in imx_uart_check_flood()
854 		imx_uart_writel(sport, USR2_WAKE, USR2);  in imx_uart_check_flood()
867 	u32 usr2, rx;  in __imx_uart_rxint()  local
870 	usr2 = imx_uart_readl(sport, USR2);  in __imx_uart_rxint()
871 	if (usr2 & USR2_RDR)  in __imx_uart_rxint()
872 		imx_uart_check_flood(sport, usr2);  in __imx_uart_rxint()
946 	unsigned usr2 = imx_uart_readl(sport, USR2);  in imx_uart_get_hwmctrl()  local
952 	if (!(usr2 & USR2_DCDIN))  in imx_uart_get_hwmctrl()
956 		if (!(imx_uart_readl(sport, USR2) & USR2_RIIN))  in imx_uart_get_hwmctrl()
994 	unsigned int usr1, usr2, ucr1, ucr2, ucr3, ucr4;  in imx_uart_int()  local
1000 	usr2 = imx_uart_readl(sport, USR2);  in imx_uart_int()
1021 		usr2 &= ~USR2_TXDC;  in imx_uart_int()
1029 		usr2 &= ~USR2_ORE;  in imx_uart_int()
1038 	if ((usr1 & USR1_TRDY) || (usr2 & USR2_TXDC)) {  in imx_uart_int()
1061 	if (usr2 & USR2_ORE) {  in imx_uart_int()
1063 		imx_uart_writel(sport, USR2_ORE, USR2);  in imx_uart_int()
1080 	ret = (imx_uart_readl(sport, USR2) & USR2_TXDC) ?  TIOCSER_TEMT : 0;  in imx_uart_tx_empty()
1236 		imx_uart_check_flood(sport, imx_uart_readl(sport, USR2));  in imx_uart_dma_rx_callback()
1309 	u32 usr1, usr2;  in imx_uart_clear_rx_errors()  local
1312 	usr2 = imx_uart_readl(sport, USR2);  in imx_uart_clear_rx_errors()
1314 	if (usr2 & USR2_BRCD) {  in imx_uart_clear_rx_errors()
1316 		imx_uart_writel(sport, USR2_BRCD, USR2);  in imx_uart_clear_rx_errors()
1331 	if (usr2 & USR2_ORE) {  in imx_uart_clear_rx_errors()
1333 		imx_uart_writel(sport, USR2_ORE, USR2);  in imx_uart_clear_rx_errors()
1513 	imx_uart_writel(sport, USR2_ORE, USR2);  in imx_uart_startup()
1989 	if (!(imx_uart_readl(sport, USR2) & USR2_RDR))  in imx_uart_poll_get_char()
2010 		status = imx_uart_readl(sport, USR2);  in imx_uart_poll_put_char()
2108 	unsigned int ucr1, usr2;  in imx_uart_console_write_atomic()  local
2136 	read_poll_timeout_atomic(imx_uart_readl, usr2, usr2 & USR2_TXDC,  in imx_uart_console_write_atomic()
2137 				 0, USEC_PER_SEC, false, sport, USR2);  in imx_uart_console_write_atomic()
2149 	unsigned int ucr1, usr2;  in imx_uart_console_write_thread()  local
2202 	read_poll_timeout(imx_uart_readl, usr2, usr2 & USR2_TXDC,  in imx_uart_console_write_thread()
2203 			  0, USEC_PER_SEC, false, sport, USR2);  in imx_uart_console_write_thread()