Lines Matching full:membase
388 return readl(port->membase + off); in lpuart32_read()
390 return ioread32be(port->membase + off); in lpuart32_read()
401 writel(val, port->membase + off); in lpuart32_write()
404 iowrite32be(val, port->membase + off); in lpuart32_write()
446 temp = readb(port->membase + UARTCR2); in lpuart_stop_tx()
448 writeb(temp, port->membase + UARTCR2); in lpuart_stop_tx()
464 temp = readb(port->membase + UARTCR2); in lpuart_stop_rx()
465 writeb(temp & ~UARTCR2_RE, port->membase + UARTCR2); in lpuart_stop_rx()
618 val = readb(port->membase + UARTCFIFO); in lpuart_flush_buffer()
620 writeb(val, port->membase + UARTCFIFO); in lpuart_flush_buffer()
627 while (!(readb(port->membase + offset) & bit)) in lpuart_wait_bit_set()
649 writeb(0, port->membase + UARTCR2); in lpuart_poll_init()
651 temp = readb(port->membase + UARTPFIFO); in lpuart_poll_init()
654 port->membase + UARTPFIFO); in lpuart_poll_init()
658 port->membase + UARTCFIFO); in lpuart_poll_init()
661 if (readb(port->membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_poll_init()
662 readb(port->membase + UARTDR); in lpuart_poll_init()
663 writeb(UARTSFIFO_RXUF, port->membase + UARTSFIFO); in lpuart_poll_init()
666 writeb(0, port->membase + UARTTWFIFO); in lpuart_poll_init()
667 writeb(1, port->membase + UARTRWFIFO); in lpuart_poll_init()
670 writeb(UARTCR2_RE | UARTCR2_TE, port->membase + UARTCR2); in lpuart_poll_init()
680 writeb(c, port->membase + UARTDR); in lpuart_poll_put_char()
685 if (!(readb(port->membase + UARTSR1) & UARTSR1_RDRF)) in lpuart_poll_get_char()
688 return readb(port->membase + UARTDR); in lpuart_poll_get_char()
745 readb(port->membase + UARTTCFIFO) < sport->txfifo_size, in lpuart_transmit_buffer()
746 writeb(ch, port->membase + UARTDR)); in lpuart_transmit_buffer()
791 temp = readb(port->membase + UARTCR2); in lpuart_start_tx()
792 writeb(temp | UARTCR2_TIE, port->membase + UARTCR2); in lpuart_start_tx()
798 if (readb(port->membase + UARTSR1) & UARTSR1_TDRE) in lpuart_start_tx()
839 u8 sr1 = readb(port->membase + UARTSR1); in lpuart_tx_empty()
840 u8 sfifo = readb(port->membase + UARTSFIFO); in lpuart_tx_empty()
888 while (!(readb(sport->port.membase + UARTSFIFO) & UARTSFIFO_RXEMPT)) { in lpuart_rxint()
895 sr = readb(sport->port.membase + UARTSR1); in lpuart_rxint()
896 rx = readb(sport->port.membase + UARTDR); in lpuart_rxint()
941 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_rxint()
942 writeb(UARTSFIFO_RXOF, sport->port.membase + UARTSFIFO); in lpuart_rxint()
1041 sts = readb(sport->port.membase + UARTSR1); in lpuart_int()
1045 readb(sport->port.membase + UARTDR); in lpuart_int()
1048 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_int()
1125 u8 sr = readb(sport->port.membase + UARTSR1); in lpuart_copy_rx_to_tty()
1131 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1133 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1136 readb(sport->port.membase + UARTDR); in lpuart_copy_rx_to_tty()
1151 if (readb(sport->port.membase + UARTSFIFO) & in lpuart_copy_rx_to_tty()
1154 sport->port.membase + UARTSFIFO); in lpuart_copy_rx_to_tty()
1156 sport->port.membase + UARTCFIFO); in lpuart_copy_rx_to_tty()
1160 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1421 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_RDMAS, in lpuart_start_rx_dma()
1422 sport->port.membase + UARTCR5); in lpuart_start_rx_dma()
1449 u8 modem = readb(port->membase + UARTMODEM) & in lpuart_config_rs485()
1451 writeb(modem, port->membase + UARTMODEM); in lpuart_config_rs485()
1469 writeb(modem, port->membase + UARTMODEM); in lpuart_config_rs485()
1522 reg = readb(port->membase + UARTCR1); in lpuart_get_mctrl()
1545 reg = readb(port->membase + UARTCR1); in lpuart_set_mctrl()
1552 writeb(reg, port->membase + UARTCR1); in lpuart_set_mctrl()
1573 temp = readb(port->membase + UARTCR2) & ~UARTCR2_SBK; in lpuart_break_ctl()
1578 writeb(temp, port->membase + UARTCR2); in lpuart_break_ctl()
1619 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1623 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1625 val = readb(sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1627 sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1631 sport->port.membase + UARTCFIFO); in lpuart_setup_watermark()
1634 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_setup_watermark()
1635 readb(sport->port.membase + UARTDR); in lpuart_setup_watermark()
1636 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_setup_watermark()
1641 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_setup_watermark()
1642 writeb(sport->rx_watermark, sport->port.membase + UARTRWFIFO); in lpuart_setup_watermark()
1645 writeb(cr2_saved, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1654 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1656 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1757 writeb(readb(sport->port.membase + UARTCR5) | in lpuart_tx_dma_startup()
1758 UARTCR5_TDMAS, sport->port.membase + UARTCR5); in lpuart_tx_dma_startup()
1792 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1794 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1823 temp = readb(port->membase + UARTPFIFO); in lpuart_startup()
1940 temp = readb(port->membase + UARTCR2); in lpuart_shutdown()
1943 writeb(temp, port->membase + UARTCR2); in lpuart_shutdown()
1995 cr1 = old_cr1 = readb(port->membase + UARTCR1); in lpuart_set_termios()
1996 old_cr2 = readb(port->membase + UARTCR2); in lpuart_set_termios()
1997 cr3 = readb(port->membase + UARTCR3); in lpuart_set_termios()
1998 cr4 = readb(port->membase + UARTCR4); in lpuart_set_termios()
1999 bdh = readb(port->membase + UARTBDH); in lpuart_set_termios()
2000 modem = readb(port->membase + UARTMODEM); in lpuart_set_termios()
2109 port->membase + UARTCR2); in lpuart_set_termios()
2117 writeb(cr4 | brfa, port->membase + UARTCR4); in lpuart_set_termios()
2118 writeb(bdh, port->membase + UARTBDH); in lpuart_set_termios()
2119 writeb(sbr & 0xFF, port->membase + UARTBDL); in lpuart_set_termios()
2120 writeb(cr3, port->membase + UARTCR3); in lpuart_set_termios()
2121 writeb(cr1, port->membase + UARTCR1); in lpuart_set_termios()
2122 writeb(modem, port->membase + UARTMODEM); in lpuart_set_termios()
2125 writeb(old_cr2, port->membase + UARTCR2); in lpuart_set_termios()
2484 writeb(ch, port->membase + UARTDR); in lpuart_console_putchar()
2507 cr2 = old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_console_write()
2510 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2517 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2564 cr = readb(sport->port.membase + UARTCR2); in lpuart_console_get_options()
2571 cr = readb(sport->port.membase + UARTCR1); in lpuart_console_get_options()
2586 bdh = readb(sport->port.membase + UARTBDH); in lpuart_console_get_options()
2588 bdl = readb(sport->port.membase + UARTBDL); in lpuart_console_get_options()
2592 brfa = readb(sport->port.membase + UARTCR4); in lpuart_console_get_options()
2726 if (!device->port.membase) in lpuart_early_console_setup()
2736 if (!device->port.membase) in lpuart32_early_console_setup()
2751 if (!device->port.membase) in ls1028a_early_console_setup()
2773 if (!device->port.membase) in lpuart32_imx_early_console_setup()
2777 device->port.membase += IMX_REG_OFF; in lpuart32_imx_early_console_setup()
2843 global_addr = port->membase + UART_GLOBAL - IMX_REG_OFF; in lpuart_global_reset()
2873 sport->port.membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in lpuart_probe()
2874 if (IS_ERR(sport->port.membase)) in lpuart_probe()
2875 return PTR_ERR(sport->port.membase); in lpuart_probe()
2877 sport->port.membase += sdata->reg_off; in lpuart_probe()
3041 val = readb(sport->port.membase + UARTCR2); in serial_lpuart_enable_wakeup()
3046 writeb(val, sport->port.membase + UARTCR2); in serial_lpuart_enable_wakeup()
3121 temp = readb(sport->port.membase + UARTCR2); in lpuart_suspend()
3123 writeb(temp, sport->port.membase + UARTCR2); in lpuart_suspend()
3144 writeb(readb(sport->port.membase + UARTCR5) & in lpuart_suspend()
3145 ~UARTCR5_RDMAS, sport->port.membase + UARTCR5); in lpuart_suspend()
3157 temp = readb(sport->port.membase + UARTCR5); in lpuart_suspend()
3159 writeb(temp, sport->port.membase + UARTCR5); in lpuart_suspend()