Lines Matching +full:up +full:- +full:to
1 // SPDX-License-Identifier: GPL-2.0+
3 * Base port operations for 8250/16550-type serial ports
244 * tx_loadsz is set to 63-bytes instead of 64-bytes to implement
245 * workaround of errata A-008006 which states that tx_loadsz should
257 .name = "Palmchip BK-3103",
325 static u32 default_serial_dl_read(struct uart_8250_port *up) in default_serial_dl_read() argument
327 /* Assign these in pieces to truncate any bits above 7. */ in default_serial_dl_read()
328 unsigned char dll = serial_in(up, UART_DLL); in default_serial_dl_read()
329 unsigned char dlm = serial_in(up, UART_DLM); in default_serial_dl_read()
335 static void default_serial_dl_write(struct uart_8250_port *up, u32 value) in default_serial_dl_write() argument
337 serial_out(up, UART_DLL, value & 0xff); in default_serial_dl_write()
338 serial_out(up, UART_DLM, value >> 8 & 0xff); in default_serial_dl_write()
344 offset = offset << p->regshift; in hub6_serial_in()
345 outb(p->hub6 - 1 + offset, p->iobase); in hub6_serial_in()
346 return inb(p->iobase + 1); in hub6_serial_in()
351 offset = offset << p->regshift; in hub6_serial_out()
352 outb(p->hub6 - 1 + offset, p->iobase); in hub6_serial_out()
353 outb(value, p->iobase + 1); in hub6_serial_out()
359 offset = offset << p->regshift; in mem_serial_in()
360 return readb(p->membase + offset); in mem_serial_in()
365 offset = offset << p->regshift; in mem_serial_out()
366 writeb(value, p->membase + offset); in mem_serial_out()
371 offset = offset << p->regshift; in mem16_serial_out()
372 writew(value, p->membase + offset); in mem16_serial_out()
377 offset = offset << p->regshift; in mem16_serial_in()
378 return readw(p->membase + offset); in mem16_serial_in()
383 offset = offset << p->regshift; in mem32_serial_out()
384 writel(value, p->membase + offset); in mem32_serial_out()
389 offset = offset << p->regshift; in mem32_serial_in()
390 return readl(p->membase + offset); in mem32_serial_in()
395 offset = offset << p->regshift; in mem32be_serial_out()
396 iowrite32be(value, p->membase + offset); in mem32be_serial_out()
401 offset = offset << p->regshift; in mem32be_serial_in()
402 return ioread32be(p->membase + offset); in mem32be_serial_in()
408 offset = offset << p->regshift; in io_serial_in()
409 return inb(p->iobase + offset); in io_serial_in()
414 offset = offset << p->regshift; in io_serial_out()
415 outb(value, p->iobase + offset); in io_serial_out()
420 return (unsigned int)-1; in no_serial_in()
431 struct uart_8250_port *up = up_to_u8250p(p); in set_io_from_upio() local
433 up->dl_read = default_serial_dl_read; in set_io_from_upio()
434 up->dl_write = default_serial_dl_write; in set_io_from_upio()
436 switch (p->iotype) { in set_io_from_upio()
439 p->serial_in = hub6_serial_in; in set_io_from_upio()
440 p->serial_out = hub6_serial_out; in set_io_from_upio()
445 p->serial_in = mem_serial_in; in set_io_from_upio()
446 p->serial_out = mem_serial_out; in set_io_from_upio()
450 p->serial_in = mem16_serial_in; in set_io_from_upio()
451 p->serial_out = mem16_serial_out; in set_io_from_upio()
455 p->serial_in = mem32_serial_in; in set_io_from_upio()
456 p->serial_out = mem32_serial_out; in set_io_from_upio()
460 p->serial_in = mem32be_serial_in; in set_io_from_upio()
461 p->serial_out = mem32be_serial_out; in set_io_from_upio()
465 p->serial_in = io_serial_in; in set_io_from_upio()
466 p->serial_out = io_serial_out; in set_io_from_upio()
470 WARN(p->iotype != UPIO_PORT || p->iobase, in set_io_from_upio()
471 "Unsupported UART type %x\n", p->iotype); in set_io_from_upio()
472 p->serial_in = no_serial_in; in set_io_from_upio()
473 p->serial_out = no_serial_out; in set_io_from_upio()
476 up->cur_iotype = p->iotype; in set_io_from_upio()
477 p->handle_irq = serial8250_default_handle_irq; in set_io_from_upio()
483 switch (p->iotype) { in serial_port_out_sync()
489 p->serial_out(p, offset, value); in serial_port_out_sync()
490 p->serial_in(p, UART_LCR); /* safe, no side-effects */ in serial_port_out_sync()
493 p->serial_out(p, offset, value); in serial_port_out_sync()
502 if (p->capabilities & UART_CAP_FIFO) { in serial8250_clear_fifos()
516 serial_out(p, UART_FCR, p->fcr); in serial8250_clear_and_reinit_fifos()
522 if (!(p->capabilities & UART_CAP_RPM)) in serial8250_rpm_get()
524 pm_runtime_get_sync(p->port.dev); in serial8250_rpm_get()
530 if (!(p->capabilities & UART_CAP_RPM)) in serial8250_rpm_put()
532 pm_runtime_mark_last_busy(p->port.dev); in serial8250_rpm_put()
533 pm_runtime_put_autosuspend(p->port.dev); in serial8250_rpm_put()
538 * serial8250_em485_init() - put uart_8250_port into rs485 emulating
541 * The function is used to start rs485 software emulating on the
543 * transmission. The function is idempotent, so it is safe to call it
550 * The function is supposed to be called from .rs485_config callback
551 * or from any other callback protected with p->port.lock spinlock.
555 * Return 0 - success, -errno - otherwise
559 /* Port locked to synchronize UART_IER access against the console. */ in serial8250_em485_init()
560 lockdep_assert_held_once(&p->port.lock); in serial8250_em485_init()
562 if (p->em485) in serial8250_em485_init()
565 p->em485 = kmalloc(sizeof(struct uart_8250_em485), GFP_ATOMIC); in serial8250_em485_init()
566 if (!p->em485) in serial8250_em485_init()
567 return -ENOMEM; in serial8250_em485_init()
569 hrtimer_init(&p->em485->stop_tx_timer, CLOCK_MONOTONIC, in serial8250_em485_init()
571 hrtimer_init(&p->em485->start_tx_timer, CLOCK_MONOTONIC, in serial8250_em485_init()
573 p->em485->stop_tx_timer.function = &serial8250_em485_handle_stop_tx; in serial8250_em485_init()
574 p->em485->start_tx_timer.function = &serial8250_em485_handle_start_tx; in serial8250_em485_init()
575 p->em485->port = p; in serial8250_em485_init()
576 p->em485->active_timer = NULL; in serial8250_em485_init()
577 p->em485->tx_stopped = true; in serial8250_em485_init()
580 if (p->em485->tx_stopped) in serial8250_em485_init()
581 p->rs485_stop_tx(p, true); in serial8250_em485_init()
587 * serial8250_em485_destroy() - put uart_8250_port into normal state
590 * The function is used to stop rs485 software emulating on the
591 * &struct uart_8250_port* @p. The function is idempotent, so it is safe to
594 * The function is supposed to be called from .rs485_config callback
595 * or from any other callback protected with p->port.lock spinlock.
601 if (!p->em485) in serial8250_em485_destroy()
604 hrtimer_cancel(&p->em485->start_tx_timer); in serial8250_em485_destroy()
605 hrtimer_cancel(&p->em485->stop_tx_timer); in serial8250_em485_destroy()
607 kfree(p->em485); in serial8250_em485_destroy()
608 p->em485 = NULL; in serial8250_em485_destroy()
621 * serial8250_em485_config() - generic ->rs485_config() callback
626 * Generic callback usable by 8250 uart drivers to activate rs485 settings
633 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_em485_config() local
639 if (rs485->flags & SER_RS485_ENABLED) in serial8250_em485_config()
640 return serial8250_em485_init(up); in serial8250_em485_config()
642 serial8250_em485_destroy(up); in serial8250_em485_config()
656 if (!(p->capabilities & UART_CAP_RPM)) in serial8250_rpm_get_tx()
659 rpm_active = xchg(&p->rpm_tx_active, 1); in serial8250_rpm_get_tx()
662 pm_runtime_get_sync(p->port.dev); in serial8250_rpm_get_tx()
670 if (!(p->capabilities & UART_CAP_RPM)) in serial8250_rpm_put_tx()
673 rpm_active = xchg(&p->rpm_tx_active, 0); in serial8250_rpm_put_tx()
676 pm_runtime_mark_last_busy(p->port.dev); in serial8250_rpm_put_tx()
677 pm_runtime_put_autosuspend(p->port.dev); in serial8250_rpm_put_tx()
683 * capability" bit enabled. Note that on XR16C850s, we need to
684 * reset LCR to write to IER.
692 if (p->capabilities & UART_CAP_SLEEP) { in serial8250_set_sleep()
694 uart_port_lock_irq(&p->port); in serial8250_set_sleep()
695 if (p->capabilities & UART_CAP_EFR) { in serial8250_set_sleep()
703 if (p->capabilities & UART_CAP_EFR) { in serial8250_set_sleep()
708 uart_port_unlock_irq(&p->port); in serial8250_set_sleep()
714 static void serial8250_clear_IER(struct uart_8250_port *up) in serial8250_clear_IER() argument
716 if (up->capabilities & UART_CAP_UUE) in serial8250_clear_IER()
717 serial_out(up, UART_IER, UART_IER_UUE); in serial8250_clear_IER()
719 serial_out(up, UART_IER, 0); in serial8250_clear_IER()
724 * Attempts to turn on the RSA FIFO. Returns zero on failure.
727 static int __enable_rsa(struct uart_8250_port *up) in __enable_rsa() argument
732 mode = serial_in(up, UART_RSA_MSR); in __enable_rsa()
736 serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO); in __enable_rsa()
737 mode = serial_in(up, UART_RSA_MSR); in __enable_rsa()
742 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16; in __enable_rsa()
747 static void enable_rsa(struct uart_8250_port *up) in enable_rsa() argument
749 if (up->port.type == PORT_RSA) { in enable_rsa()
750 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) { in enable_rsa()
751 uart_port_lock_irq(&up->port); in enable_rsa()
752 __enable_rsa(up); in enable_rsa()
753 uart_port_unlock_irq(&up->port); in enable_rsa()
755 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) in enable_rsa()
756 serial_out(up, UART_RSA_FRR, 0); in enable_rsa()
761 * Attempts to turn off the RSA FIFO. Returns zero on failure.
763 * the caller is expected to preserve this behaviour by grabbing
766 static void disable_rsa(struct uart_8250_port *up) in disable_rsa() argument
771 if (up->port.type == PORT_RSA && in disable_rsa()
772 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) { in disable_rsa()
773 uart_port_lock_irq(&up->port); in disable_rsa()
775 mode = serial_in(up, UART_RSA_MSR); in disable_rsa()
779 serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO); in disable_rsa()
780 mode = serial_in(up, UART_RSA_MSR); in disable_rsa()
785 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16; in disable_rsa()
786 uart_port_unlock_irq(&up->port); in disable_rsa()
792 * This is a quickie test to see how big the FIFO is.
795 static int size_fifo(struct uart_8250_port *up) in size_fifo() argument
801 old_lcr = serial_in(up, UART_LCR); in size_fifo()
802 serial_out(up, UART_LCR, 0); in size_fifo()
803 old_fcr = serial_in(up, UART_FCR); in size_fifo()
804 old_mcr = serial8250_in_MCR(up); in size_fifo()
805 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | in size_fifo()
807 serial8250_out_MCR(up, UART_MCR_LOOP); in size_fifo()
808 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in size_fifo()
809 old_dl = serial_dl_read(up); in size_fifo()
810 serial_dl_write(up, 0x0001); in size_fifo()
811 serial_out(up, UART_LCR, UART_LCR_WLEN8); in size_fifo()
813 serial_out(up, UART_TX, count); in size_fifo()
814 mdelay(20);/* FIXME - schedule_timeout */ in size_fifo()
815 for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) && in size_fifo()
817 serial_in(up, UART_RX); in size_fifo()
818 serial_out(up, UART_FCR, old_fcr); in size_fifo()
819 serial8250_out_MCR(up, old_mcr); in size_fifo()
820 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in size_fifo()
821 serial_dl_write(up, old_dl); in size_fifo()
822 serial_out(up, UART_LCR, old_lcr); in size_fifo()
828 * Read UART ID using the divisor method - set DLL and DLM to zero
850 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
854 * 16550, and why not? Startech doesn't seem to even acknowledge its
859 static void autoconfig_has_efr(struct uart_8250_port *up) in autoconfig_has_efr() argument
866 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP; in autoconfig_has_efr()
869 * First we check to see if it's an Oxford Semiconductor UART. in autoconfig_has_efr()
871 * If we have to do this here because some non-National in autoconfig_has_efr()
872 * Semiconductor clone chips lock up if you try writing to the in autoconfig_has_efr()
885 up->acr = 0; in autoconfig_has_efr()
886 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in autoconfig_has_efr()
887 serial_out(up, UART_EFR, UART_EFR_ECB); in autoconfig_has_efr()
888 serial_out(up, UART_LCR, 0x00); in autoconfig_has_efr()
889 id1 = serial_icr_read(up, UART_ID1); in autoconfig_has_efr()
890 id2 = serial_icr_read(up, UART_ID2); in autoconfig_has_efr()
891 id3 = serial_icr_read(up, UART_ID3); in autoconfig_has_efr()
892 rev = serial_icr_read(up, UART_REV); in autoconfig_has_efr()
898 up->port.type = PORT_16C950; in autoconfig_has_efr()
902 * chip which causes it to seriously miscalculate baud rates in autoconfig_has_efr()
906 up->bugs |= UART_BUG_QUOT; in autoconfig_has_efr()
911 * We check for a XR16C850 by setting DLL and DLM to 0, and then in autoconfig_has_efr()
914 * 0x10 - XR16C850 and the DLL contains the chip revision. in autoconfig_has_efr()
915 * 0x12 - XR16C2850. in autoconfig_has_efr()
916 * 0x14 - XR16C854. in autoconfig_has_efr()
918 id1 = autoconfig_read_divisor_id(up); in autoconfig_has_efr()
923 up->port.type = PORT_16850; in autoconfig_has_efr()
932 * since that's the technique that was sent to me in the in autoconfig_has_efr()
934 * I've had problems doing this in the past. -TYT in autoconfig_has_efr()
936 if (size_fifo(up) == 64) in autoconfig_has_efr()
937 up->port.type = PORT_16654; in autoconfig_has_efr()
939 up->port.type = PORT_16650V2; in autoconfig_has_efr()
944 * this category - the original 8250 and the 16450. The
947 static void autoconfig_8250(struct uart_8250_port *up) in autoconfig_8250() argument
951 up->port.type = PORT_8250; in autoconfig_8250()
953 scratch = serial_in(up, UART_SCR); in autoconfig_8250()
954 serial_out(up, UART_SCR, 0xa5); in autoconfig_8250()
955 status1 = serial_in(up, UART_SCR); in autoconfig_8250()
956 serial_out(up, UART_SCR, 0x5a); in autoconfig_8250()
957 status2 = serial_in(up, UART_SCR); in autoconfig_8250()
958 serial_out(up, UART_SCR, scratch); in autoconfig_8250()
961 up->port.type = PORT_16450; in autoconfig_8250()
964 static int broken_efr(struct uart_8250_port *up) in broken_efr() argument
969 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html in broken_efr()
971 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16) in broken_efr()
981 * EFR should contain zero. Try to read the EFR.
983 static void autoconfig_16550a(struct uart_8250_port *up) in autoconfig_16550a() argument
988 /* Port locked to synchronize UART_IER access against the console. */ in autoconfig_16550a()
989 lockdep_assert_held_once(&up->port.lock); in autoconfig_16550a()
991 up->port.type = PORT_16550A; in autoconfig_16550a()
992 up->capabilities |= UART_CAP_FIFO; in autoconfig_16550a()
995 !(up->port.flags & UPF_FULL_PROBE)) in autoconfig_16550a()
1002 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in autoconfig_16550a()
1003 if (serial_in(up, UART_EFR) == 0) { in autoconfig_16550a()
1004 serial_out(up, UART_EFR, 0xA8); in autoconfig_16550a()
1005 if (serial_in(up, UART_EFR) != 0) { in autoconfig_16550a()
1007 up->port.type = PORT_16650; in autoconfig_16550a()
1008 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP; in autoconfig_16550a()
1010 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
1011 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | in autoconfig_16550a()
1013 status1 = serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED_16750; in autoconfig_16550a()
1014 serial_out(up, UART_FCR, 0); in autoconfig_16550a()
1015 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
1018 up->port.type = PORT_16550A_FSL64; in autoconfig_16550a()
1022 serial_out(up, UART_EFR, 0); in autoconfig_16550a()
1027 * Maybe it requires 0xbf to be written to the LCR. in autoconfig_16550a()
1030 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in autoconfig_16550a()
1031 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) { in autoconfig_16550a()
1033 autoconfig_has_efr(up); in autoconfig_16550a()
1039 * Attempt to switch to bank 2, read the value of the LOOP bit in autoconfig_16550a()
1040 * from EXCR1. Switch back to bank 0, change it in MCR. Then in autoconfig_16550a()
1041 * switch back to bank 2, read it from EXCR1 again and check in autoconfig_16550a()
1042 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2 in autoconfig_16550a()
1044 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
1045 status1 = serial8250_in_MCR(up); in autoconfig_16550a()
1046 serial_out(up, UART_LCR, 0xE0); in autoconfig_16550a()
1047 status2 = serial_in(up, 0x02); /* EXCR1 */ in autoconfig_16550a()
1050 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
1051 serial8250_out_MCR(up, status1 ^ UART_MCR_LOOP); in autoconfig_16550a()
1052 serial_out(up, UART_LCR, 0xE0); in autoconfig_16550a()
1053 status2 = serial_in(up, 0x02); /* EXCR1 */ in autoconfig_16550a()
1054 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
1055 serial8250_out_MCR(up, status1); in autoconfig_16550a()
1060 serial_out(up, UART_LCR, 0xE0); in autoconfig_16550a()
1062 quot = serial_dl_read(up); in autoconfig_16550a()
1065 if (ns16550a_goto_highspeed(up)) in autoconfig_16550a()
1066 serial_dl_write(up, quot); in autoconfig_16550a()
1068 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
1070 up->port.uartclk = 921600*16; in autoconfig_16550a()
1071 up->port.type = PORT_NS16550A; in autoconfig_16550a()
1072 up->capabilities |= UART_NATSEMI; in autoconfig_16550a()
1078 * No EFR. Try to detect a TI16750, which only sets bit 5 of in autoconfig_16550a()
1083 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
1084 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); in autoconfig_16550a()
1085 status1 = serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED_16750; in autoconfig_16550a()
1086 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); in autoconfig_16550a()
1088 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); in autoconfig_16550a()
1089 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); in autoconfig_16550a()
1090 status2 = serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED_16750; in autoconfig_16550a()
1091 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); in autoconfig_16550a()
1093 serial_out(up, UART_LCR, 0); in autoconfig_16550a()
1099 up->port.type = PORT_16750; in autoconfig_16550a()
1100 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP; in autoconfig_16550a()
1108 * We're going to explicitly set the UUE bit to 0 before in autoconfig_16550a()
1109 * trying to write and read a 1 just to make sure it's not in autoconfig_16550a()
1112 iersave = serial_in(up, UART_IER); in autoconfig_16550a()
1113 serial_out(up, UART_IER, iersave & ~UART_IER_UUE); in autoconfig_16550a()
1114 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) { in autoconfig_16550a()
1119 serial_out(up, UART_IER, iersave | UART_IER_UUE); in autoconfig_16550a()
1120 if (serial_in(up, UART_IER) & UART_IER_UUE) { in autoconfig_16550a()
1123 * We'll leave the UART_IER_UUE bit set to 1 (enabled). in autoconfig_16550a()
1126 up->port.type = PORT_XSCALE; in autoconfig_16550a()
1127 up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE; in autoconfig_16550a()
1132 * If we got here we couldn't force the IER_UUE bit to 0. in autoconfig_16550a()
1135 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 "); in autoconfig_16550a()
1137 serial_out(up, UART_IER, iersave); in autoconfig_16550a()
1143 if (up->port.type == PORT_16550A && size_fifo(up) == 64) { in autoconfig_16550a()
1144 up->port.type = PORT_U6_16550A; in autoconfig_16550a()
1145 up->capabilities |= UART_CAP_AFE; in autoconfig_16550a()
1150 * This routine is called by rs_init() to initialize a specific serial
1156 static void autoconfig(struct uart_8250_port *up) in autoconfig() argument
1160 struct uart_port *port = &up->port; in autoconfig()
1164 if (!port->iobase && !port->mapbase && !port->membase) in autoconfig()
1168 port->name, port->iobase, port->membase); in autoconfig()
1171 * We really do need global IRQs disabled here - we're going to in autoconfig()
1172 * be frobbing the chips IRQ enable register to see if it exists. in autoconfig()
1178 up->capabilities = 0; in autoconfig()
1179 up->bugs = 0; in autoconfig()
1181 if (!(port->flags & UPF_BUGGY_UART)) { in autoconfig()
1186 * 0x80 is used as a nonsense port to prevent against in autoconfig()
1187 * false positives due to ISA bus float. The in autoconfig()
1188 * assumption is that 0x80 is a non-existent port; in autoconfig()
1195 scratch = serial_in(up, UART_IER); in autoconfig()
1196 serial_out(up, UART_IER, 0); in autoconfig()
1202 * 16C754B) allow only to modify them if an EFR bit is set. in autoconfig()
1204 scratch2 = serial_in(up, UART_IER) & UART_IER_ALL_INTR; in autoconfig()
1205 serial_out(up, UART_IER, UART_IER_ALL_INTR); in autoconfig()
1209 scratch3 = serial_in(up, UART_IER) & UART_IER_ALL_INTR; in autoconfig()
1210 serial_out(up, UART_IER, scratch); in autoconfig()
1222 save_mcr = serial8250_in_MCR(up); in autoconfig()
1223 save_lcr = serial_in(up, UART_LCR); in autoconfig()
1226 * Check to see if a UART is really there. Certain broken in autoconfig()
1231 * manufacturer would be stupid enough to design a board in autoconfig()
1232 * that conflicts with COM 1-4 --- we hope! in autoconfig()
1234 if (!(port->flags & UPF_SKIP_TEST)) { in autoconfig()
1235 serial8250_out_MCR(up, UART_MCR_LOOP | UART_MCR_OUT2 | UART_MCR_RTS); in autoconfig()
1236 status1 = serial_in(up, UART_MSR) & UART_MSR_STATUS_BITS; in autoconfig()
1237 serial8250_out_MCR(up, save_mcr); in autoconfig()
1248 * type of port it is. The IIR top two bits allows us to find in autoconfig()
1252 * We also initialise the EFR (if any) to zero for later. The in autoconfig()
1255 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in autoconfig()
1256 serial_out(up, UART_EFR, 0); in autoconfig()
1257 serial_out(up, UART_LCR, 0); in autoconfig()
1259 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); in autoconfig()
1261 switch (serial_in(up, UART_IIR) & UART_IIR_FIFO_ENABLED) { in autoconfig()
1263 autoconfig_8250(up); in autoconfig()
1266 port->type = PORT_16550; in autoconfig()
1269 autoconfig_16550a(up); in autoconfig()
1272 port->type = PORT_UNKNOWN; in autoconfig()
1280 if (port->type == PORT_16550A && up->probe & UART_PROBE_RSA && in autoconfig()
1281 __enable_rsa(up)) in autoconfig()
1282 port->type = PORT_RSA; in autoconfig()
1285 serial_out(up, UART_LCR, save_lcr); in autoconfig()
1287 port->fifosize = uart_config[up->port.type].fifo_size; in autoconfig()
1288 old_capabilities = up->capabilities; in autoconfig()
1289 up->capabilities = uart_config[port->type].flags; in autoconfig()
1290 up->tx_loadsz = uart_config[port->type].tx_loadsz; in autoconfig()
1292 if (port->type == PORT_UNKNOWN) in autoconfig()
1299 if (port->type == PORT_RSA) in autoconfig()
1300 serial_out(up, UART_RSA_FRR, 0); in autoconfig()
1302 serial8250_out_MCR(up, save_mcr); in autoconfig()
1303 serial8250_clear_fifos(up); in autoconfig()
1304 serial_in(up, UART_RX); in autoconfig()
1305 serial8250_clear_IER(up); in autoconfig()
1313 if (port->type == PORT_16550A && port->iotype == UPIO_PORT) in autoconfig()
1314 fintek_8250_probe(up); in autoconfig()
1316 if (up->capabilities != old_capabilities) { in autoconfig()
1317 dev_warn(port->dev, "detected caps %08x should be %08x\n", in autoconfig()
1318 old_capabilities, up->capabilities); in autoconfig()
1322 DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name); in autoconfig()
1325 static void autoconfig_irq(struct uart_8250_port *up) in autoconfig_irq() argument
1327 struct uart_port *port = &up->port; in autoconfig_irq()
1334 if (port->flags & UPF_FOURPORT) { in autoconfig_irq()
1335 ICP = (port->iobase & 0xfe0) | 0x1f; in autoconfig_irq()
1343 save_mcr = serial8250_in_MCR(up); in autoconfig_irq()
1346 save_ier = serial_in(up, UART_IER); in autoconfig_irq()
1348 serial8250_out_MCR(up, UART_MCR_OUT1 | UART_MCR_OUT2); in autoconfig_irq()
1351 serial8250_out_MCR(up, 0); in autoconfig_irq()
1353 if (port->flags & UPF_FOURPORT) { in autoconfig_irq()
1354 serial8250_out_MCR(up, UART_MCR_DTR | UART_MCR_RTS); in autoconfig_irq()
1356 serial8250_out_MCR(up, in autoconfig_irq()
1361 serial_out(up, UART_IER, UART_IER_ALL_INTR); in autoconfig_irq()
1363 serial_in(up, UART_LSR); in autoconfig_irq()
1364 serial_in(up, UART_RX); in autoconfig_irq()
1365 serial_in(up, UART_IIR); in autoconfig_irq()
1366 serial_in(up, UART_MSR); in autoconfig_irq()
1367 serial_out(up, UART_TX, 0xFF); in autoconfig_irq()
1371 serial8250_out_MCR(up, save_mcr); in autoconfig_irq()
1374 serial_out(up, UART_IER, save_ier); in autoconfig_irq()
1377 if (port->flags & UPF_FOURPORT) in autoconfig_irq()
1380 port->irq = (irq > 0) ? irq : 0; in autoconfig_irq()
1385 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_stop_rx() local
1387 /* Port locked to synchronize UART_IER access against the console. */ in serial8250_stop_rx()
1388 lockdep_assert_held_once(&port->lock); in serial8250_stop_rx()
1390 serial8250_rpm_get(up); in serial8250_stop_rx()
1392 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); in serial8250_stop_rx()
1393 serial_port_out(port, UART_IER, up->ier); in serial8250_stop_rx()
1395 serial8250_rpm_put(up); in serial8250_stop_rx()
1399 * serial8250_em485_stop_tx() - generic ->rs485_stop_tx() callback
1401 * @toggle_ier: true to allow enabling receive interrupts
1403 * Generic callback usable by 8250 uart drivers to stop rs485 transmission.
1409 /* Port locked to synchronize UART_IER access against the console. */ in serial8250_em485_stop_tx()
1410 lockdep_assert_held_once(&p->port.lock); in serial8250_em485_stop_tx()
1412 if (p->port.rs485.flags & SER_RS485_RTS_AFTER_SEND) in serial8250_em485_stop_tx()
1420 * received during the half-duplex transmission. in serial8250_em485_stop_tx()
1423 if (!(p->port.rs485.flags & SER_RS485_RX_DURING_TX)) { in serial8250_em485_stop_tx()
1427 p->ier |= UART_IER_RLSI | UART_IER_RDI; in serial8250_em485_stop_tx()
1428 serial_port_out(&p->port, UART_IER, p->ier); in serial8250_em485_stop_tx()
1438 struct uart_8250_port *p = em485->port; in serial8250_em485_handle_stop_tx()
1442 uart_port_lock_irqsave(&p->port, &flags); in serial8250_em485_handle_stop_tx()
1443 if (em485->active_timer == &em485->stop_tx_timer) { in serial8250_em485_handle_stop_tx()
1444 p->rs485_stop_tx(p, true); in serial8250_em485_handle_stop_tx()
1445 em485->active_timer = NULL; in serial8250_em485_handle_stop_tx()
1446 em485->tx_stopped = true; in serial8250_em485_handle_stop_tx()
1448 uart_port_unlock_irqrestore(&p->port, flags); in serial8250_em485_handle_stop_tx()
1461 struct uart_8250_em485 *em485 = p->em485; in __stop_tx_rs485()
1463 /* Port locked to synchronize UART_IER access against the console. */ in __stop_tx_rs485()
1464 lockdep_assert_held_once(&p->port.lock); in __stop_tx_rs485()
1466 stop_delay += (u64)p->port.rs485.delay_rts_after_send * NSEC_PER_MSEC; in __stop_tx_rs485()
1469 * rs485_stop_tx() is going to set RTS according to config in __stop_tx_rs485()
1473 em485->active_timer = &em485->stop_tx_timer; in __stop_tx_rs485()
1474 hrtimer_start(&em485->stop_tx_timer, ns_to_ktime(stop_delay), HRTIMER_MODE_REL); in __stop_tx_rs485()
1476 p->rs485_stop_tx(p, true); in __stop_tx_rs485()
1477 em485->active_timer = NULL; in __stop_tx_rs485()
1478 em485->tx_stopped = true; in __stop_tx_rs485()
1484 struct uart_8250_em485 *em485 = p->em485; in __stop_tx()
1493 * To provide required timing and allow FIFO transfer, in __stop_tx()
1497 * enlarge stop_tx_timer by the tx time of one frame to cover in __stop_tx()
1501 if (!(p->capabilities & UART_CAP_NOTEMT)) in __stop_tx()
1505 * frame timing formula. It seems to suggest THRE might in __stop_tx()
1510 stop_delay = p->port.frame_time + DIV_ROUND_UP(p->port.frame_time, 7); in __stop_tx()
1522 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_stop_tx() local
1524 serial8250_rpm_get(up); in serial8250_stop_tx()
1525 __stop_tx(up); in serial8250_stop_tx()
1528 * We really want to stop the transmitter from sending. in serial8250_stop_tx()
1530 if (port->type == PORT_16C950) { in serial8250_stop_tx()
1531 up->acr |= UART_ACR_TXDIS; in serial8250_stop_tx()
1532 serial_icr_write(up, UART_ACR, up->acr); in serial8250_stop_tx()
1534 serial8250_rpm_put(up); in serial8250_stop_tx()
1539 struct uart_8250_port *up = up_to_u8250p(port); in __start_tx() local
1541 if (up->dma && !up->dma->tx_dma(up)) in __start_tx()
1544 if (serial8250_set_THRI(up)) { in __start_tx()
1545 if (up->bugs & UART_BUG_TXEN) { in __start_tx()
1546 u16 lsr = serial_lsr_in(up); in __start_tx()
1549 serial8250_tx_chars(up); in __start_tx()
1554 * Re-enable the transmitter if we disabled it. in __start_tx()
1556 if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) { in __start_tx()
1557 up->acr &= ~UART_ACR_TXDIS; in __start_tx()
1558 serial_icr_write(up, UART_ACR, up->acr); in __start_tx()
1563 * serial8250_em485_start_tx() - generic ->rs485_start_tx() callback
1564 * @up: uart 8250 port
1565 * @toggle_ier: true to allow disabling receive interrupts
1567 * Generic callback usable by 8250 uart drivers to start rs485 transmission.
1573 void serial8250_em485_start_tx(struct uart_8250_port *up, bool toggle_ier) in serial8250_em485_start_tx() argument
1575 unsigned char mcr = serial8250_in_MCR(up); in serial8250_em485_start_tx()
1577 if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX) && toggle_ier) in serial8250_em485_start_tx()
1578 serial8250_stop_rx(&up->port); in serial8250_em485_start_tx()
1580 if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND) in serial8250_em485_start_tx()
1584 serial8250_out_MCR(up, mcr); in serial8250_em485_start_tx()
1588 /* Returns false, if start_tx_timer was setup to defer TX start */
1591 struct uart_8250_port *up = up_to_u8250p(port); in start_tx_rs485() local
1592 struct uart_8250_em485 *em485 = up->em485; in start_tx_rs485()
1596 * em485->active_timer != &em485->stop_tx_timer, it might happen that in start_tx_rs485()
1598 * chars is send and em485->active_timer == &em485->stop_tx_timer again. in start_tx_rs485()
1600 * the timer is already running and only comes around to check for in start_tx_rs485()
1601 * em485->active_timer when &em485->stop_tx_timer is armed again. in start_tx_rs485()
1603 if (em485->active_timer == &em485->stop_tx_timer) in start_tx_rs485()
1604 hrtimer_try_to_cancel(&em485->stop_tx_timer); in start_tx_rs485()
1606 em485->active_timer = NULL; in start_tx_rs485()
1608 if (em485->tx_stopped) { in start_tx_rs485()
1609 em485->tx_stopped = false; in start_tx_rs485()
1611 up->rs485_start_tx(up, true); in start_tx_rs485()
1613 if (up->port.rs485.delay_rts_before_send > 0) { in start_tx_rs485()
1614 em485->active_timer = &em485->start_tx_timer; in start_tx_rs485()
1615 start_hrtimer_ms(&em485->start_tx_timer, in start_tx_rs485()
1616 up->port.rs485.delay_rts_before_send); in start_tx_rs485()
1628 struct uart_8250_port *p = em485->port; in serial8250_em485_handle_start_tx()
1631 uart_port_lock_irqsave(&p->port, &flags); in serial8250_em485_handle_start_tx()
1632 if (em485->active_timer == &em485->start_tx_timer) { in serial8250_em485_handle_start_tx()
1633 __start_tx(&p->port); in serial8250_em485_handle_start_tx()
1634 em485->active_timer = NULL; in serial8250_em485_handle_start_tx()
1636 uart_port_unlock_irqrestore(&p->port, flags); in serial8250_em485_handle_start_tx()
1643 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_start_tx() local
1644 struct uart_8250_em485 *em485 = up->em485; in serial8250_start_tx()
1646 /* Port locked to synchronize UART_IER access against the console. */ in serial8250_start_tx()
1647 lockdep_assert_held_once(&port->lock); in serial8250_start_tx()
1649 if (!port->x_char && kfifo_is_empty(&port->state->port.xmit_fifo)) in serial8250_start_tx()
1652 serial8250_rpm_get_tx(up); in serial8250_start_tx()
1655 if ((em485->active_timer == &em485->start_tx_timer) || in serial8250_start_tx()
1664 port->throttle(port); in serial8250_throttle()
1669 port->unthrottle(port); in serial8250_unthrottle()
1674 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_disable_ms() local
1676 /* Port locked to synchronize UART_IER access against the console. */ in serial8250_disable_ms()
1677 lockdep_assert_held_once(&port->lock); in serial8250_disable_ms()
1680 if (up->bugs & UART_BUG_NOMSR) in serial8250_disable_ms()
1683 mctrl_gpio_disable_ms(up->gpios); in serial8250_disable_ms()
1685 up->ier &= ~UART_IER_MSI; in serial8250_disable_ms()
1686 serial_port_out(port, UART_IER, up->ier); in serial8250_disable_ms()
1691 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_enable_ms() local
1693 /* Port locked to synchronize UART_IER access against the console. */ in serial8250_enable_ms()
1694 lockdep_assert_held_once(&port->lock); in serial8250_enable_ms()
1697 if (up->bugs & UART_BUG_NOMSR) in serial8250_enable_ms()
1700 mctrl_gpio_enable_ms(up->gpios); in serial8250_enable_ms()
1702 up->ier |= UART_IER_MSI; in serial8250_enable_ms()
1704 serial8250_rpm_get(up); in serial8250_enable_ms()
1705 serial_port_out(port, UART_IER, up->ier); in serial8250_enable_ms()
1706 serial8250_rpm_put(up); in serial8250_enable_ms()
1709 void serial8250_read_char(struct uart_8250_port *up, u16 lsr) in serial8250_read_char() argument
1711 struct uart_port *port = &up->port; in serial8250_read_char()
1715 ch = serial_in(up, UART_RX); in serial8250_read_char()
1720 * it receives a break. To avoid reading from the in serial8250_read_char()
1722 * just force the read character to be 0 in serial8250_read_char()
1726 port->icount.rx++; in serial8250_read_char()
1728 lsr |= up->lsr_saved_flags; in serial8250_read_char()
1729 up->lsr_saved_flags = 0; in serial8250_read_char()
1734 port->icount.brk++; in serial8250_read_char()
1744 port->icount.parity++; in serial8250_read_char()
1746 port->icount.frame++; in serial8250_read_char()
1748 port->icount.overrun++; in serial8250_read_char()
1753 lsr &= port->read_status_mask; in serial8250_read_char()
1756 dev_dbg(port->dev, "handling break\n"); in serial8250_read_char()
1771 * serial8250_rx_chars - Read characters. The first LSR value must be passed in.
1773 * Returns LSR bits. The caller should rely only on non-Rx related LSR bits
1777 u16 serial8250_rx_chars(struct uart_8250_port *up, u16 lsr) in serial8250_rx_chars() argument
1779 struct uart_port *port = &up->port; in serial8250_rx_chars()
1783 serial8250_read_char(up, lsr); in serial8250_rx_chars()
1784 if (--max_count == 0) in serial8250_rx_chars()
1786 lsr = serial_in(up, UART_LSR); in serial8250_rx_chars()
1789 tty_flip_buffer_push(&port->state->port); in serial8250_rx_chars()
1794 void serial8250_tx_chars(struct uart_8250_port *up) in serial8250_tx_chars() argument
1796 struct uart_port *port = &up->port; in serial8250_tx_chars()
1797 struct tty_port *tport = &port->state->port; in serial8250_tx_chars()
1800 if (port->x_char) { in serial8250_tx_chars()
1808 if (kfifo_is_empty(&tport->xmit_fifo)) { in serial8250_tx_chars()
1809 __stop_tx(up); in serial8250_tx_chars()
1813 count = up->tx_loadsz; in serial8250_tx_chars()
1820 serial_out(up, UART_TX, c); in serial8250_tx_chars()
1821 if (up->bugs & UART_BUG_TXRACE) { in serial8250_tx_chars()
1827 * Delay back-to-back writes by a read cycle to avoid in serial8250_tx_chars()
1829 * side-effects and discard the result. in serial8250_tx_chars()
1831 serial_in(up, UART_SCR); in serial8250_tx_chars()
1834 if ((up->capabilities & UART_CAP_HFIFO) && in serial8250_tx_chars()
1835 !uart_lsr_tx_empty(serial_in(up, UART_LSR))) in serial8250_tx_chars()
1837 /* The BCM2835 MINI UART THRE bit is really a not-full bit. */ in serial8250_tx_chars()
1838 if ((up->capabilities & UART_CAP_MINI) && in serial8250_tx_chars()
1839 !(serial_in(up, UART_LSR) & UART_LSR_THRE)) in serial8250_tx_chars()
1841 } while (--count > 0); in serial8250_tx_chars()
1843 if (kfifo_len(&tport->xmit_fifo) < WAKEUP_CHARS) in serial8250_tx_chars()
1847 * With RPM enabled, we have to wait until the FIFO is empty before the in serial8250_tx_chars()
1851 if (kfifo_is_empty(&tport->xmit_fifo) && in serial8250_tx_chars()
1852 !(up->capabilities & UART_CAP_RPM)) in serial8250_tx_chars()
1853 __stop_tx(up); in serial8250_tx_chars()
1858 unsigned int serial8250_modem_status(struct uart_8250_port *up) in serial8250_modem_status() argument
1860 struct uart_port *port = &up->port; in serial8250_modem_status()
1861 unsigned int status = serial_in(up, UART_MSR); in serial8250_modem_status()
1863 status |= up->msr_saved_flags; in serial8250_modem_status()
1864 up->msr_saved_flags = 0; in serial8250_modem_status()
1865 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && in serial8250_modem_status()
1866 port->state != NULL) { in serial8250_modem_status()
1868 port->icount.rng++; in serial8250_modem_status()
1870 port->icount.dsr++; in serial8250_modem_status()
1876 wake_up_interruptible(&port->state->port.delta_msr_wait); in serial8250_modem_status()
1883 static bool handle_rx_dma(struct uart_8250_port *up, unsigned int iir) in handle_rx_dma() argument
1888 * Postpone DMA or not decision to IIR_RDI or IIR_RX_TIMEOUT in handle_rx_dma()
1889 * because it's impossible to do an informed decision about in handle_rx_dma()
1898 if (!up->dma->rx_running) in handle_rx_dma()
1903 serial8250_rx_dma_flush(up); in handle_rx_dma()
1906 return up->dma->rx_dma(up); in handle_rx_dma()
1914 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_handle_irq() local
1915 struct tty_port *tport = &port->state->port; in serial8250_handle_irq()
1925 status = serial_lsr_in(up); in serial8250_handle_irq()
1929 * FIFO, then don't drain the FIFO, as this may lead to TTY buffer in serial8250_handle_irq()
1936 (port->status & (UPSTAT_AUTOCTS | UPSTAT_AUTORTS)) && in serial8250_handle_irq()
1937 !(up->ier & (UART_IER_RLSI | UART_IER_RDI))) in serial8250_handle_irq()
1943 d = irq_get_irq_data(port->irq); in serial8250_handle_irq()
1945 pm_wakeup_event(tport->tty->dev, 0); in serial8250_handle_irq()
1946 if (!up->dma || handle_rx_dma(up, iir)) in serial8250_handle_irq()
1947 status = serial8250_rx_chars(up, status); in serial8250_handle_irq()
1949 serial8250_modem_status(up); in serial8250_handle_irq()
1950 if ((status & UART_LSR_THRE) && (up->ier & UART_IER_THRI)) { in serial8250_handle_irq()
1951 if (!up->dma || up->dma->tx_err) in serial8250_handle_irq()
1952 serial8250_tx_chars(up); in serial8250_handle_irq()
1953 else if (!up->dma->tx_running) in serial8250_handle_irq()
1954 __stop_tx(up); in serial8250_handle_irq()
1965 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_default_handle_irq() local
1969 serial8250_rpm_get(up); in serial8250_default_handle_irq()
1974 serial8250_rpm_put(up); in serial8250_default_handle_irq()
1982 * has space available. Load it up with tx_loadsz bytes.
1989 /* TX Threshold IRQ triggered so load up FIFO */ in serial8250_tx_threshold_handle_irq()
1991 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_tx_threshold_handle_irq() local
1994 serial8250_tx_chars(up); in serial8250_tx_threshold_handle_irq()
2004 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_tx_empty() local
2008 serial8250_rpm_get(up); in serial8250_tx_empty()
2011 if (!serial8250_tx_dma_running(up) && uart_lsr_tx_empty(serial_lsr_in(up))) in serial8250_tx_empty()
2015 serial8250_rpm_put(up); in serial8250_tx_empty()
2022 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_do_get_mctrl() local
2026 serial8250_rpm_get(up); in serial8250_do_get_mctrl()
2027 status = serial8250_modem_status(up); in serial8250_do_get_mctrl()
2028 serial8250_rpm_put(up); in serial8250_do_get_mctrl()
2031 if (up->gpios) in serial8250_do_get_mctrl()
2032 return mctrl_gpio_get(up->gpios, &val); in serial8250_do_get_mctrl()
2040 if (port->get_mctrl) in serial8250_get_mctrl()
2041 return port->get_mctrl(port); in serial8250_get_mctrl()
2047 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_do_set_mctrl() local
2052 mcr |= up->mcr; in serial8250_do_set_mctrl()
2054 serial8250_out_MCR(up, mcr); in serial8250_do_set_mctrl()
2060 if (port->rs485.flags & SER_RS485_ENABLED) in serial8250_set_mctrl()
2063 if (port->set_mctrl) in serial8250_set_mctrl()
2064 port->set_mctrl(port, mctrl); in serial8250_set_mctrl()
2071 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_break_ctl() local
2074 serial8250_rpm_get(up); in serial8250_break_ctl()
2076 if (break_state == -1) in serial8250_break_ctl()
2077 up->lcr |= UART_LCR_SBC; in serial8250_break_ctl()
2079 up->lcr &= ~UART_LCR_SBC; in serial8250_break_ctl()
2080 serial_port_out(port, UART_LCR, up->lcr); in serial8250_break_ctl()
2082 serial8250_rpm_put(up); in serial8250_break_ctl()
2086 static bool wait_for_lsr(struct uart_8250_port *up, int bits) in wait_for_lsr() argument
2091 * Wait for a character to be sent. Fallback to a safe default in wait_for_lsr()
2094 if (up->port.frame_time) in wait_for_lsr()
2095 tmout = up->port.frame_time * 2 / NSEC_PER_USEC; in wait_for_lsr()
2100 status = serial_lsr_in(up); in wait_for_lsr()
2104 if (--tmout == 0) in wait_for_lsr()
2113 /* Wait for transmitter and holding register to empty with timeout */
2114 static void wait_for_xmitr(struct uart_8250_port *up, int bits) in wait_for_xmitr() argument
2118 wait_for_lsr(up, bits); in wait_for_xmitr()
2120 /* Wait up to 1s for flow control if necessary */ in wait_for_xmitr()
2121 if (up->port.flags & UPF_CONS_FLOW) { in wait_for_xmitr()
2122 for (tmout = 1000000; tmout; tmout--) { in wait_for_xmitr()
2123 unsigned int msr = serial_in(up, UART_MSR); in wait_for_xmitr()
2124 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; in wait_for_xmitr()
2141 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_get_poll_char() local
2145 serial8250_rpm_get(up); in serial8250_get_poll_char()
2156 serial8250_rpm_put(up); in serial8250_get_poll_char()
2165 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_put_poll_char() local
2168 * Normally the port is locked to synchronize UART_IER access in serial8250_put_poll_char()
2170 * KDB/KGDB, where it may not be possible to acquire the port in serial8250_put_poll_char()
2175 serial8250_rpm_get(up); in serial8250_put_poll_char()
2180 serial8250_clear_IER(up); in serial8250_put_poll_char()
2182 wait_for_xmitr(up, UART_LSR_BOTH_EMPTY); in serial8250_put_poll_char()
2189 * Finally, wait for transmitter to become empty in serial8250_put_poll_char()
2192 wait_for_xmitr(up, UART_LSR_BOTH_EMPTY); in serial8250_put_poll_char()
2194 serial8250_rpm_put(up); in serial8250_put_poll_char()
2201 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_do_startup() local
2207 if (!port->fifosize) in serial8250_do_startup()
2208 port->fifosize = uart_config[port->type].fifo_size; in serial8250_do_startup()
2209 if (!up->tx_loadsz) in serial8250_do_startup()
2210 up->tx_loadsz = uart_config[port->type].tx_loadsz; in serial8250_do_startup()
2211 if (!up->capabilities) in serial8250_do_startup()
2212 up->capabilities = uart_config[port->type].flags; in serial8250_do_startup()
2213 up->mcr = 0; in serial8250_do_startup()
2215 if (port->iotype != up->cur_iotype) in serial8250_do_startup()
2218 serial8250_rpm_get(up); in serial8250_do_startup()
2219 if (port->type == PORT_16C950) { in serial8250_do_startup()
2221 * Wake up and initialize UART in serial8250_do_startup()
2226 up->acr = 0; in serial8250_do_startup()
2231 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */ in serial8250_do_startup()
2238 if (port->type == PORT_DA830) { in serial8250_do_startup()
2259 * If this is an RSA port, see if we can kick it up to the in serial8250_do_startup()
2262 enable_rsa(up); in serial8250_do_startup()
2269 serial8250_clear_fifos(up); in serial8250_do_startup()
2284 if (!(port->flags & UPF_BUGGY_UART) && in serial8250_do_startup()
2286 dev_info_ratelimited(port->dev, "LSR safety check engaged!\n"); in serial8250_do_startup()
2287 retval = -ENODEV; in serial8250_do_startup()
2292 * For a XR16C850, we need to set the trigger levels in serial8250_do_startup()
2294 if (port->type == PORT_16850) { in serial8250_do_startup()
2297 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); in serial8250_do_startup()
2299 fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX); in serial8250_do_startup()
2313 if (((port->type == PORT_ALTR_16550_F32) || in serial8250_do_startup()
2314 (port->type == PORT_ALTR_16550_F64) || in serial8250_do_startup()
2315 (port->type == PORT_ALTR_16550_F128)) && (port->fifosize > 1)) { in serial8250_do_startup()
2316 /* Bounds checking of TX threshold (valid 0 to fifosize-2) */ in serial8250_do_startup()
2317 if ((up->tx_loadsz < 2) || (up->tx_loadsz > port->fifosize)) { in serial8250_do_startup()
2318 dev_err(port->dev, "TX FIFO Threshold errors, skipping\n"); in serial8250_do_startup()
2323 port->fifosize - up->tx_loadsz); in serial8250_do_startup()
2324 port->handle_irq = serial8250_tx_threshold_handle_irq; in serial8250_do_startup()
2328 /* Check if we need to have shared IRQs */ in serial8250_do_startup()
2329 if (port->irq && (up->port.flags & UPF_SHARE_IRQ)) in serial8250_do_startup()
2330 up->port.irqflags |= IRQF_SHARED; in serial8250_do_startup()
2332 retval = up->ops->setup_irq(up); in serial8250_do_startup()
2336 if (port->irq && !(up->port.flags & UPF_NO_THRE_TEST)) { in serial8250_do_startup()
2339 if (port->irqflags & IRQF_SHARED) in serial8250_do_startup()
2340 disable_irq_nosync(port->irq); in serial8250_do_startup()
2347 * the interrupt is enabled. Delays are necessary to in serial8250_do_startup()
2348 * allow register changes to become visible. in serial8250_do_startup()
2354 wait_for_xmitr(up, UART_LSR_THRE); in serial8250_do_startup()
2356 udelay(1); /* allow THRE to set */ in serial8250_do_startup()
2360 udelay(1); /* allow a working UART time to re-assert THRE */ in serial8250_do_startup()
2366 if (port->irqflags & IRQF_SHARED) in serial8250_do_startup()
2367 enable_irq(port->irq); in serial8250_do_startup()
2371 * don't trust the iir, setup a timer to kick the UART in serial8250_do_startup()
2375 up->port.flags & UPF_BUG_THRE) { in serial8250_do_startup()
2376 up->bugs |= UART_BUG_THRE; in serial8250_do_startup()
2380 up->ops->setup_timer(up); in serial8250_do_startup()
2388 if (up->port.flags & UPF_FOURPORT) { in serial8250_do_startup()
2389 if (!up->port.irq) in serial8250_do_startup()
2390 up->port.mctrl |= TIOCM_OUT1; in serial8250_do_startup()
2393 * Most PC uarts need OUT2 raised to enable interrupts. in serial8250_do_startup()
2395 if (port->irq) in serial8250_do_startup()
2396 up->port.mctrl |= TIOCM_OUT2; in serial8250_do_startup()
2398 serial8250_set_mctrl(port, port->mctrl); in serial8250_do_startup()
2402 * Intel 8257x Gigabit ethernet chips have a 16550 emulation, to be in serial8250_do_startup()
2404 * normal serial device to signalize that a transmission data was in serial8250_do_startup()
2405 * queued. Due to that, the above test generally fails. One solution in serial8250_do_startup()
2406 * would be to delay the reading of iir. However, this is not in serial8250_do_startup()
2411 if (up->port.quirks & UPQ_NO_TXEN_TEST) in serial8250_do_startup()
2415 * Do a quick test to see if we receive an interrupt when we enable in serial8250_do_startup()
2424 if (!(up->bugs & UART_BUG_TXEN)) { in serial8250_do_startup()
2425 up->bugs |= UART_BUG_TXEN; in serial8250_do_startup()
2426 dev_dbg(port->dev, "enabling bad tx status workarounds\n"); in serial8250_do_startup()
2429 up->bugs &= ~UART_BUG_TXEN; in serial8250_do_startup()
2437 * saved flags to avoid getting false values from polling in serial8250_do_startup()
2444 up->lsr_saved_flags = 0; in serial8250_do_startup()
2445 up->msr_saved_flags = 0; in serial8250_do_startup()
2450 if (up->dma) { in serial8250_do_startup()
2455 else if (serial8250_request_dma(up)) in serial8250_do_startup()
2456 msg = "failed to request DMA"; in serial8250_do_startup()
2458 dev_warn_ratelimited(port->dev, "%s\n", msg); in serial8250_do_startup()
2459 up->dma = NULL; in serial8250_do_startup()
2465 * enable until after the FIFOs are enabled; otherwise, an already- in serial8250_do_startup()
2468 up->ier = UART_IER_RLSI | UART_IER_RDI; in serial8250_do_startup()
2470 if (port->flags & UPF_FOURPORT) { in serial8250_do_startup()
2475 icp = (port->iobase & 0xfe0) | 0x01f; in serial8250_do_startup()
2481 serial8250_rpm_put(up); in serial8250_do_startup()
2488 if (port->startup) in serial8250_startup()
2489 return port->startup(port); in serial8250_startup()
2495 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_do_shutdown() local
2498 serial8250_rpm_get(up); in serial8250_do_shutdown()
2505 up->ier = 0; in serial8250_do_shutdown()
2509 synchronize_irq(port->irq); in serial8250_do_shutdown()
2511 if (up->dma) in serial8250_do_shutdown()
2512 serial8250_release_dma(up); in serial8250_do_shutdown()
2515 if (port->flags & UPF_FOURPORT) { in serial8250_do_shutdown()
2517 inb((port->iobase & 0xfe0) | 0x1f); in serial8250_do_shutdown()
2518 port->mctrl |= TIOCM_OUT1; in serial8250_do_shutdown()
2520 port->mctrl &= ~TIOCM_OUT2; in serial8250_do_shutdown()
2522 serial8250_set_mctrl(port, port->mctrl); in serial8250_do_shutdown()
2530 serial8250_clear_fifos(up); in serial8250_do_shutdown()
2534 * Reset the RSA board back to 115kbps compat mode. in serial8250_do_shutdown()
2536 disable_rsa(up); in serial8250_do_shutdown()
2540 * Read data port to reset things, and then unlink from in serial8250_do_shutdown()
2544 serial8250_rpm_put(up); in serial8250_do_shutdown()
2546 up->ops->release_irq(up); in serial8250_do_shutdown()
2552 if (port->shutdown) in serial8250_shutdown()
2553 port->shutdown(port); in serial8250_shutdown()
2560 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_flush_buffer() local
2562 if (up->dma) in serial8250_flush_buffer()
2563 serial8250_tx_dma_flush(up); in serial8250_flush_buffer()
2570 upf_t magic_multiplier = port->flags & UPF_MAGIC_MULTIPLIER; in serial8250_do_get_divisor()
2571 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_do_get_divisor() local
2577 * up to clk/4 (0x8001) and clk/8 (0x8002) respectively. These in serial8250_do_get_divisor()
2589 * base frequency of 7.3728MHz, always used. If set to 0, then in serial8250_do_get_divisor()
2593 * if set to 1 and high-speed operation has been enabled with the in serial8250_do_get_divisor()
2595 * then the base frequency is supplied directly to the Baud Rate in serial8250_do_get_divisor()
2600 * In all cases only low 15 bits of the divisor are used to divide in serial8250_do_get_divisor()
2604 * clock by any divisor from 1 to 65535. in serial8250_do_get_divisor()
2606 if (magic_multiplier && baud >= port->uartclk / 6) in serial8250_do_get_divisor()
2608 else if (magic_multiplier && baud >= port->uartclk / 12) in serial8250_do_get_divisor()
2616 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0) in serial8250_do_get_divisor()
2626 if (port->get_divisor) in serial8250_get_divisor()
2627 return port->get_divisor(port, baud, frac); in serial8250_get_divisor()
2632 static unsigned char serial8250_compute_lcr(struct uart_8250_port *up, in serial8250_compute_lcr() argument
2654 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_do_set_divisor() local
2656 /* Workaround to enable 115200 baud on OMAP1510 internal ports */ in serial8250_do_set_divisor()
2657 if (is_omap1510_8250(up)) { in serial8250_do_set_divisor()
2666 * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2, in serial8250_do_set_divisor()
2669 if (up->capabilities & UART_NATSEMI) in serial8250_do_set_divisor()
2672 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB); in serial8250_do_set_divisor()
2674 serial_dl_write(up, quot); in serial8250_do_set_divisor()
2681 if (port->set_divisor) in serial8250_set_divisor()
2682 port->set_divisor(port, baud, quot, quot_frac); in serial8250_set_divisor()
2691 unsigned int tolerance = port->uartclk / 100; in serial8250_get_baud_rate()
2700 if (port->flags & UPF_MAGIC_MULTIPLIER) { in serial8250_get_baud_rate()
2701 min = port->uartclk / 16 / UART_DIV_MAX >> 1; in serial8250_get_baud_rate()
2702 max = (port->uartclk + tolerance) / 4; in serial8250_get_baud_rate()
2704 min = port->uartclk / 16 / UART_DIV_MAX; in serial8250_get_baud_rate()
2705 max = (port->uartclk + tolerance) / 16; in serial8250_get_baud_rate()
2709 * Ask the core to calculate the divisor for us. in serial8250_get_baud_rate()
2718 * Note in order to avoid the tty port mutex deadlock don't use the next method
2719 * within the uart port callbacks. Primarily it's supposed to be utilized to
2724 struct tty_port *tport = &port->state->port; in serial8250_update_uartclk()
2729 mutex_lock(&tport->mutex); in serial8250_update_uartclk()
2730 port->uartclk = uartclk; in serial8250_update_uartclk()
2731 mutex_unlock(&tport->mutex); in serial8250_update_uartclk()
2735 down_write(&tty->termios_rwsem); in serial8250_update_uartclk()
2736 mutex_lock(&tport->mutex); in serial8250_update_uartclk()
2738 if (port->uartclk == uartclk) in serial8250_update_uartclk()
2741 port->uartclk = uartclk; in serial8250_update_uartclk()
2746 serial8250_do_set_termios(port, &tty->termios, NULL); in serial8250_update_uartclk()
2749 mutex_unlock(&tport->mutex); in serial8250_update_uartclk()
2750 up_write(&tty->termios_rwsem); in serial8250_update_uartclk()
2759 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_do_set_termios() local
2764 if (up->capabilities & UART_CAP_MINI) { in serial8250_do_set_termios()
2765 termios->c_cflag &= ~(CSTOPB | PARENB | PARODD | CMSPAR); in serial8250_do_set_termios()
2766 if ((termios->c_cflag & CSIZE) == CS5 || in serial8250_do_set_termios()
2767 (termios->c_cflag & CSIZE) == CS6) in serial8250_do_set_termios()
2768 termios->c_cflag = (termios->c_cflag & ~CSIZE) | CS7; in serial8250_do_set_termios()
2770 cval = serial8250_compute_lcr(up, termios->c_cflag); in serial8250_do_set_termios()
2781 serial8250_rpm_get(up); in serial8250_do_set_termios()
2784 up->lcr = cval; /* Save computed LCR */ in serial8250_do_set_termios()
2786 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) { in serial8250_do_set_termios()
2787 if (baud < 2400 && !up->dma) { in serial8250_do_set_termios()
2788 up->fcr &= ~UART_FCR_TRIGGER_MASK; in serial8250_do_set_termios()
2789 up->fcr |= UART_FCR_TRIGGER_1; in serial8250_do_set_termios()
2794 * MCR-based auto flow control. When AFE is enabled, RTS will be in serial8250_do_set_termios()
2798 if (up->capabilities & UART_CAP_AFE) { in serial8250_do_set_termios()
2799 up->mcr &= ~UART_MCR_AFE; in serial8250_do_set_termios()
2800 if (termios->c_cflag & CRTSCTS) in serial8250_do_set_termios()
2801 up->mcr |= UART_MCR_AFE; in serial8250_do_set_termios()
2805 * Update the per-port timeout. in serial8250_do_set_termios()
2807 uart_update_timeout(port, termios->c_cflag, baud); in serial8250_do_set_termios()
2815 port->read_status_mask = UART_LSR_OE | UART_LSR_DR; in serial8250_do_set_termios()
2816 if (termios->c_iflag & INPCK) in serial8250_do_set_termios()
2817 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE; in serial8250_do_set_termios()
2818 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK)) in serial8250_do_set_termios()
2819 port->read_status_mask |= UART_LSR_BI; in serial8250_do_set_termios()
2822 * Characters to ignore in serial8250_do_set_termios()
2824 port->ignore_status_mask = 0; in serial8250_do_set_termios()
2825 if (termios->c_iflag & IGNPAR) in serial8250_do_set_termios()
2826 port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; in serial8250_do_set_termios()
2827 if (termios->c_iflag & IGNBRK) { in serial8250_do_set_termios()
2828 port->ignore_status_mask |= UART_LSR_BI; in serial8250_do_set_termios()
2833 if (termios->c_iflag & IGNPAR) in serial8250_do_set_termios()
2834 port->ignore_status_mask |= UART_LSR_OE; in serial8250_do_set_termios()
2840 if ((termios->c_cflag & CREAD) == 0) in serial8250_do_set_termios()
2841 port->ignore_status_mask |= UART_LSR_DR; in serial8250_do_set_termios()
2846 up->ier &= ~UART_IER_MSI; in serial8250_do_set_termios()
2847 if (!(up->bugs & UART_BUG_NOMSR) && in serial8250_do_set_termios()
2848 UART_ENABLE_MS(&up->port, termios->c_cflag)) in serial8250_do_set_termios()
2849 up->ier |= UART_IER_MSI; in serial8250_do_set_termios()
2850 if (up->capabilities & UART_CAP_UUE) in serial8250_do_set_termios()
2851 up->ier |= UART_IER_UUE; in serial8250_do_set_termios()
2852 if (up->capabilities & UART_CAP_RTOIE) in serial8250_do_set_termios()
2853 up->ier |= UART_IER_RTOIE; in serial8250_do_set_termios()
2855 serial_port_out(port, UART_IER, up->ier); in serial8250_do_set_termios()
2857 if (up->capabilities & UART_CAP_EFR) { in serial8250_do_set_termios()
2861 * - TI16C752 requires control thresholds to be set. in serial8250_do_set_termios()
2862 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled. in serial8250_do_set_termios()
2864 if (termios->c_cflag & CRTSCTS) in serial8250_do_set_termios()
2868 if (port->flags & UPF_EXAR_EFR) in serial8250_do_set_termios()
2877 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR in serial8250_do_set_termios()
2880 if (port->type == PORT_16750) in serial8250_do_set_termios()
2881 serial_port_out(port, UART_FCR, up->fcr); in serial8250_do_set_termios()
2883 serial_port_out(port, UART_LCR, up->lcr); /* reset DLAB */ in serial8250_do_set_termios()
2884 if (port->type != PORT_16750) { in serial8250_do_set_termios()
2886 if (up->fcr & UART_FCR_ENABLE_FIFO) in serial8250_do_set_termios()
2888 serial_port_out(port, UART_FCR, up->fcr); /* set fcr */ in serial8250_do_set_termios()
2890 serial8250_set_mctrl(port, port->mctrl); in serial8250_do_set_termios()
2892 serial8250_rpm_put(up); in serial8250_do_set_termios()
2904 if (port->set_termios) in serial8250_set_termios()
2905 port->set_termios(port, termios, old); in serial8250_set_termios()
2912 if (termios->c_line == N_PPS) { in serial8250_do_set_ldisc()
2913 port->flags |= UPF_HARDPPS_CD; in serial8250_do_set_ldisc()
2918 port->flags &= ~UPF_HARDPPS_CD; in serial8250_do_set_ldisc()
2919 if (!UART_ENABLE_MS(port, termios->c_cflag)) { in serial8250_do_set_ldisc()
2931 if (port->set_ldisc) in serial8250_set_ldisc()
2932 port->set_ldisc(port, termios); in serial8250_set_ldisc()
2950 if (port->pm) in serial8250_pm()
2951 port->pm(port, state, oldstate); in serial8250_pm()
2958 if (pt->port.mapsize) in serial8250_port_size()
2959 return pt->port.mapsize; in serial8250_port_size()
2961 return 0x16 << pt->port.regshift; in serial8250_port_size()
2963 return 8 << pt->port.regshift; in serial8250_port_size()
2969 static int serial8250_request_std_resource(struct uart_8250_port *up) in serial8250_request_std_resource() argument
2971 unsigned int size = serial8250_port_size(up); in serial8250_request_std_resource()
2972 struct uart_port *port = &up->port; in serial8250_request_std_resource()
2975 switch (port->iotype) { in serial8250_request_std_resource()
2982 if (!port->mapbase) { in serial8250_request_std_resource()
2983 ret = -EINVAL; in serial8250_request_std_resource()
2987 if (!request_mem_region(port->mapbase, size, "serial")) { in serial8250_request_std_resource()
2988 ret = -EBUSY; in serial8250_request_std_resource()
2992 if (port->flags & UPF_IOREMAP) { in serial8250_request_std_resource()
2993 port->membase = ioremap(port->mapbase, size); in serial8250_request_std_resource()
2994 if (!port->membase) { in serial8250_request_std_resource()
2995 release_mem_region(port->mapbase, size); in serial8250_request_std_resource()
2996 ret = -ENOMEM; in serial8250_request_std_resource()
3003 if (!request_region(port->iobase, size, "serial")) in serial8250_request_std_resource()
3004 ret = -EBUSY; in serial8250_request_std_resource()
3010 static void serial8250_release_std_resource(struct uart_8250_port *up) in serial8250_release_std_resource() argument
3012 unsigned int size = serial8250_port_size(up); in serial8250_release_std_resource()
3013 struct uart_port *port = &up->port; in serial8250_release_std_resource()
3015 switch (port->iotype) { in serial8250_release_std_resource()
3022 if (!port->mapbase) in serial8250_release_std_resource()
3025 if (port->flags & UPF_IOREMAP) { in serial8250_release_std_resource()
3026 iounmap(port->membase); in serial8250_release_std_resource()
3027 port->membase = NULL; in serial8250_release_std_resource()
3030 release_mem_region(port->mapbase, size); in serial8250_release_std_resource()
3035 release_region(port->iobase, size); in serial8250_release_std_resource()
3042 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_release_port() local
3044 serial8250_release_std_resource(up); in serial8250_release_port()
3049 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_request_port() local
3051 return serial8250_request_std_resource(up); in serial8250_request_port()
3054 static int fcr_get_rxtrig_bytes(struct uart_8250_port *up) in fcr_get_rxtrig_bytes() argument
3056 const struct serial8250_config *conf_type = &uart_config[up->port.type]; in fcr_get_rxtrig_bytes()
3059 bytes = conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(up->fcr)]; in fcr_get_rxtrig_bytes()
3061 return bytes ? bytes : -EOPNOTSUPP; in fcr_get_rxtrig_bytes()
3064 static int bytes_to_fcr_rxtrig(struct uart_8250_port *up, unsigned char bytes) in bytes_to_fcr_rxtrig() argument
3066 const struct serial8250_config *conf_type = &uart_config[up->port.type]; in bytes_to_fcr_rxtrig()
3069 if (!conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(UART_FCR_R_TRIG_00)]) in bytes_to_fcr_rxtrig()
3070 return -EOPNOTSUPP; in bytes_to_fcr_rxtrig()
3073 if (bytes < conf_type->rxtrig_bytes[i]) in bytes_to_fcr_rxtrig()
3075 return (--i) << UART_FCR_R_TRIG_SHIFT; in bytes_to_fcr_rxtrig()
3084 struct uart_port *uport = state->uart_port; in do_get_rxtrig()
3085 struct uart_8250_port *up = up_to_u8250p(uport); in do_get_rxtrig() local
3087 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1) in do_get_rxtrig()
3088 return -EINVAL; in do_get_rxtrig()
3090 return fcr_get_rxtrig_bytes(up); in do_get_rxtrig()
3097 mutex_lock(&port->mutex); in do_serial8250_get_rxtrig()
3099 mutex_unlock(&port->mutex); in do_serial8250_get_rxtrig()
3120 struct uart_port *uport = state->uart_port; in do_set_rxtrig()
3121 struct uart_8250_port *up = up_to_u8250p(uport); in do_set_rxtrig() local
3124 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1) in do_set_rxtrig()
3125 return -EINVAL; in do_set_rxtrig()
3127 rxtrig = bytes_to_fcr_rxtrig(up, bytes); in do_set_rxtrig()
3131 serial8250_clear_fifos(up); in do_set_rxtrig()
3132 up->fcr &= ~UART_FCR_TRIGGER_MASK; in do_set_rxtrig()
3133 up->fcr |= (unsigned char)rxtrig; in do_set_rxtrig()
3134 serial_out(up, UART_FCR, up->fcr); in do_set_rxtrig()
3142 mutex_lock(&port->mutex); in do_serial8250_set_rxtrig()
3144 mutex_unlock(&port->mutex); in do_serial8250_set_rxtrig()
3157 return -EINVAL; in rx_trig_bytes_store()
3181 static void register_dev_spec_attr_grp(struct uart_8250_port *up) in register_dev_spec_attr_grp() argument
3183 const struct serial8250_config *conf_type = &uart_config[up->port.type]; in register_dev_spec_attr_grp()
3185 if (conf_type->rxtrig_bytes[0]) in register_dev_spec_attr_grp()
3186 up->port.attr_group = &serial8250_dev_attr_group; in register_dev_spec_attr_grp()
3191 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_config_port() local
3198 ret = serial8250_request_std_resource(up); in serial8250_config_port()
3202 if (port->iotype != up->cur_iotype) in serial8250_config_port()
3206 autoconfig(up); in serial8250_config_port()
3209 if (port->type == PORT_TEGRA) in serial8250_config_port()
3210 up->bugs |= UART_BUG_NOMSR; in serial8250_config_port()
3212 if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ) in serial8250_config_port()
3213 autoconfig_irq(up); in serial8250_config_port()
3215 if (port->type == PORT_UNKNOWN) in serial8250_config_port()
3216 serial8250_release_std_resource(up); in serial8250_config_port()
3218 register_dev_spec_attr_grp(up); in serial8250_config_port()
3219 up->fcr = uart_config[up->port.type].fcr; in serial8250_config_port()
3225 if (ser->irq >= irq_get_nr_irqs() || ser->irq < 0 || in serial8250_verify_port()
3226 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN || in serial8250_verify_port()
3227 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS || in serial8250_verify_port()
3228 ser->type == PORT_STARTECH) in serial8250_verify_port()
3229 return -EINVAL; in serial8250_verify_port()
3235 int type = port->type; in serial8250_type()
3270 void serial8250_init_port(struct uart_8250_port *up) in serial8250_init_port() argument
3272 struct uart_port *port = &up->port; in serial8250_init_port()
3274 spin_lock_init(&port->lock); in serial8250_init_port()
3275 port->ctrl_id = 0; in serial8250_init_port()
3276 port->pm = NULL; in serial8250_init_port()
3277 port->ops = &serial8250_pops; in serial8250_init_port()
3278 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE); in serial8250_init_port()
3280 up->cur_iotype = UPIO_UNKNOWN; in serial8250_init_port()
3284 void serial8250_set_defaults(struct uart_8250_port *up) in serial8250_set_defaults() argument
3286 struct uart_port *port = &up->port; in serial8250_set_defaults()
3288 if (up->port.flags & UPF_FIXED_TYPE) { in serial8250_set_defaults()
3289 unsigned int type = up->port.type; in serial8250_set_defaults()
3291 if (!up->port.fifosize) in serial8250_set_defaults()
3292 up->port.fifosize = uart_config[type].fifo_size; in serial8250_set_defaults()
3293 if (!up->tx_loadsz) in serial8250_set_defaults()
3294 up->tx_loadsz = uart_config[type].tx_loadsz; in serial8250_set_defaults()
3295 if (!up->capabilities) in serial8250_set_defaults()
3296 up->capabilities = uart_config[type].flags; in serial8250_set_defaults()
3302 if (up->dma) { in serial8250_set_defaults()
3303 if (!up->dma->tx_dma) in serial8250_set_defaults()
3304 up->dma->tx_dma = serial8250_tx_dma; in serial8250_set_defaults()
3305 if (!up->dma->rx_dma) in serial8250_set_defaults()
3306 up->dma->rx_dma = serial8250_rx_dma; in serial8250_set_defaults()
3320 struct uart_8250_port *up = up_to_u8250p(port); in serial8250_console_wait_putchar() local
3322 wait_for_xmitr(up, UART_LSR_THRE); in serial8250_console_wait_putchar()
3327 * Restore serial console when h/w power-off detected
3329 static void serial8250_console_restore(struct uart_8250_port *up) in serial8250_console_restore() argument
3331 struct uart_port *port = &up->port; in serial8250_console_restore()
3335 termios.c_cflag = port->cons->cflag; in serial8250_console_restore()
3336 termios.c_ispeed = port->cons->ispeed; in serial8250_console_restore()
3337 termios.c_ospeed = port->cons->ospeed; in serial8250_console_restore()
3338 if (port->state->port.tty && termios.c_cflag == 0) { in serial8250_console_restore()
3339 termios.c_cflag = port->state->port.tty->termios.c_cflag; in serial8250_console_restore()
3340 termios.c_ispeed = port->state->port.tty->termios.c_ispeed; in serial8250_console_restore()
3341 termios.c_ospeed = port->state->port.tty->termios.c_ospeed; in serial8250_console_restore()
3348 serial_port_out(port, UART_LCR, up->lcr); in serial8250_console_restore()
3349 serial8250_out_MCR(up, up->mcr | UART_MCR_DTR | UART_MCR_RTS); in serial8250_console_restore()
3352 static void fifo_wait_for_lsr(struct uart_8250_port *up, unsigned int count) in fifo_wait_for_lsr() argument
3357 if (wait_for_lsr(up, UART_LSR_THRE)) in fifo_wait_for_lsr()
3363 * Print a string to the serial port using the device FIFO
3366 * to get empty.
3368 static void serial8250_console_fifo_write(struct uart_8250_port *up, in serial8250_console_fifo_write() argument
3372 unsigned int fifosize = up->tx_loadsz; in serial8250_console_fifo_write()
3373 struct uart_port *port = &up->port; in serial8250_console_fifo_write()
3380 fifo_wait_for_lsr(up, fifosize); in serial8250_console_fifo_write()
3398 fifo_wait_for_lsr(up, tx_count); in serial8250_console_fifo_write()
3402 * Print a string to the serial port trying not to disturb
3408 * Thus, we assume the function is called when device is powered up.
3410 void serial8250_console_write(struct uart_8250_port *up, const char *s, in serial8250_console_write() argument
3413 struct uart_8250_em485 *em485 = up->em485; in serial8250_console_write()
3414 struct uart_port *port = &up->port; in serial8250_console_write()
3430 serial8250_clear_IER(up); in serial8250_console_write()
3432 /* check scratch reg to see if port powered off during system sleep */ in serial8250_console_write()
3433 if (up->canary && (up->canary != serial_port_in(port, UART_SCR))) { in serial8250_console_write()
3434 serial8250_console_restore(up); in serial8250_console_write()
3435 up->canary = 0; in serial8250_console_write()
3439 if (em485->tx_stopped) in serial8250_console_write()
3440 up->rs485_start_tx(up, false); in serial8250_console_write()
3441 mdelay(port->rs485.delay_rts_before_send); in serial8250_console_write()
3444 use_fifo = (up->capabilities & UART_CAP_FIFO) && in serial8250_console_write()
3446 * BCM283x requires to check the fifo in serial8250_console_write()
3449 !(up->capabilities & UART_CAP_MINI) && in serial8250_console_write()
3453 up->tx_loadsz > 1 && in serial8250_console_write()
3454 (up->fcr & UART_FCR_ENABLE_FIFO) && in serial8250_console_write()
3455 port->state && in serial8250_console_write()
3456 test_bit(TTY_PORT_INITIALIZED, &port->state->port.iflags) && in serial8250_console_write()
3462 !(up->port.flags & UPF_CONS_FLOW); in serial8250_console_write()
3465 serial8250_console_fifo_write(up, s, count); in serial8250_console_write()
3470 * Finally, wait for transmitter to become empty in serial8250_console_write()
3473 wait_for_xmitr(up, UART_LSR_BOTH_EMPTY); in serial8250_console_write()
3476 mdelay(port->rs485.delay_rts_after_send); in serial8250_console_write()
3477 if (em485->tx_stopped) in serial8250_console_write()
3478 up->rs485_stop_tx(up, false); in serial8250_console_write()
3490 if (up->msr_saved_flags) in serial8250_console_write()
3491 serial8250_modem_status(up); in serial8250_console_write()
3509 return (port->uartclk / 16) / quot; in probe_baud()
3520 if (!port->iobase && !port->membase) in serial8250_console_setup()
3521 return -ENODEV; in serial8250_console_setup()
3528 ret = uart_set_options(port, port->cons, baud, parity, bits, flow); in serial8250_console_setup()
3532 if (port->dev) in serial8250_console_setup()
3533 pm_runtime_get_sync(port->dev); in serial8250_console_setup()
3540 if (port->dev) in serial8250_console_exit()
3541 pm_runtime_put_sync(port->dev); in serial8250_console_exit()
3548 MODULE_DESCRIPTION("Base port operations for 8250/16550-type serial ports");