3  *  Base port operations for 8250/16550-type serial ports
8  * A note about mapbase / membase
70 		.name		= "16550",
75 		.name		= "16550A",
220 		.name		= "Altera 16550 FIFO32",
228 		.name		= "Altera 16550 FIFO64",
236 		.name		= "Altera 16550 FIFO128",
245 	 * workaround of errata A-008006 which states that tx_loadsz should
249 		.name		= "16550A_FSL64",
282 		.name		= "Nuvoton 16550",
547  *	calling serial8250_em485_init(). This interrupt is not a part of
627  * if the uart is incapable of driving RTS as a Transmit Enable signal in
792  * This is a quickie test to see how big the FIFO is.
850  * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
851  * When this function is called we know it is at least a StarTech
853  * its clones.  (We treat the broken original StarTech 16650 V1 as a
854  * 16550, and why not?  Startech doesn't seem to even acknowledge its
911 	 * We check for a XR16C850 by setting DLL and DLM to 0, and then  in autoconfig_has_efr()
943  * We detected a chip without a FIFO.  Only two fall into
945  * 16450 has a scratch register (accessible with LCR=0)
1038 	 * Check for a National Semiconductor SuperIO chip.  in autoconfig_16550a()
1078 	 * No EFR.  Try to detect a TI16750, which only sets bit 5 of  in autoconfig_16550a()
1109 	 * trying to write and read a 1 just to make sure it's not  in autoconfig_16550a()
1110 	 * already a 1 and maybe locked there before we even start.  in autoconfig_16550a()
1116 		 * OK it's in a known zero state, try writing and reading  in autoconfig_16550a()
1140 	 * We distinguish between 16550A and U6 16550A by counting  in autoconfig_16550a()
1150  * This routine is called by rs_init() to initialize a specific serial
1152  * using: 8250, 16450, 16550, 16550A.  The important question is
1153  * whether or not this UART is a 16550A or not, since this will
1183 		 * Do a simple existence test first; if we fail this,  in autoconfig()
1186 		 * 0x80 is used as a nonsense port to prevent against  in autoconfig()
1188 		 * assumption is that 0x80 is a non-existent port;  in autoconfig()
1226 	 * Check to see if a UART is really there.  Certain broken  in autoconfig()
1231 	 * manufacturer would be stupid enough to design a board  in autoconfig()
1247 	 * We're pretty sure there's a port here.  Lets find out what  in autoconfig()
1249 	 * out if it's 8250 or 16450, 16550, 16550A or later.  This  in autoconfig()
1311 	 * Check if the device is a Fintek F81216A  in autoconfig()
1595 	 * While serial8250_em485_handle_stop_tx() is a noop if  in start_tx_rs485()
1599 	 * So cancel the timer. There is still a theoretical race condition if  in start_tx_rs485()
1718 		 * Intel 82571 has a Serial Over Lan device that will  in serial8250_read_char()
1720 		 * it receives a break. To avoid reading from the  in serial8250_read_char()
1823 			 * The Aspeed BMC virtual UARTs have a bug where data  in serial8250_tx_chars()
1827 			 * Delay back-to-back writes by a read cycle to avoid  in serial8250_tx_chars()
1828 			 * stalling the VUART. Read a register that won't have  in serial8250_tx_chars()
1837 		/* The BCM2835 MINI UART THRE bit is really a not-full bit. */  in serial8250_tx_chars()
1893 		 * DR is asserted but DMA Rx only gets a corrupted zero byte  in handle_rx_dma()
1979  * Newer 16550 compatible parts such as the SC16C650 & Altera 16550 Soft IP
1980  * have a programmable TX threshold that triggers the THRE interrupt in
2091 	 * Wait for a character to be sent. Fallback to a safe default  in wait_for_lsr()
2292 	 * For a XR16C850, we need to set the trigger levels  in serial8250_do_startup()
2311 	 * For the Altera 16550 variants, set TX threshold trigger level.  in serial8250_do_startup()
2345 		 * been cleared.  Real 16550s should always reassert  in serial8250_do_startup()
2360 		udelay(1); /* allow a working UART time to re-assert THRE */  in serial8250_do_startup()
2371 		 * don't trust the iir, setup a timer to kick the UART  in serial8250_do_startup()
2372 		 * on a regular basis.  in serial8250_do_startup()
2402 	 * Intel 8257x Gigabit ethernet chips have a 16550 emulation, to be  in serial8250_do_startup()
2403 	 * used for Serial Over Lan.  Those chips take a longer time than a  in serial8250_do_startup()
2404 	 * normal serial device to signalize that a transmission data was  in serial8250_do_startup()
2415 	 * Do a quick test to see if we receive an interrupt when we enable  in serial8250_do_startup()
2588 	 * effectively used as a clock prescaler selection bit for the  in serial8250_do_get_divisor()
2720  * handle a sudden reference clock rate change.
3363  * Print a string to the serial port using the device FIFO
3379 		/* Allow timeout for each byte of a possibly full FIFO */  in serial8250_console_fifo_write()
3396 	 * for UART_LSR_BOTH_EMPTY using the timeout of a single character  in serial8250_console_fifo_write()
3402  *	Print a string to the serial port trying not to disturb
3407  *	Doing runtime PM is really a bad idea for the kernel console.
3458 		 * After we put a data in the fifo, the controller will send  in serial8250_console_write()
3548 MODULE_DESCRIPTION("Base port operations for 8250/16550-type serial ports");