1 // SPDX-License-Identifier: GPL-2.0
10  * The bcm2835aux is capable of RTS auto flow-control, but this driver doesn't
11  * take advantage of it yet.  When adding support, be sure not to enable it
12  * simultaneously to rs485.
38  * struct bcm2835aux_data - driver private data of BCM2835 auxiliary UART
49 static void bcm2835aux_rs485_start_tx(struct uart_8250_port *up, bool toggle_ier)  in bcm2835aux_rs485_start_tx()  argument
51 	if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) {  in bcm2835aux_rs485_start_tx()
52 		struct bcm2835aux_data *data = dev_get_drvdata(up->port.dev);  in bcm2835aux_rs485_start_tx()
54 		data->cntl &= ~BCM2835_AUX_UART_CNTL_RXEN;  in bcm2835aux_rs485_start_tx()
55 		serial_out(up, BCM2835_AUX_UART_CNTL, data->cntl);  in bcm2835aux_rs485_start_tx()
60 	 * flags besides RTS.  So no need for a read-modify-write.  in bcm2835aux_rs485_start_tx()
62 	if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND)  in bcm2835aux_rs485_start_tx()
63 		serial8250_out_MCR(up, 0);  in bcm2835aux_rs485_start_tx()
65 		serial8250_out_MCR(up, UART_MCR_RTS);  in bcm2835aux_rs485_start_tx()
68 static void bcm2835aux_rs485_stop_tx(struct uart_8250_port *up, bool toggle_ier)  in bcm2835aux_rs485_stop_tx()  argument
70 	if (up->port.rs485.flags & SER_RS485_RTS_AFTER_SEND)  in bcm2835aux_rs485_stop_tx()
71 		serial8250_out_MCR(up, 0);  in bcm2835aux_rs485_stop_tx()
73 		serial8250_out_MCR(up, UART_MCR_RTS);  in bcm2835aux_rs485_stop_tx()
75 	if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) {  in bcm2835aux_rs485_stop_tx()
76 		struct bcm2835aux_data *data = dev_get_drvdata(up->port.dev);  in bcm2835aux_rs485_stop_tx()
78 		data->cntl |= BCM2835_AUX_UART_CNTL_RXEN;  in bcm2835aux_rs485_stop_tx()
79 		serial_out(up, BCM2835_AUX_UART_CNTL, data->cntl);  in bcm2835aux_rs485_stop_tx()
86 	struct uart_8250_port up = { };  in bcm2835aux_serial_probe()  local
93 	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);  in bcm2835aux_serial_probe()
95 		return -ENOMEM;  in bcm2835aux_serial_probe()
98 	up.capabilities = UART_CAP_FIFO | UART_CAP_MINI;  in bcm2835aux_serial_probe()
99 	up.port.dev = &pdev->dev;  in bcm2835aux_serial_probe()
100 	up.port.type = PORT_16550;  in bcm2835aux_serial_probe()
101 	up.port.flags = UPF_FIXED_PORT | UPF_FIXED_TYPE | UPF_SKIP_TEST | UPF_IOREMAP;  in bcm2835aux_serial_probe()
102 	up.port.rs485_config = serial8250_em485_config;  in bcm2835aux_serial_probe()
103 	up.port.rs485_supported = serial8250_em485_supported;  in bcm2835aux_serial_probe()
104 	up.rs485_start_tx = bcm2835aux_rs485_start_tx;  in bcm2835aux_serial_probe()
105 	up.rs485_stop_tx = bcm2835aux_rs485_stop_tx;  in bcm2835aux_serial_probe()
107 	/* initialize cached copy with power-on reset value */  in bcm2835aux_serial_probe()
108 	data->cntl = BCM2835_AUX_UART_CNTL_RXEN | BCM2835_AUX_UART_CNTL_TXEN;  in bcm2835aux_serial_probe()
112 	/* get the clock - this also enables the HW */  in bcm2835aux_serial_probe()
113 	data->clk = devm_clk_get_optional(&pdev->dev, NULL);  in bcm2835aux_serial_probe()
114 	if (IS_ERR(data->clk))  in bcm2835aux_serial_probe()
115 		return dev_err_probe(&pdev->dev, PTR_ERR(data->clk), "could not get clk\n");  in bcm2835aux_serial_probe()
120 		dev_err(&pdev->dev, "memory resource not found");  in bcm2835aux_serial_probe()
121 		return -EINVAL;  in bcm2835aux_serial_probe()
124 	up.port.mapbase = res->start;  in bcm2835aux_serial_probe()
125 	up.port.mapsize = resource_size(res);  in bcm2835aux_serial_probe()
127 	bcm2835_swnode = device_get_match_data(&pdev->dev);  in bcm2835aux_serial_probe()
129 		ret = device_add_software_node(&pdev->dev, bcm2835_swnode);  in bcm2835aux_serial_probe()
134 	ret = uart_read_port_properties(&up.port);  in bcm2835aux_serial_probe()
138 	up.port.regshift = 2;  in bcm2835aux_serial_probe()
139 	up.port.fifosize = 8;  in bcm2835aux_serial_probe()
142 	ret = clk_prepare_enable(data->clk);  in bcm2835aux_serial_probe()
144 		dev_err_probe(&pdev->dev, ret, "unable to enable uart clock\n");  in bcm2835aux_serial_probe()
148 	uartclk = clk_get_rate(data->clk);  in bcm2835aux_serial_probe()
150 		up.port.uartclk = uartclk;  in bcm2835aux_serial_probe()
152 	/* the HW-clock divider for bcm2835aux is 8,  in bcm2835aux_serial_probe()
154 	 * so we have to multiply the actual clock by 2  in bcm2835aux_serial_probe()
155 	 * to get identical baudrates.  in bcm2835aux_serial_probe()
157 	up.port.uartclk *= 2;  in bcm2835aux_serial_probe()
160 	ret = serial8250_register_8250_port(&up);  in bcm2835aux_serial_probe()
162 		dev_err_probe(&pdev->dev, ret, "unable to register 8250 port\n");  in bcm2835aux_serial_probe()
165 	data->line = ret;  in bcm2835aux_serial_probe()
170 	clk_disable_unprepare(data->clk);  in bcm2835aux_serial_probe()
172 	device_remove_software_node(&pdev->dev);  in bcm2835aux_serial_probe()
180 	serial8250_unregister_port(data->line);  in bcm2835aux_serial_remove()
181 	clk_disable_unprepare(data->clk);  in bcm2835aux_serial_remove()
182 	device_remove_software_node(&pdev->dev);  in bcm2835aux_serial_remove()
190  * This is due to historical reasons, see discussion here:
193  * We need to add the offset between the miniuart and auxiliary registers
194  * to get the real miniuart base address.
197 	PROPERTY_ENTRY_U32("reg-offset", 0x40),
206 	{ .compatible = "brcm,bcm2835-aux-uart" },
220 	struct uart_8250_port *up = serial8250_get_port(data->line);  in bcm2835aux_can_disable_clock()  local
225 	if (uart_console(&up->port) && !console_suspend_enabled)  in bcm2835aux_can_disable_clock()
235 	serial8250_suspend_port(data->line);  in bcm2835aux_suspend()
240 	clk_disable_unprepare(data->clk);  in bcm2835aux_suspend()
250 		ret = clk_prepare_enable(data->clk);  in bcm2835aux_resume()
255 	serial8250_resume_port(data->line);  in bcm2835aux_resume()
264 		.name = "bcm2835-aux-uart",
279 	if (!device->port.membase)  in early_bcm2835aux_setup()
280 		return -ENODEV;  in early_bcm2835aux_setup()
282 	device->port.iotype = UPIO_MEM32;  in early_bcm2835aux_setup()
283 	device->port.regshift = 2;  in early_bcm2835aux_setup()
288 OF_EARLYCON_DECLARE(bcm2835aux, "brcm,bcm2835-aux-uart",