194 static void lantiq_ssc_writel(const struct lantiq_ssc_spi *spi, u32 val,  in lantiq_ssc_writel()
203 	u32 val = __raw_readl(spi->regbase + reg);  in lantiq_ssc_maskl()  local
233 	u32 val = spi->rx_fifo_size << LTQ_SPI_RXFCON_RXFITL_S;  in rx_fifo_reset()  local
241 	u32 val = 1 << LTQ_SPI_TXFCON_TXFITL_S;  in tx_fifo_reset()  local
483 	u32 data;  in tx_fifo_write()  local
524 	u32 data;  in rx_fifo_read_full_duplex()  local
567 	u32 data, *rx32;  in rx_fifo_read_half_duplex()  local
624 static irqreturn_t lantiq_ssc_xmit_interrupt(int irq, void *data)  in lantiq_ssc_xmit_interrupt()
628 	u32 val = lantiq_ssc_readl(spi, hwcfg->irncr);  in lantiq_ssc_xmit_interrupt()  local
665 static irqreturn_t lantiq_ssc_err_interrupt(int irq, void *data)  in lantiq_ssc_err_interrupt()
670 	u32 val = lantiq_ssc_readl(spi, hwcfg->irncr);  in lantiq_ssc_err_interrupt()  local
704 static irqreturn_t intel_lgm_ssc_isr(int irq, void *data)  in intel_lgm_ssc_isr()
708 	u32 val = lantiq_ssc_readl(spi, hwcfg->irncr);  in intel_lgm_ssc_isr()  local