Lines Matching +full:reset +full:- +full:n +full:- +full:io

2  * PMC-Sierra SPC 8001 SAS/SATA based host adapters driver
4 * Copyright (c) 2008-2009 USI Co., Ltd.
18 * 3. Neither the names of the above-listed copyright holders nor the names
48 * read_main_config_table - read the configure table and save it.
53 void __iomem *address = pm8001_ha->main_cfg_tbl_addr; in read_main_config_table()
54 pm8001_ha->main_cfg_tbl.pm8001_tbl.signature = in read_main_config_table()
56 pm8001_ha->main_cfg_tbl.pm8001_tbl.interface_rev = in read_main_config_table()
58 pm8001_ha->main_cfg_tbl.pm8001_tbl.firmware_rev = in read_main_config_table()
60 pm8001_ha->main_cfg_tbl.pm8001_tbl.max_out_io = in read_main_config_table()
62 pm8001_ha->main_cfg_tbl.pm8001_tbl.max_sgl = in read_main_config_table()
64 pm8001_ha->main_cfg_tbl.pm8001_tbl.ctrl_cap_flag = in read_main_config_table()
66 pm8001_ha->main_cfg_tbl.pm8001_tbl.gst_offset = in read_main_config_table()
68 pm8001_ha->main_cfg_tbl.pm8001_tbl.inbound_queue_offset = in read_main_config_table()
70 pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_queue_offset = in read_main_config_table()
72 pm8001_ha->main_cfg_tbl.pm8001_tbl.hda_mode_flag = in read_main_config_table()
76 pm8001_ha->main_cfg_tbl.pm8001_tbl.anolog_setup_table_offset = in read_main_config_table()
80 pm8001_ha->main_cfg_tbl.pm8001_tbl.fatal_err_dump_offset0 = in read_main_config_table()
82 pm8001_ha->main_cfg_tbl.pm8001_tbl.fatal_err_dump_length0 = in read_main_config_table()
84 pm8001_ha->main_cfg_tbl.pm8001_tbl.fatal_err_dump_offset1 = in read_main_config_table()
86 pm8001_ha->main_cfg_tbl.pm8001_tbl.fatal_err_dump_length1 = in read_main_config_table()
91 * read_general_status_table - read the general status table and save it.
96 void __iomem *address = pm8001_ha->general_stat_tbl_addr; in read_general_status_table()
97 pm8001_ha->gs_tbl.pm8001_tbl.gst_len_mpistate = in read_general_status_table()
99 pm8001_ha->gs_tbl.pm8001_tbl.iq_freeze_state0 = in read_general_status_table()
101 pm8001_ha->gs_tbl.pm8001_tbl.iq_freeze_state1 = in read_general_status_table()
103 pm8001_ha->gs_tbl.pm8001_tbl.msgu_tcnt = in read_general_status_table()
105 pm8001_ha->gs_tbl.pm8001_tbl.iop_tcnt = in read_general_status_table()
107 pm8001_ha->gs_tbl.pm8001_tbl.rsvd = in read_general_status_table()
109 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[0] = in read_general_status_table()
111 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[1] = in read_general_status_table()
113 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[2] = in read_general_status_table()
115 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[3] = in read_general_status_table()
117 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[4] = in read_general_status_table()
119 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[5] = in read_general_status_table()
121 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[6] = in read_general_status_table()
123 pm8001_ha->gs_tbl.pm8001_tbl.phy_state[7] = in read_general_status_table()
125 pm8001_ha->gs_tbl.pm8001_tbl.gpio_input_val = in read_general_status_table()
127 pm8001_ha->gs_tbl.pm8001_tbl.rsvd1[0] = in read_general_status_table()
129 pm8001_ha->gs_tbl.pm8001_tbl.rsvd1[1] = in read_general_status_table()
131 pm8001_ha->gs_tbl.pm8001_tbl.recover_err_info[0] = in read_general_status_table()
133 pm8001_ha->gs_tbl.pm8001_tbl.recover_err_info[1] = in read_general_status_table()
135 pm8001_ha->gs_tbl.pm8001_tbl.recover_err_info[2] = in read_general_status_table()
137 pm8001_ha->gs_tbl.pm8001_tbl.recover_err_info[3] = in read_general_status_table()
139 pm8001_ha->gs_tbl.pm8001_tbl.recover_err_info[4] = in read_general_status_table()
141 pm8001_ha->gs_tbl.pm8001_tbl.recover_err_info[5] = in read_general_status_table()
143 pm8001_ha->gs_tbl.pm8001_tbl.recover_err_info[6] = in read_general_status_table()
145 pm8001_ha->gs_tbl.pm8001_tbl.recover_err_info[7] = in read_general_status_table()
150 * read_inbnd_queue_table - read the inbound queue table and save it.
156 void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; in read_inbnd_queue_table()
159 pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = in read_inbnd_queue_table()
161 pm8001_ha->inbnd_q_tbl[i].pi_offset = in read_inbnd_queue_table()
167 * read_outbnd_queue_table - read the outbound queue table and save it.
173 void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; in read_outbnd_queue_table()
176 pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = in read_outbnd_queue_table()
178 pm8001_ha->outbnd_q_tbl[i].ci_offset = in read_outbnd_queue_table()
184 * init_default_table_values - init the default table.
191 void __iomem *addressib = pm8001_ha->inbnd_q_tbl_addr; in init_default_table_values()
192 void __iomem *addressob = pm8001_ha->outbnd_q_tbl_addr; in init_default_table_values()
193 u32 ib_offset = pm8001_ha->ib_offset; in init_default_table_values()
194 u32 ob_offset = pm8001_ha->ob_offset; in init_default_table_values()
195 u32 ci_offset = pm8001_ha->ci_offset; in init_default_table_values()
196 u32 pi_offset = pm8001_ha->pi_offset; in init_default_table_values()
198 pm8001_ha->main_cfg_tbl.pm8001_tbl.inbound_q_nppd_hppd = 0; in init_default_table_values()
199 pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_hw_event_pid0_3 = 0; in init_default_table_values()
200 pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_hw_event_pid4_7 = 0; in init_default_table_values()
201 pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_ncq_event_pid0_3 = 0; in init_default_table_values()
202 pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_ncq_event_pid4_7 = 0; in init_default_table_values()
203 pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_tgt_ITNexus_event_pid0_3 = in init_default_table_values()
205 pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_tgt_ITNexus_event_pid4_7 = in init_default_table_values()
207 pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_tgt_ssp_event_pid0_3 = 0; in init_default_table_values()
208 pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_tgt_ssp_event_pid4_7 = 0; in init_default_table_values()
209 pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_tgt_smp_event_pid0_3 = 0; in init_default_table_values()
210 pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_tgt_smp_event_pid4_7 = 0; in init_default_table_values()
212 pm8001_ha->main_cfg_tbl.pm8001_tbl.upper_event_log_addr = in init_default_table_values()
213 pm8001_ha->memoryMap.region[AAP1].phys_addr_hi; in init_default_table_values()
214 pm8001_ha->main_cfg_tbl.pm8001_tbl.lower_event_log_addr = in init_default_table_values()
215 pm8001_ha->memoryMap.region[AAP1].phys_addr_lo; in init_default_table_values()
216 pm8001_ha->main_cfg_tbl.pm8001_tbl.event_log_size = in init_default_table_values()
218 pm8001_ha->main_cfg_tbl.pm8001_tbl.event_log_option = 0x01; in init_default_table_values()
219 pm8001_ha->main_cfg_tbl.pm8001_tbl.upper_iop_event_log_addr = in init_default_table_values()
220 pm8001_ha->memoryMap.region[IOP].phys_addr_hi; in init_default_table_values()
221 pm8001_ha->main_cfg_tbl.pm8001_tbl.lower_iop_event_log_addr = in init_default_table_values()
222 pm8001_ha->memoryMap.region[IOP].phys_addr_lo; in init_default_table_values()
223 pm8001_ha->main_cfg_tbl.pm8001_tbl.iop_event_log_size = in init_default_table_values()
225 pm8001_ha->main_cfg_tbl.pm8001_tbl.iop_event_log_option = 0x01; in init_default_table_values()
226 pm8001_ha->main_cfg_tbl.pm8001_tbl.fatal_err_interrupt = 0x01; in init_default_table_values()
227 for (i = 0; i < pm8001_ha->max_q_num; i++) { in init_default_table_values()
228 pm8001_ha->inbnd_q_tbl[i].element_pri_size_cnt = in init_default_table_values()
229 PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x00<<30); in init_default_table_values()
230 pm8001_ha->inbnd_q_tbl[i].upper_base_addr = in init_default_table_values()
231 pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_hi; in init_default_table_values()
232 pm8001_ha->inbnd_q_tbl[i].lower_base_addr = in init_default_table_values()
233 pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_lo; in init_default_table_values()
234 pm8001_ha->inbnd_q_tbl[i].base_virt = in init_default_table_values()
235 (u8 *)pm8001_ha->memoryMap.region[ib_offset + i].virt_ptr; in init_default_table_values()
236 pm8001_ha->inbnd_q_tbl[i].total_length = in init_default_table_values()
237 pm8001_ha->memoryMap.region[ib_offset + i].total_len; in init_default_table_values()
238 pm8001_ha->inbnd_q_tbl[i].ci_upper_base_addr = in init_default_table_values()
239 pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_hi; in init_default_table_values()
240 pm8001_ha->inbnd_q_tbl[i].ci_lower_base_addr = in init_default_table_values()
241 pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_lo; in init_default_table_values()
242 pm8001_ha->inbnd_q_tbl[i].ci_virt = in init_default_table_values()
243 pm8001_ha->memoryMap.region[ci_offset + i].virt_ptr; in init_default_table_values()
244 pm8001_write_32(pm8001_ha->inbnd_q_tbl[i].ci_virt, 0, 0); in init_default_table_values()
246 pm8001_ha->inbnd_q_tbl[i].pi_pci_bar = in init_default_table_values()
249 pm8001_ha->inbnd_q_tbl[i].pi_offset = in init_default_table_values()
251 pm8001_ha->inbnd_q_tbl[i].producer_idx = 0; in init_default_table_values()
252 pm8001_ha->inbnd_q_tbl[i].consumer_index = 0; in init_default_table_values()
254 for (i = 0; i < pm8001_ha->max_q_num; i++) { in init_default_table_values()
255 pm8001_ha->outbnd_q_tbl[i].element_size_cnt = in init_default_table_values()
256 PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x01<<30); in init_default_table_values()
257 pm8001_ha->outbnd_q_tbl[i].upper_base_addr = in init_default_table_values()
258 pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_hi; in init_default_table_values()
259 pm8001_ha->outbnd_q_tbl[i].lower_base_addr = in init_default_table_values()
260 pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_lo; in init_default_table_values()
261 pm8001_ha->outbnd_q_tbl[i].base_virt = in init_default_table_values()
262 (u8 *)pm8001_ha->memoryMap.region[ob_offset + i].virt_ptr; in init_default_table_values()
263 pm8001_ha->outbnd_q_tbl[i].total_length = in init_default_table_values()
264 pm8001_ha->memoryMap.region[ob_offset + i].total_len; in init_default_table_values()
265 pm8001_ha->outbnd_q_tbl[i].pi_upper_base_addr = in init_default_table_values()
266 pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_hi; in init_default_table_values()
267 pm8001_ha->outbnd_q_tbl[i].pi_lower_base_addr = in init_default_table_values()
268 pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_lo; in init_default_table_values()
269 pm8001_ha->outbnd_q_tbl[i].interrup_vec_cnt_delay = in init_default_table_values()
271 pm8001_ha->outbnd_q_tbl[i].pi_virt = in init_default_table_values()
272 pm8001_ha->memoryMap.region[pi_offset + i].virt_ptr; in init_default_table_values()
273 pm8001_write_32(pm8001_ha->outbnd_q_tbl[i].pi_virt, 0, 0); in init_default_table_values()
275 pm8001_ha->outbnd_q_tbl[i].ci_pci_bar = in init_default_table_values()
278 pm8001_ha->outbnd_q_tbl[i].ci_offset = in init_default_table_values()
280 pm8001_ha->outbnd_q_tbl[i].consumer_idx = 0; in init_default_table_values()
281 pm8001_ha->outbnd_q_tbl[i].producer_index = 0; in init_default_table_values()
286 * update_main_config_table - update the main default table to the HBA.
291 void __iomem *address = pm8001_ha->main_cfg_tbl_addr; in update_main_config_table()
293 pm8001_ha->main_cfg_tbl.pm8001_tbl.inbound_q_nppd_hppd); in update_main_config_table()
295 pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_hw_event_pid0_3); in update_main_config_table()
297 pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_hw_event_pid4_7); in update_main_config_table()
299 pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_ncq_event_pid0_3); in update_main_config_table()
301 pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_ncq_event_pid4_7); in update_main_config_table()
303 pm8001_ha->main_cfg_tbl.pm8001_tbl. in update_main_config_table()
306 pm8001_ha->main_cfg_tbl.pm8001_tbl. in update_main_config_table()
309 pm8001_ha->main_cfg_tbl.pm8001_tbl. in update_main_config_table()
312 pm8001_ha->main_cfg_tbl.pm8001_tbl. in update_main_config_table()
315 pm8001_ha->main_cfg_tbl.pm8001_tbl. in update_main_config_table()
318 pm8001_ha->main_cfg_tbl.pm8001_tbl. in update_main_config_table()
321 pm8001_ha->main_cfg_tbl.pm8001_tbl.upper_event_log_addr); in update_main_config_table()
323 pm8001_ha->main_cfg_tbl.pm8001_tbl.lower_event_log_addr); in update_main_config_table()
325 pm8001_ha->main_cfg_tbl.pm8001_tbl.event_log_size); in update_main_config_table()
327 pm8001_ha->main_cfg_tbl.pm8001_tbl.event_log_option); in update_main_config_table()
329 pm8001_ha->main_cfg_tbl.pm8001_tbl.upper_iop_event_log_addr); in update_main_config_table()
331 pm8001_ha->main_cfg_tbl.pm8001_tbl.lower_iop_event_log_addr); in update_main_config_table()
333 pm8001_ha->main_cfg_tbl.pm8001_tbl.iop_event_log_size); in update_main_config_table()
335 pm8001_ha->main_cfg_tbl.pm8001_tbl.iop_event_log_option); in update_main_config_table()
337 pm8001_ha->main_cfg_tbl.pm8001_tbl.fatal_err_interrupt); in update_main_config_table()
341 * update_inbnd_queue_table - update the inbound queue table to the HBA.
348 void __iomem *address = pm8001_ha->inbnd_q_tbl_addr; in update_inbnd_queue_table()
351 pm8001_ha->inbnd_q_tbl[number].element_pri_size_cnt); in update_inbnd_queue_table()
353 pm8001_ha->inbnd_q_tbl[number].upper_base_addr); in update_inbnd_queue_table()
355 pm8001_ha->inbnd_q_tbl[number].lower_base_addr); in update_inbnd_queue_table()
357 pm8001_ha->inbnd_q_tbl[number].ci_upper_base_addr); in update_inbnd_queue_table()
359 pm8001_ha->inbnd_q_tbl[number].ci_lower_base_addr); in update_inbnd_queue_table()
363 * update_outbnd_queue_table - update the outbound queue table to the HBA.
370 void __iomem *address = pm8001_ha->outbnd_q_tbl_addr; in update_outbnd_queue_table()
373 pm8001_ha->outbnd_q_tbl[number].element_size_cnt); in update_outbnd_queue_table()
375 pm8001_ha->outbnd_q_tbl[number].upper_base_addr); in update_outbnd_queue_table()
377 pm8001_ha->outbnd_q_tbl[number].lower_base_addr); in update_outbnd_queue_table()
379 pm8001_ha->outbnd_q_tbl[number].pi_upper_base_addr); in update_outbnd_queue_table()
381 pm8001_ha->outbnd_q_tbl[number].pi_lower_base_addr); in update_outbnd_queue_table()
383 pm8001_ha->outbnd_q_tbl[number].interrup_vec_cnt_delay); in update_outbnd_queue_table()
387 * pm8001_bar4_shift - function is called to shift BAR base address
407 "TIMEOUT:SPC_IBW_AXI_TRANSLATION_LOW = 0x%x\n", in pm8001_bar4_shift()
409 return -1; in pm8001_bar4_shift()
434 * Using shifted destination address 0x3_0000:0x1074 + 0x4000*N (N=0:3) in mpi_set_phys_g3_with_ssc()
435 * Using shifted destination address 0x4_0000:0x1074 + 0x4000*(N-4) (N=4:7) in mpi_set_phys_g3_with_ssc()
437 spin_lock_irqsave(&pm8001_ha->lock, flags); in mpi_set_phys_g3_with_ssc()
438 if (-1 == pm8001_bar4_shift(pm8001_ha, in mpi_set_phys_g3_with_ssc()
440 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in mpi_set_phys_g3_with_ssc()
448 /* shift membase 3 for SAS2_SETTINGS_LOCAL_PHY 4 - 7 */ in mpi_set_phys_g3_with_ssc()
449 if (-1 == pm8001_bar4_shift(pm8001_ha, in mpi_set_phys_g3_with_ssc()
451 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in mpi_set_phys_g3_with_ssc()
455 offset = SAS2_SETTINGS_LOCAL_PHY_4_7_OFFSET + 0x4000 * (i-4); in mpi_set_phys_g3_with_ssc()
461 Address: (via MEMBASE-III): in mpi_set_phys_g3_with_ssc()
468 Upon power-up this register will read as 0x8990c016, in mpi_set_phys_g3_with_ssc()
471 This will ensure only down-spreading SSC is enabled on the SPC. in mpi_set_phys_g3_with_ssc()
478 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in mpi_set_phys_g3_with_ssc()
502 spin_lock_irqsave(&pm8001_ha->lock, flags); in mpi_set_open_retry_interval_reg()
503 /* shift bar and set the OPEN_REJECT(RETRY) interval time of PHY 0 -3.*/ in mpi_set_open_retry_interval_reg()
504 if (-1 == pm8001_bar4_shift(pm8001_ha, in mpi_set_open_retry_interval_reg()
506 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in mpi_set_open_retry_interval_reg()
514 if (-1 == pm8001_bar4_shift(pm8001_ha, in mpi_set_open_retry_interval_reg()
516 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in mpi_set_open_retry_interval_reg()
520 offset = OPEN_RETRY_INTERVAL_PHY_4_7_OFFSET + 0x4000 * (i-4); in mpi_set_open_retry_interval_reg()
525 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in mpi_set_open_retry_interval_reg()
530 * mpi_init_check - check firmware initialization status.
547 } while ((value != 0) && (--max_wait_count)); in mpi_init_check()
550 return -1; in mpi_init_check()
551 /* check the MPI-State for initialization */ in mpi_init_check()
553 pm8001_mr32(pm8001_ha->general_stat_tbl_addr, in mpi_init_check()
556 return -1; in mpi_init_check()
560 return -1; in mpi_init_check()
565 * check_fw_ready - The LLDD check if the FW is ready, if not, return error.
579 return -1; in check_fw_ready()
586 return -1; in check_fw_ready()
589 /* bit 4-31 of scratch pad1 should be zeros if it is not in check_fw_ready()
594 return -1; in check_fw_ready()
597 /* bit 2, 4-31 of scratch pad2 should be zeros if it is not in check_fw_ready()
601 return -1; in check_fw_ready()
613 if ((--max_wait_count) == 0) in check_fw_ready()
614 return -1; in check_fw_ready()
629 pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 Offset: %x\n", offset); in init_pci_device_addresses()
632 pm8001_dbg(pm8001_ha, INIT, "Scratchpad 0 PCI BAR: %d\n", pcibar); in init_pci_device_addresses()
633 pm8001_ha->main_cfg_tbl_addr = base_addr = in init_pci_device_addresses()
634 pm8001_ha->io_mem[pcibar].memvirtaddr + offset; in init_pci_device_addresses()
635 pm8001_ha->general_stat_tbl_addr = in init_pci_device_addresses()
637 pm8001_ha->inbnd_q_tbl_addr = in init_pci_device_addresses()
639 pm8001_ha->outbnd_q_tbl_addr = in init_pci_device_addresses()
644 * pm8001_chip_init - the main init function that initialize whole PM8001 chip.
651 pci_read_config_word(pm8001_ha->pdev, PCI_DEVICE_ID, &deviceid); in pm8001_chip_init()
655 if (-1 == pm8001_bar4_shift(pm8001_ha, GSM_SM_BASE)) { in pm8001_chip_init()
657 "Shift Bar4 to 0x%x failed\n", in pm8001_chip_init()
659 return -1; in pm8001_chip_init()
663 if (-1 == check_fw_ready(pm8001_ha)) { in pm8001_chip_init()
664 pm8001_dbg(pm8001_ha, FAIL, "Firmware is not ready!\n"); in pm8001_chip_init()
665 return -EBUSY; in pm8001_chip_init()
677 for (i = 0; i < pm8001_ha->max_q_num; i++) in pm8001_chip_init()
679 for (i = 0; i < pm8001_ha->max_q_num; i++) in pm8001_chip_init()
684 /* 7->130ms, 34->500ms, 119->1.5s */ in pm8001_chip_init()
689 pm8001_dbg(pm8001_ha, INIT, "MPI initialize successful!\n"); in pm8001_chip_init()
691 return -EBUSY; in pm8001_chip_init()
692 /*This register is a 16-bit timer with a resolution of 1us. This is the in pm8001_chip_init()
712 pci_read_config_word(pm8001_ha->pdev, PCI_DEVICE_ID, &deviceid); in mpi_uninit_check()
714 if (-1 == pm8001_bar4_shift(pm8001_ha, GSM_SM_BASE)) { in mpi_uninit_check()
716 "Shift Bar4 to 0x%x failed\n", in mpi_uninit_check()
718 return -1; in mpi_uninit_check()
732 } while ((value != 0) && (--max_wait_count)); in mpi_uninit_check()
735 pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:IBDB value/=0x%x\n", in mpi_uninit_check()
737 return -1; in mpi_uninit_check()
740 /* check the MPI-State for termination in progress */ in mpi_uninit_check()
746 pm8001_mr32(pm8001_ha->general_stat_tbl_addr, in mpi_uninit_check()
751 } while (--max_wait_count); in mpi_uninit_check()
753 pm8001_dbg(pm8001_ha, FAIL, " TIME OUT MPI State = 0x%x\n", in mpi_uninit_check()
755 return -1; in mpi_uninit_check()
761 * soft_reset_ready_check - Function to check FW is ready for soft reset.
768 pm8001_dbg(pm8001_ha, FAIL, "MPI state is not ready\n"); in soft_reset_ready_check()
769 return -1; in soft_reset_ready_check()
775 pm8001_dbg(pm8001_ha, INIT, "Firmware is ready for reset.\n"); in soft_reset_ready_check()
779 spin_lock_irqsave(&pm8001_ha->lock, flags); in soft_reset_ready_check()
780 if (-1 == pm8001_bar4_shift(pm8001_ha, RB6_ACCESS_REG)) { in soft_reset_ready_check()
781 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in soft_reset_ready_check()
783 "Shift Bar4 to 0x%x failed\n", in soft_reset_ready_check()
785 return -1; in soft_reset_ready_check()
797 pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT:MSGU_SCRATCH_PAD1=0x%x, MSGU_SCRATCH_PAD2=0x%x\n", in soft_reset_ready_check()
800 "SCRATCH_PAD0 value = 0x%x\n", in soft_reset_ready_check()
803 "SCRATCH_PAD3 value = 0x%x\n", in soft_reset_ready_check()
805 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in soft_reset_ready_check()
806 return -1; in soft_reset_ready_check()
808 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in soft_reset_ready_check()
814 * pm8001_chip_soft_rst - soft reset the PM8001 chip, so that the clear all
827 /* step1: Check FW is ready for soft reset */ in pm8001_chip_soft_rst()
829 pm8001_dbg(pm8001_ha, FAIL, "FW is not ready\n"); in pm8001_chip_soft_rst()
830 return -1; in pm8001_chip_soft_rst()
836 spin_lock_irqsave(&pm8001_ha->lock, flags); in pm8001_chip_soft_rst()
837 if (-1 == pm8001_bar4_shift(pm8001_ha, MBIC_AAP1_ADDR_BASE)) { in pm8001_chip_soft_rst()
838 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_chip_soft_rst()
839 pm8001_dbg(pm8001_ha, FAIL, "Shift Bar4 to 0x%x failed\n", in pm8001_chip_soft_rst()
841 return -1; in pm8001_chip_soft_rst()
844 pm8001_dbg(pm8001_ha, INIT, "MBIC - NMI Enable VPE0 (IOP)= 0x%x\n", in pm8001_chip_soft_rst()
848 if (-1 == pm8001_bar4_shift(pm8001_ha, MBIC_IOP_ADDR_BASE)) { in pm8001_chip_soft_rst()
849 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_chip_soft_rst()
850 pm8001_dbg(pm8001_ha, FAIL, "Shift Bar4 to 0x%x failed\n", in pm8001_chip_soft_rst()
852 return -1; in pm8001_chip_soft_rst()
855 pm8001_dbg(pm8001_ha, INIT, "MBIC - NMI Enable VPE0 (AAP1)= 0x%x\n", in pm8001_chip_soft_rst()
860 pm8001_dbg(pm8001_ha, INIT, "PCIE -Event Interrupt Enable = 0x%x\n", in pm8001_chip_soft_rst()
865 pm8001_dbg(pm8001_ha, INIT, "PCIE - Event Interrupt = 0x%x\n", in pm8001_chip_soft_rst()
870 pm8001_dbg(pm8001_ha, INIT, "PCIE -Error Interrupt Enable = 0x%x\n", in pm8001_chip_soft_rst()
875 pm8001_dbg(pm8001_ha, INIT, "PCIE - Error Interrupt = 0x%x\n", regVal); in pm8001_chip_soft_rst()
884 host performs the soft reset */ in pm8001_chip_soft_rst()
889 if (-1 == pm8001_bar4_shift(pm8001_ha, GSM_ADDR_BASE)) { in pm8001_chip_soft_rst()
890 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_chip_soft_rst()
891 pm8001_dbg(pm8001_ha, FAIL, "Shift Bar4 to 0x%x failed\n", in pm8001_chip_soft_rst()
893 return -1; in pm8001_chip_soft_rst()
896 "GSM 0x0(0x00007b88)-GSM Configuration and Reset = 0x%x\n", in pm8001_chip_soft_rst()
899 /* step 3: host read GSM Configuration and Reset register */ in pm8001_chip_soft_rst()
910 /* host write GSM Configuration and Reset register */ in pm8001_chip_soft_rst()
913 "GSM 0x0 (0x00007b88 ==> 0x00004088) - GSM Configuration and Reset is set to = 0x%x\n", in pm8001_chip_soft_rst()
917 /* disable GSM - Read Address Parity Check */ in pm8001_chip_soft_rst()
920 "GSM 0x700038 - Read Address Parity Check Enable = 0x%x\n", in pm8001_chip_soft_rst()
924 "GSM 0x700038 - Read Address Parity Check Enable is set to = 0x%x\n", in pm8001_chip_soft_rst()
927 /* disable GSM - Write Address Parity Check */ in pm8001_chip_soft_rst()
930 "GSM 0x700040 - Write Address Parity Check Enable = 0x%x\n", in pm8001_chip_soft_rst()
934 "GSM 0x700040 - Write Address Parity Check Enable is set to = 0x%x\n", in pm8001_chip_soft_rst()
937 /* disable GSM - Write Data Parity Check */ in pm8001_chip_soft_rst()
939 pm8001_dbg(pm8001_ha, INIT, "GSM 0x300048 - Write Data Parity Check Enable = 0x%x\n", in pm8001_chip_soft_rst()
943 "GSM 0x300048 - Write Data Parity Check Enable is set to = 0x%x\n", in pm8001_chip_soft_rst()
948 /* step 5-b: set GPIO-0 output control to tristate anyway */ in pm8001_chip_soft_rst()
949 if (-1 == pm8001_bar4_shift(pm8001_ha, GPIO_ADDR_BASE)) { in pm8001_chip_soft_rst()
950 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_chip_soft_rst()
951 pm8001_dbg(pm8001_ha, INIT, "Shift Bar4 to 0x%x failed\n", in pm8001_chip_soft_rst()
953 return -1; in pm8001_chip_soft_rst()
956 pm8001_dbg(pm8001_ha, INIT, "GPIO Output Control Register: = 0x%x\n", in pm8001_chip_soft_rst()
958 /* set GPIO-0 output control to tri-state */ in pm8001_chip_soft_rst()
962 /* Step 6: Reset the IOP and AAP1 */ in pm8001_chip_soft_rst()
964 if (-1 == pm8001_bar4_shift(pm8001_ha, SPC_TOP_LEVEL_ADDR_BASE)) { in pm8001_chip_soft_rst()
965 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_chip_soft_rst()
966 pm8001_dbg(pm8001_ha, FAIL, "SPC Shift Bar4 to 0x%x failed\n", in pm8001_chip_soft_rst()
968 return -1; in pm8001_chip_soft_rst()
971 pm8001_dbg(pm8001_ha, INIT, "Top Register before resetting IOP/AAP1:= 0x%x\n", in pm8001_chip_soft_rst()
976 /* step 7: Reset the BDMA/OSSP */ in pm8001_chip_soft_rst()
978 pm8001_dbg(pm8001_ha, INIT, "Top Register before resetting BDMA/OSSP: = 0x%x\n", in pm8001_chip_soft_rst()
986 /* step 9: bring the BDMA and OSSP out of reset */ in pm8001_chip_soft_rst()
989 "Top Register before bringing up BDMA/OSSP:= 0x%x\n", in pm8001_chip_soft_rst()
997 /* step 11: reads and sets the GSM Configuration and Reset Register */ in pm8001_chip_soft_rst()
999 if (-1 == pm8001_bar4_shift(pm8001_ha, GSM_ADDR_BASE)) { in pm8001_chip_soft_rst()
1000 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_chip_soft_rst()
1001 pm8001_dbg(pm8001_ha, FAIL, "SPC Shift Bar4 to 0x%x failed\n", in pm8001_chip_soft_rst()
1003 return -1; in pm8001_chip_soft_rst()
1006 "GSM 0x0 (0x00007b88)-GSM Configuration and Reset = 0x%x\n", in pm8001_chip_soft_rst()
1019 …g(pm8001_ha, INIT, "GSM (0x00004088 ==> 0x00007b88) - GSM Configuration and Reset is set to = 0x%x… in pm8001_chip_soft_rst()
1022 /* step 12: Restore GSM - Read Address Parity Check */ in pm8001_chip_soft_rst()
1026 "GSM 0x700038 - Read Address Parity Check Enable = 0x%x\n", in pm8001_chip_soft_rst()
1029 pm8001_dbg(pm8001_ha, INIT, "GSM 0x700038 - Read Address Parity Check Enable is set to = 0x%x\n", in pm8001_chip_soft_rst()
1031 /* Restore GSM - Write Address Parity Check */ in pm8001_chip_soft_rst()
1035 "GSM 0x700040 - Write Address Parity Check Enable is set to = 0x%x\n", in pm8001_chip_soft_rst()
1037 /* Restore GSM - Write Data Parity Check */ in pm8001_chip_soft_rst()
1041 "GSM 0x700048 - Write Data Parity Check Enable is set to = 0x%x\n", in pm8001_chip_soft_rst()
1044 /* step 13: bring the IOP and AAP1 out of reset */ in pm8001_chip_soft_rst()
1046 if (-1 == pm8001_bar4_shift(pm8001_ha, SPC_TOP_LEVEL_ADDR_BASE)) { in pm8001_chip_soft_rst()
1047 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_chip_soft_rst()
1048 pm8001_dbg(pm8001_ha, FAIL, "Shift Bar4 to 0x%x failed\n", in pm8001_chip_soft_rst()
1050 return -1; in pm8001_chip_soft_rst()
1056 /* step 14: delay 10 usec - Normal Mode */ in pm8001_chip_soft_rst()
1058 /* check Soft Reset Normal mode or Soft Reset HDA mode */ in pm8001_chip_soft_rst()
1067 } while ((regVal != toggleVal) && (--max_wait_count)); in pm8001_chip_soft_rst()
1072 pm8001_dbg(pm8001_ha, FAIL, "TIMEOUT : ToggleVal 0x%x,MSGU_SCRATCH_PAD1 = 0x%x\n", in pm8001_chip_soft_rst()
1075 "SCRATCH_PAD0 value = 0x%x\n", in pm8001_chip_soft_rst()
1079 "SCRATCH_PAD2 value = 0x%x\n", in pm8001_chip_soft_rst()
1083 "SCRATCH_PAD3 value = 0x%x\n", in pm8001_chip_soft_rst()
1086 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_chip_soft_rst()
1087 return -1; in pm8001_chip_soft_rst()
1090 /* step 16 (Normal) - Clear ODMR and ODCR */ in pm8001_chip_soft_rst()
1095 ready - 1 sec timeout */ in pm8001_chip_soft_rst()
1097 if (check_fw_ready(pm8001_ha) == -1) { in pm8001_chip_soft_rst()
1101 "FW not ready SCRATCH_PAD1 = 0x%x\n", in pm8001_chip_soft_rst()
1106 "FW not ready SCRATCH_PAD2 = 0x%x\n", in pm8001_chip_soft_rst()
1109 "SCRATCH_PAD0 value = 0x%x\n", in pm8001_chip_soft_rst()
1113 "SCRATCH_PAD3 value = 0x%x\n", in pm8001_chip_soft_rst()
1116 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_chip_soft_rst()
1117 return -1; in pm8001_chip_soft_rst()
1121 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_chip_soft_rst()
1123 pm8001_dbg(pm8001_ha, INIT, "SPC soft reset Complete\n"); in pm8001_chip_soft_rst()
1131 pm8001_dbg(pm8001_ha, INIT, "chip reset start\n"); in pm8001_hw_chip_rst()
1133 /* do SPC chip reset. */ in pm8001_hw_chip_rst()
1141 /* bring chip reset out of reset */ in pm8001_hw_chip_rst()
1153 } while ((--i) != 0); in pm8001_hw_chip_rst()
1155 pm8001_dbg(pm8001_ha, INIT, "chip reset finished\n"); in pm8001_hw_chip_rst()
1159 * pm8001_chip_iounmap - which mapped when initialized.
1168 ** bar 0 and 1 - logical BAR0 in pm8001_chip_iounmap()
1169 ** bar 2 and 3 - logical BAR1 in pm8001_chip_iounmap()
1170 ** bar4 - logical BAR2 in pm8001_chip_iounmap()
1171 ** bar5 - logical BAR3 in pm8001_chip_iounmap()
1176 if (pm8001_ha->io_mem[logical].memvirtaddr) { in pm8001_chip_iounmap()
1177 iounmap(pm8001_ha->io_mem[logical].memvirtaddr); in pm8001_chip_iounmap()
1184 * pm8001_chip_interrupt_enable - enable PM8001 chip interrupt
1191 if (pm8001_ha->use_msix) { in pm8001_chip_interrupt_enable()
1202 * pm8001_chip_interrupt_disable - disable PM8001 chip interrupt
1209 if (pm8001_ha->use_msix) in pm8001_chip_interrupt_disable()
1217 * pm8001_mpi_msg_free_get - get the free message buffer for transfer
1233 return -1; in pm8001_mpi_msg_free_get()
1237 consumer_index = pm8001_read_32(circularQ->ci_virt); in pm8001_mpi_msg_free_get()
1238 circularQ->consumer_index = cpu_to_le32(consumer_index); in pm8001_mpi_msg_free_get()
1239 if (((circularQ->producer_idx + bcCount) % PM8001_MPI_QUEUE) == in pm8001_mpi_msg_free_get()
1240 le32_to_cpu(circularQ->consumer_index)) { in pm8001_mpi_msg_free_get()
1242 return -1; in pm8001_mpi_msg_free_get()
1245 offset = circularQ->producer_idx * messageSize; in pm8001_mpi_msg_free_get()
1247 circularQ->producer_idx = (circularQ->producer_idx + bcCount) in pm8001_mpi_msg_free_get()
1251 msgHeader = (struct mpi_msg_hdr *)(circularQ->base_virt + offset); in pm8001_mpi_msg_free_get()
1257 * pm8001_mpi_build_cmd- build the message queue for transfer, update the PI to
1273 struct inbound_queue_table *circularQ = &pm8001_ha->inbnd_q_tbl[q_index]; in pm8001_mpi_build_cmd()
1277 trace_pm80xx_mpi_build_cmd(pm8001_ha->id, opCode, htag, q_index, in pm8001_mpi_build_cmd()
1278 circularQ->producer_idx, le32_to_cpu(circularQ->consumer_index)); in pm8001_mpi_build_cmd()
1280 if (WARN_ON(q_index >= pm8001_ha->max_q_num)) in pm8001_mpi_build_cmd()
1281 return -EINVAL; in pm8001_mpi_build_cmd()
1283 spin_lock_irqsave(&circularQ->iq_lock, flags); in pm8001_mpi_build_cmd()
1284 rv = pm8001_mpi_msg_free_get(circularQ, pm8001_ha->iomb_size, in pm8001_mpi_build_cmd()
1287 pm8001_dbg(pm8001_ha, IO, "No free mpi buffer\n"); in pm8001_mpi_build_cmd()
1288 rv = -ENOMEM; in pm8001_mpi_build_cmd()
1292 if (nb > (pm8001_ha->iomb_size - sizeof(struct mpi_msg_hdr))) in pm8001_mpi_build_cmd()
1293 nb = pm8001_ha->iomb_size - sizeof(struct mpi_msg_hdr); in pm8001_mpi_build_cmd()
1295 if (nb + sizeof(struct mpi_msg_hdr) < pm8001_ha->iomb_size) in pm8001_mpi_build_cmd()
1296 memset(pMessage + nb, 0, pm8001_ha->iomb_size - in pm8001_mpi_build_cmd()
1304 pm8001_write_32((pMessage - 4), 0, cpu_to_le32(Header)); in pm8001_mpi_build_cmd()
1306 pm8001_cw32(pm8001_ha, circularQ->pi_pci_bar, in pm8001_mpi_build_cmd()
1307 circularQ->pi_offset, circularQ->producer_idx); in pm8001_mpi_build_cmd()
1309 "INB Q %x OPCODE:%x , UPDATED PI=%d CI=%d\n", in pm8001_mpi_build_cmd()
1310 responseQueue, opCode, circularQ->producer_idx, in pm8001_mpi_build_cmd()
1311 circularQ->consumer_index); in pm8001_mpi_build_cmd()
1313 spin_unlock_irqrestore(&circularQ->iq_lock, flags); in pm8001_mpi_build_cmd()
1324 msgHeader = (struct mpi_msg_hdr *)(pMsg - sizeof(struct mpi_msg_hdr)); in pm8001_mpi_msg_free_set()
1325 pOutBoundMsgHeader = (struct mpi_msg_hdr *)(circularQ->base_virt + in pm8001_mpi_msg_free_set()
1326 circularQ->consumer_idx * pm8001_ha->iomb_size); in pm8001_mpi_msg_free_set()
1329 "consumer_idx = %d msgHeader = %p\n", in pm8001_mpi_msg_free_set()
1330 circularQ->consumer_idx, msgHeader); in pm8001_mpi_msg_free_set()
1333 producer_index = pm8001_read_32(circularQ->pi_virt); in pm8001_mpi_msg_free_set()
1334 circularQ->producer_index = cpu_to_le32(producer_index); in pm8001_mpi_msg_free_set()
1336 "consumer_idx = %d producer_index = %dmsgHeader = %p\n", in pm8001_mpi_msg_free_set()
1337 circularQ->consumer_idx, in pm8001_mpi_msg_free_set()
1338 circularQ->producer_index, msgHeader); in pm8001_mpi_msg_free_set()
1342 circularQ->consumer_idx = (circularQ->consumer_idx + bc) in pm8001_mpi_msg_free_set()
1345 pm8001_cw32(pm8001_ha, circularQ->ci_pci_bar, circularQ->ci_offset, in pm8001_mpi_msg_free_set()
1346 circularQ->consumer_idx); in pm8001_mpi_msg_free_set()
1348 producer_index = pm8001_read_32(circularQ->pi_virt); in pm8001_mpi_msg_free_set()
1349 circularQ->producer_index = cpu_to_le32(producer_index); in pm8001_mpi_msg_free_set()
1350 pm8001_dbg(pm8001_ha, IO, " CI=%d PI=%d\n", in pm8001_mpi_msg_free_set()
1351 circularQ->consumer_idx, circularQ->producer_index); in pm8001_mpi_msg_free_set()
1356 * pm8001_mpi_msg_consume- get the MPI message from outbound queue
1371 /* If there are not-yet-delivered messages ... */ in pm8001_mpi_msg_consume()
1372 if (le32_to_cpu(circularQ->producer_index) in pm8001_mpi_msg_consume()
1373 != circularQ->consumer_idx) { in pm8001_mpi_msg_consume()
1376 (circularQ->base_virt + in pm8001_mpi_msg_consume()
1377 circularQ->consumer_idx * pm8001_ha->iomb_size); in pm8001_mpi_msg_consume()
1382 "outbound opcode msgheader:%x ci=%d pi=%d\n", in pm8001_mpi_msg_consume()
1383 msgHeader_tmp, circularQ->consumer_idx, in pm8001_mpi_msg_consume()
1384 circularQ->producer_index); in pm8001_mpi_msg_consume()
1393 pm8001_dbg(pm8001_ha, IO, in pm8001_mpi_msg_consume()
1394 ": CI=%d PI=%d msgHeader=%x\n", in pm8001_mpi_msg_consume()
1395 circularQ->consumer_idx, in pm8001_mpi_msg_consume()
1396 circularQ->producer_index, in pm8001_mpi_msg_consume()
1400 circularQ->consumer_idx = in pm8001_mpi_msg_consume()
1401 (circularQ->consumer_idx + in pm8001_mpi_msg_consume()
1409 circularQ->ci_pci_bar, in pm8001_mpi_msg_consume()
1410 circularQ->ci_offset, in pm8001_mpi_msg_consume()
1411 circularQ->consumer_idx); in pm8001_mpi_msg_consume()
1414 circularQ->consumer_idx = in pm8001_mpi_msg_consume()
1415 (circularQ->consumer_idx + in pm8001_mpi_msg_consume()
1421 pm8001_cw32(pm8001_ha, circularQ->ci_pci_bar, in pm8001_mpi_msg_consume()
1422 circularQ->ci_offset, in pm8001_mpi_msg_consume()
1423 circularQ->consumer_idx); in pm8001_mpi_msg_consume()
1428 void *pi_virt = circularQ->pi_virt; in pm8001_mpi_msg_consume()
1430 * kexec-ing and driver doing a doorbell access in pm8001_mpi_msg_consume()
1431 * with the pre-kexec oq interrupt setup in pm8001_mpi_msg_consume()
1437 circularQ->producer_index = cpu_to_le32(producer_index); in pm8001_mpi_msg_consume()
1439 } while (le32_to_cpu(circularQ->producer_index) != in pm8001_mpi_msg_consume()
1440 circularQ->consumer_idx); in pm8001_mpi_msg_consume()
1441 /* while we don't have any more not-yet-delivered message */ in pm8001_mpi_msg_consume()
1458 if (pw->handler != IO_FATAL_ERROR) { in pm8001_work_fn()
1459 pm8001_dev = pw->data; /* Most stash device structure */ in pm8001_work_fn()
1461 || ((pw->handler != IO_XFER_ERROR_BREAK) in pm8001_work_fn()
1462 && (pm8001_dev->dev_type == SAS_PHY_UNUSED))) { in pm8001_work_fn()
1468 switch (pw->handler) { in pm8001_work_fn()
1473 struct pm8001_hba_info *pm8001_ha = pw->pm8001_ha; in pm8001_work_fn()
1480 spin_lock_irqsave(&pm8001_ha->lock, flags); in pm8001_work_fn()
1482 spin_lock_irqsave(&t->task_state_lock, flags1); in pm8001_work_fn()
1483 if (unlikely((t->task_state_flags & SAS_TASK_STATE_DONE))) { in pm8001_work_fn()
1484 spin_unlock_irqrestore(&t->task_state_lock, flags1); in pm8001_work_fn()
1485 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_work_fn()
1488 spin_unlock_irqrestore(&t->task_state_lock, flags1); in pm8001_work_fn()
1492 ccb = &pm8001_ha->ccb_info[i]; in pm8001_work_fn()
1493 if ((ccb->ccb_tag != PM8001_INVALID_TAG) && in pm8001_work_fn()
1494 (ccb->task == t)) in pm8001_work_fn()
1498 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_work_fn()
1501 ts = &t->task_status; in pm8001_work_fn()
1502 ts->resp = SAS_TASK_COMPLETE; in pm8001_work_fn()
1504 ts->stat = SAS_QUEUE_FULL; in pm8001_work_fn()
1505 pm8001_dev = ccb->device; in pm8001_work_fn()
1507 atomic_dec(&pm8001_dev->running_req); in pm8001_work_fn()
1508 spin_lock_irqsave(&t->task_state_lock, flags1); in pm8001_work_fn()
1509 t->task_state_flags &= ~SAS_TASK_STATE_PENDING; in pm8001_work_fn()
1510 t->task_state_flags |= SAS_TASK_STATE_DONE; in pm8001_work_fn()
1511 if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { in pm8001_work_fn()
1512 spin_unlock_irqrestore(&t->task_state_lock, flags1); in pm8001_work_fn()
1513 …m8001_ha, FAIL, "task 0x%p done with event 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", in pm8001_work_fn()
1514 t, pw->handler, ts->resp, ts->stat); in pm8001_work_fn()
1516 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_work_fn()
1518 spin_unlock_irqrestore(&t->task_state_lock, flags1); in pm8001_work_fn()
1521 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_work_fn()
1522 t->task_done(t); in pm8001_work_fn()
1529 struct pm8001_hba_info *pm8001_ha = pw->pm8001_ha; in pm8001_work_fn()
1533 pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); in pm8001_work_fn()
1538 pm8001_dbg(pm8001_ha, IO, "...Task on lu\n"); in pm8001_work_fn()
1540 pm8001_dbg(pm8001_ha, IO, "...Task NOT on lu\n"); in pm8001_work_fn()
1542 pm8001_dbg(pm8001_ha, DEVIO, "...query task failed!!!\n"); in pm8001_work_fn()
1544 spin_lock_irqsave(&pm8001_ha->lock, flags); in pm8001_work_fn()
1546 spin_lock_irqsave(&t->task_state_lock, flags1); in pm8001_work_fn()
1548 if (unlikely((t->task_state_flags & SAS_TASK_STATE_DONE))) { in pm8001_work_fn()
1549 spin_unlock_irqrestore(&t->task_state_lock, flags1); in pm8001_work_fn()
1550 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_work_fn()
1556 spin_unlock_irqrestore(&t->task_state_lock, flags1); in pm8001_work_fn()
1560 ccb = &pm8001_ha->ccb_info[i]; in pm8001_work_fn()
1561 if ((ccb->ccb_tag != PM8001_INVALID_TAG) && in pm8001_work_fn()
1562 (ccb->task == t)) in pm8001_work_fn()
1566 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_work_fn()
1572 pm8001_dev = ccb->device; in pm8001_work_fn()
1573 dev = pm8001_dev->sas_device; in pm8001_work_fn()
1577 ccb->open_retry = 1; /* Snub completion */ in pm8001_work_fn()
1578 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_work_fn()
1580 ccb->open_retry = 0; in pm8001_work_fn()
1587 pm8001_dbg(pm8001_ha, IO, "...Reset phy\n"); in pm8001_work_fn()
1594 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_work_fn()
1599 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in pm8001_work_fn()
1601 pm8001_dbg(pm8001_ha, IO, "...Reset phy\n"); in pm8001_work_fn()
1608 pm8001_dbg(pm8001_ha, IO, "...Complete\n"); in pm8001_work_fn()
1611 dev = pm8001_dev->sas_device; in pm8001_work_fn()
1615 dev = pm8001_dev->sas_device; in pm8001_work_fn()
1619 dev = pm8001_dev->sas_device; in pm8001_work_fn()
1623 dev = pm8001_dev->sas_device; in pm8001_work_fn()
1628 struct pm8001_hba_info *pm8001_ha = pw->pm8001_ha; in pm8001_work_fn()
1636 ccb = &pm8001_ha->ccb_info[i]; in pm8001_work_fn()
1637 task = ccb->task; in pm8001_work_fn()
1638 ts = &task->task_status; in pm8001_work_fn()
1641 dev = task->dev; in pm8001_work_fn()
1644 "dev is NULL\n"); in pm8001_work_fn()
1649 ts->resp = SAS_TASK_COMPLETE; in pm8001_work_fn()
1650 task->task_done(task); in pm8001_work_fn()
1651 } else if (ccb->ccb_tag != PM8001_INVALID_TAG) { in pm8001_work_fn()
1652 /* complete the internal commands/non-sas task */ in pm8001_work_fn()
1653 pm8001_dev = ccb->device; in pm8001_work_fn()
1654 if (pm8001_dev->dcompletion) { in pm8001_work_fn()
1655 complete(pm8001_dev->dcompletion); in pm8001_work_fn()
1656 pm8001_dev->dcompletion = NULL; in pm8001_work_fn()
1658 complete(pm8001_ha->nvmd_completion); in pm8001_work_fn()
1664 pm8001_dev = &pm8001_ha->devices[i]; in pm8001_work_fn()
1665 device_id = pm8001_dev->device_id; in pm8001_work_fn()
1667 PM8001_CHIP_DISP->dereg_dev_req(pm8001_ha, device_id); in pm8001_work_fn()
1675 dev = pm8001_dev->sas_device; in pm8001_work_fn()
1691 pw->pm8001_ha = pm8001_ha; in pm8001_handle_event()
1692 pw->data = data; in pm8001_handle_event()
1693 pw->handler = handler; in pm8001_handle_event()
1694 INIT_WORK(&pw->work, pm8001_work_fn); in pm8001_handle_event()
1695 queue_work(pm8001_wq, &pw->work); in pm8001_handle_event()
1697 ret = -ENOMEM; in pm8001_handle_event()
1703 * mpi_ssp_completion- process the event that FW response to the SSP request.
1707 * When FW has completed a ssp request for example a IO request, after it has
1727 status = le32_to_cpu(psspPayload->status); in mpi_ssp_completion()
1728 tag = le32_to_cpu(psspPayload->tag); in mpi_ssp_completion()
1729 ccb = &pm8001_ha->ccb_info[tag]; in mpi_ssp_completion()
1730 if ((status == IO_ABORTED) && ccb->open_retry) { in mpi_ssp_completion()
1732 ccb->open_retry = 0; in mpi_ssp_completion()
1735 pm8001_dev = ccb->device; in mpi_ssp_completion()
1736 param = le32_to_cpu(psspPayload->param); in mpi_ssp_completion()
1738 t = ccb->task; in mpi_ssp_completion()
1741 pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", status); in mpi_ssp_completion()
1742 if (unlikely(!t || !t->lldd_task || !t->dev)) in mpi_ssp_completion()
1744 ts = &t->task_status; in mpi_ssp_completion()
1745 /* Print sas address of IO failed device */ in mpi_ssp_completion()
1748 pm8001_dbg(pm8001_ha, FAIL, "SAS Address of IO Failure Drive:%016llx\n", in mpi_ssp_completion()
1749 SAS_ADDR(t->dev->sas_addr)); in mpi_ssp_completion()
1753 "status:0x%x, tag:0x%x, task:0x%p\n", in mpi_ssp_completion()
1758 pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS,param = %d\n", in mpi_ssp_completion()
1761 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1762 ts->stat = SAS_SAM_STAT_GOOD; in mpi_ssp_completion()
1764 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1765 ts->stat = SAS_PROTO_RESPONSE; in mpi_ssp_completion()
1766 ts->residual = param; in mpi_ssp_completion()
1767 iu = &psspPayload->ssp_resp_iu; in mpi_ssp_completion()
1768 sas_ssp_task_response(pm8001_ha->dev, t, iu); in mpi_ssp_completion()
1771 atomic_dec(&pm8001_dev->running_req); in mpi_ssp_completion()
1774 pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n"); in mpi_ssp_completion()
1775 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1776 ts->stat = SAS_ABORTED_TASK; in mpi_ssp_completion()
1780 pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW,param = %d\n", in mpi_ssp_completion()
1782 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1783 ts->stat = SAS_DATA_UNDERRUN; in mpi_ssp_completion()
1784 ts->residual = param; in mpi_ssp_completion()
1786 atomic_dec(&pm8001_dev->running_req); in mpi_ssp_completion()
1789 pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); in mpi_ssp_completion()
1790 ts->resp = SAS_TASK_UNDELIVERED; in mpi_ssp_completion()
1791 ts->stat = SAS_PHY_DOWN; in mpi_ssp_completion()
1794 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); in mpi_ssp_completion()
1795 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1796 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1798 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_ssp_completion()
1801 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); in mpi_ssp_completion()
1802 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1803 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1804 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_ssp_completion()
1807 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_completion()
1808 "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); in mpi_ssp_completion()
1809 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1810 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1811 ts->open_rej_reason = SAS_OREJ_EPROTO; in mpi_ssp_completion()
1814 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_completion()
1815 "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); in mpi_ssp_completion()
1816 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1817 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1818 ts->open_rej_reason = SAS_OREJ_UNKNOWN; in mpi_ssp_completion()
1821 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); in mpi_ssp_completion()
1822 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1823 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1824 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_ssp_completion()
1827 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); in mpi_ssp_completion()
1828 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1829 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1830 ts->open_rej_reason = SAS_OREJ_UNKNOWN; in mpi_ssp_completion()
1831 if (!t->uldd_task) in mpi_ssp_completion()
1837 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_completion()
1838 "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); in mpi_ssp_completion()
1839 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1840 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1841 ts->open_rej_reason = SAS_OREJ_BAD_DEST; in mpi_ssp_completion()
1844 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); in mpi_ssp_completion()
1845 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1846 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1847 ts->open_rej_reason = SAS_OREJ_CONN_RATE; in mpi_ssp_completion()
1850 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_completion()
1851 "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); in mpi_ssp_completion()
1852 ts->resp = SAS_TASK_UNDELIVERED; in mpi_ssp_completion()
1853 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1854 ts->open_rej_reason = SAS_OREJ_WRONG_DEST; in mpi_ssp_completion()
1857 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); in mpi_ssp_completion()
1858 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1859 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1860 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_ssp_completion()
1863 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); in mpi_ssp_completion()
1864 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1865 ts->stat = SAS_NAK_R_ERR; in mpi_ssp_completion()
1868 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n"); in mpi_ssp_completion()
1869 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1870 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1873 pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); in mpi_ssp_completion()
1874 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1875 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1876 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_ssp_completion()
1879 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); in mpi_ssp_completion()
1880 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1881 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1884 pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); in mpi_ssp_completion()
1885 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1886 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1889 pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); in mpi_ssp_completion()
1890 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1891 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1892 if (!t->uldd_task) in mpi_ssp_completion()
1898 pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); in mpi_ssp_completion()
1899 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1900 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1903 pm8001_dbg(pm8001_ha, IO, "IO_TM_TAG_NOT_FOUND\n"); in mpi_ssp_completion()
1904 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1905 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1908 pm8001_dbg(pm8001_ha, IO, "IO_SSP_EXT_IU_ZERO_LEN_ERROR\n"); in mpi_ssp_completion()
1909 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1910 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1913 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_completion()
1914 "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"); in mpi_ssp_completion()
1915 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1916 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1917 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_ssp_completion()
1920 pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status); in mpi_ssp_completion()
1922 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_completion()
1923 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_completion()
1926 pm8001_dbg(pm8001_ha, IO, "scsi_status = %x\n", in mpi_ssp_completion()
1927 psspPayload->ssp_resp_iu.status); in mpi_ssp_completion()
1928 spin_lock_irqsave(&t->task_state_lock, flags); in mpi_ssp_completion()
1929 t->task_state_flags &= ~SAS_TASK_STATE_PENDING; in mpi_ssp_completion()
1930 t->task_state_flags |= SAS_TASK_STATE_DONE; in mpi_ssp_completion()
1931 if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { in mpi_ssp_completion()
1932 spin_unlock_irqrestore(&t->task_state_lock, flags); in mpi_ssp_completion()
1933 …1_ha, FAIL, "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", in mpi_ssp_completion()
1934 t, status, ts->resp, ts->stat); in mpi_ssp_completion()
1937 spin_unlock_irqrestore(&t->task_state_lock, flags); in mpi_ssp_completion()
1940 t->task_done(t); in mpi_ssp_completion()
1954 u32 event = le32_to_cpu(psspPayload->event); in mpi_ssp_event()
1955 u32 tag = le32_to_cpu(psspPayload->tag); in mpi_ssp_event()
1956 u32 port_id = le32_to_cpu(psspPayload->port_id); in mpi_ssp_event()
1957 u32 dev_id = le32_to_cpu(psspPayload->device_id); in mpi_ssp_event()
1959 ccb = &pm8001_ha->ccb_info[tag]; in mpi_ssp_event()
1960 t = ccb->task; in mpi_ssp_event()
1961 pm8001_dev = ccb->device; in mpi_ssp_event()
1963 pm8001_dbg(pm8001_ha, FAIL, "sas IO status 0x%x\n", event); in mpi_ssp_event()
1964 if (unlikely(!t || !t->lldd_task || !t->dev)) in mpi_ssp_event()
1966 ts = &t->task_status; in mpi_ssp_event()
1967 pm8001_dbg(pm8001_ha, DEVIO, "port_id = %x,device_id = %x\n", in mpi_ssp_event()
1971 pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); in mpi_ssp_event()
1972 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
1973 ts->stat = SAS_DATA_OVERRUN; in mpi_ssp_event()
1974 ts->residual = 0; in mpi_ssp_event()
1976 atomic_dec(&pm8001_dev->running_req); in mpi_ssp_event()
1979 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); in mpi_ssp_event()
1983 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); in mpi_ssp_event()
1984 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
1985 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_event()
1986 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_ssp_event()
1989 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); in mpi_ssp_event()
1990 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
1991 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_event()
1992 ts->open_rej_reason = SAS_OREJ_EPROTO; in mpi_ssp_event()
1995 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_event()
1996 "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); in mpi_ssp_event()
1997 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
1998 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_event()
1999 ts->open_rej_reason = SAS_OREJ_UNKNOWN; in mpi_ssp_event()
2002 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); in mpi_ssp_event()
2003 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
2004 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_event()
2005 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_ssp_event()
2008 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); in mpi_ssp_event()
2009 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
2010 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_event()
2011 ts->open_rej_reason = SAS_OREJ_UNKNOWN; in mpi_ssp_event()
2012 if (!t->uldd_task) in mpi_ssp_event()
2018 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_event()
2019 "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); in mpi_ssp_event()
2020 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
2021 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_event()
2022 ts->open_rej_reason = SAS_OREJ_BAD_DEST; in mpi_ssp_event()
2025 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); in mpi_ssp_event()
2026 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
2027 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_event()
2028 ts->open_rej_reason = SAS_OREJ_CONN_RATE; in mpi_ssp_event()
2031 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_event()
2032 "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); in mpi_ssp_event()
2033 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
2034 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_event()
2035 ts->open_rej_reason = SAS_OREJ_WRONG_DEST; in mpi_ssp_event()
2038 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); in mpi_ssp_event()
2039 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
2040 ts->stat = SAS_OPEN_REJECT; in mpi_ssp_event()
2041 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_ssp_event()
2044 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); in mpi_ssp_event()
2045 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
2046 ts->stat = SAS_NAK_R_ERR; in mpi_ssp_event()
2049 pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); in mpi_ssp_event()
2053 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n"); in mpi_ssp_event()
2054 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
2055 ts->stat = SAS_DATA_OVERRUN; in mpi_ssp_event()
2058 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n"); in mpi_ssp_event()
2059 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
2060 ts->stat = SAS_DATA_OVERRUN; in mpi_ssp_event()
2063 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_event()
2064 "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"); in mpi_ssp_event()
2065 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
2066 ts->stat = SAS_DATA_OVERRUN; in mpi_ssp_event()
2069 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_event()
2070 "IO_XFER_ERROR_CMD_ISSUE_ACK_NAK_TIMEOUT\n"); in mpi_ssp_event()
2071 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
2072 ts->stat = SAS_DATA_OVERRUN; in mpi_ssp_event()
2075 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); in mpi_ssp_event()
2076 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
2077 ts->stat = SAS_DATA_OVERRUN; in mpi_ssp_event()
2080 pm8001_dbg(pm8001_ha, IO, in mpi_ssp_event()
2081 "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"); in mpi_ssp_event()
2082 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
2083 ts->stat = SAS_DATA_OVERRUN; in mpi_ssp_event()
2086 pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n"); in mpi_ssp_event()
2089 pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", event); in mpi_ssp_event()
2091 ts->resp = SAS_TASK_COMPLETE; in mpi_ssp_event()
2092 ts->stat = SAS_DATA_OVERRUN; in mpi_ssp_event()
2095 spin_lock_irqsave(&t->task_state_lock, flags); in mpi_ssp_event()
2096 t->task_state_flags &= ~SAS_TASK_STATE_PENDING; in mpi_ssp_event()
2097 t->task_state_flags |= SAS_TASK_STATE_DONE; in mpi_ssp_event()
2098 if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { in mpi_ssp_event()
2099 spin_unlock_irqrestore(&t->task_state_lock, flags); in mpi_ssp_event()
2100 …m8001_ha, FAIL, "task 0x%p done with event 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", in mpi_ssp_event()
2101 t, event, ts->resp, ts->stat); in mpi_ssp_event()
2104 spin_unlock_irqrestore(&t->task_state_lock, flags); in mpi_ssp_event()
2107 t->task_done(t); in mpi_ssp_event()
2133 status = le32_to_cpu(psataPayload->status); in mpi_sata_completion()
2134 param = le32_to_cpu(psataPayload->param); in mpi_sata_completion()
2135 tag = le32_to_cpu(psataPayload->tag); in mpi_sata_completion()
2137 ccb = &pm8001_ha->ccb_info[tag]; in mpi_sata_completion()
2138 t = ccb->task; in mpi_sata_completion()
2139 pm8001_dev = ccb->device; in mpi_sata_completion()
2142 if (t->dev && (t->dev->lldd_dev)) in mpi_sata_completion()
2143 pm8001_dev = t->dev->lldd_dev; in mpi_sata_completion()
2145 pm8001_dbg(pm8001_ha, FAIL, "task null, freeing CCB tag %d\n", in mpi_sata_completion()
2146 ccb->ccb_tag); in mpi_sata_completion()
2151 if (pm8001_dev && unlikely(!t || !t->lldd_task || !t->dev)) { in mpi_sata_completion()
2152 pm8001_dbg(pm8001_ha, FAIL, "task or dev null\n"); in mpi_sata_completion()
2156 ts = &t->task_status; in mpi_sata_completion()
2160 "status:0x%x, tag:0x%x, task::0x%p\n", in mpi_sata_completion()
2163 /* Print sas address of IO failed device */ in mpi_sata_completion()
2166 if (!((t->dev->parent) && in mpi_sata_completion()
2167 (dev_is_expander(t->dev->parent->dev_type)))) { in mpi_sata_completion()
2169 sata_addr_low[i] = pm8001_ha->sas_addr[j]; in mpi_sata_completion()
2171 sata_addr_hi[i] = pm8001_ha->sas_addr[j]; in mpi_sata_completion()
2191 pm8001_dev->attached_phy + in mpi_sata_completion()
2194 "SAS Address of IO Failure Drive:%08x%08x\n", in mpi_sata_completion()
2199 "SAS Address of IO Failure Drive:%016llx\n", in mpi_sata_completion()
2200 SAS_ADDR(t->dev->sas_addr)); in mpi_sata_completion()
2205 pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n"); in mpi_sata_completion()
2207 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2208 ts->stat = SAS_SAM_STAT_GOOD; in mpi_sata_completion()
2211 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2212 ts->stat = SAS_PROTO_RESPONSE; in mpi_sata_completion()
2213 ts->residual = param; in mpi_sata_completion()
2214 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2215 "SAS_PROTO_RESPONSE len = %d\n", in mpi_sata_completion()
2217 sata_resp = &psataPayload->sata_resp[0]; in mpi_sata_completion()
2218 resp = (struct ata_task_resp *)ts->buf; in mpi_sata_completion()
2219 if (t->ata_task.dma_xfer == 0 && in mpi_sata_completion()
2220 t->data_dir == DMA_FROM_DEVICE) { in mpi_sata_completion()
2222 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2223 "PIO read len = %d\n", len); in mpi_sata_completion()
2224 } else if (t->ata_task.use_ncq && in mpi_sata_completion()
2225 t->data_dir != DMA_NONE) { in mpi_sata_completion()
2227 pm8001_dbg(pm8001_ha, IO, "FPDMA len = %d\n", in mpi_sata_completion()
2231 pm8001_dbg(pm8001_ha, IO, "other len = %d\n", in mpi_sata_completion()
2235 resp->frame_len = len; in mpi_sata_completion()
2236 memcpy(&resp->ending_fis[0], sata_resp, len); in mpi_sata_completion()
2237 ts->buf_valid_size = sizeof(*resp); in mpi_sata_completion()
2239 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2240 "response too large\n"); in mpi_sata_completion()
2243 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2246 pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB Tag\n"); in mpi_sata_completion()
2247 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2248 ts->stat = SAS_ABORTED_TASK; in mpi_sata_completion()
2250 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2255 pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW param = %d\n", param); in mpi_sata_completion()
2256 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2257 ts->stat = SAS_DATA_UNDERRUN; in mpi_sata_completion()
2258 ts->residual = param; in mpi_sata_completion()
2260 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2263 pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); in mpi_sata_completion()
2264 ts->resp = SAS_TASK_UNDELIVERED; in mpi_sata_completion()
2265 ts->stat = SAS_PHY_DOWN; in mpi_sata_completion()
2267 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2270 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); in mpi_sata_completion()
2271 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2272 ts->stat = SAS_INTERRUPTED; in mpi_sata_completion()
2274 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2277 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); in mpi_sata_completion()
2278 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2279 ts->stat = SAS_OPEN_REJECT; in mpi_sata_completion()
2280 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_sata_completion()
2282 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2285 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); in mpi_sata_completion()
2286 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2287 ts->stat = SAS_OPEN_REJECT; in mpi_sata_completion()
2288 ts->open_rej_reason = SAS_OREJ_EPROTO; in mpi_sata_completion()
2290 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2293 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2294 "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); in mpi_sata_completion()
2295 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2296 ts->stat = SAS_OPEN_REJECT; in mpi_sata_completion()
2297 ts->open_rej_reason = SAS_OREJ_UNKNOWN; in mpi_sata_completion()
2299 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2302 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); in mpi_sata_completion()
2303 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2304 ts->stat = SAS_OPEN_REJECT; in mpi_sata_completion()
2305 ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; in mpi_sata_completion()
2307 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2310 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); in mpi_sata_completion()
2311 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2312 ts->stat = SAS_DEV_NO_RESPONSE; in mpi_sata_completion()
2313 if (!t->uldd_task) { in mpi_sata_completion()
2317 ts->resp = SAS_TASK_UNDELIVERED; in mpi_sata_completion()
2318 ts->stat = SAS_QUEUE_FULL; in mpi_sata_completion()
2324 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2325 "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); in mpi_sata_completion()
2326 ts->resp = SAS_TASK_UNDELIVERED; in mpi_sata_completion()
2327 ts->stat = SAS_OPEN_REJECT; in mpi_sata_completion()
2328 ts->open_rej_reason = SAS_OREJ_BAD_DEST; in mpi_sata_completion()
2329 if (!t->uldd_task) { in mpi_sata_completion()
2333 ts->resp = SAS_TASK_UNDELIVERED; in mpi_sata_completion()
2334 ts->stat = SAS_QUEUE_FULL; in mpi_sata_completion()
2340 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); in mpi_sata_completion()
2341 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2342 ts->stat = SAS_OPEN_REJECT; in mpi_sata_completion()
2343 ts->open_rej_reason = SAS_OREJ_CONN_RATE; in mpi_sata_completion()
2345 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2348 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_STP_RESOURCES_BUSY\n"); in mpi_sata_completion()
2349 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2350 ts->stat = SAS_DEV_NO_RESPONSE; in mpi_sata_completion()
2351 if (!t->uldd_task) { in mpi_sata_completion()
2355 ts->resp = SAS_TASK_UNDELIVERED; in mpi_sata_completion()
2356 ts->stat = SAS_QUEUE_FULL; in mpi_sata_completion()
2362 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2363 "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); in mpi_sata_completion()
2364 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2365 ts->stat = SAS_OPEN_REJECT; in mpi_sata_completion()
2366 ts->open_rej_reason = SAS_OREJ_WRONG_DEST; in mpi_sata_completion()
2368 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2371 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); in mpi_sata_completion()
2372 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2373 ts->stat = SAS_NAK_R_ERR; in mpi_sata_completion()
2375 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2378 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_ACK_NAK_TIMEOUT\n"); in mpi_sata_completion()
2379 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2380 ts->stat = SAS_NAK_R_ERR; in mpi_sata_completion()
2382 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2385 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_DMA\n"); in mpi_sata_completion()
2386 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2387 ts->stat = SAS_ABORTED_TASK; in mpi_sata_completion()
2389 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2392 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_SATA_LINK_TIMEOUT\n"); in mpi_sata_completion()
2393 ts->resp = SAS_TASK_UNDELIVERED; in mpi_sata_completion()
2394 ts->stat = SAS_DEV_NO_RESPONSE; in mpi_sata_completion()
2396 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2399 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n"); in mpi_sata_completion()
2400 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2401 ts->stat = SAS_DATA_UNDERRUN; in mpi_sata_completion()
2403 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2406 pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); in mpi_sata_completion()
2407 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2408 ts->stat = SAS_OPEN_TO; in mpi_sata_completion()
2410 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2413 pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); in mpi_sata_completion()
2414 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2415 ts->stat = SAS_DEV_NO_RESPONSE; in mpi_sata_completion()
2417 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2420 pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); in mpi_sata_completion()
2421 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2422 ts->stat = SAS_DEV_NO_RESPONSE; in mpi_sata_completion()
2423 if (!t->uldd_task) { in mpi_sata_completion()
2426 ts->resp = SAS_TASK_UNDELIVERED; in mpi_sata_completion()
2427 ts->stat = SAS_QUEUE_FULL; in mpi_sata_completion()
2433 pm8001_dbg(pm8001_ha, IO, " IO_DS_IN_RECOVERY\n"); in mpi_sata_completion()
2434 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2435 ts->stat = SAS_DEV_NO_RESPONSE; in mpi_sata_completion()
2437 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2440 pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_ERROR\n"); in mpi_sata_completion()
2441 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2442 ts->stat = SAS_DEV_NO_RESPONSE; in mpi_sata_completion()
2443 if (!t->uldd_task) { in mpi_sata_completion()
2446 ts->resp = SAS_TASK_UNDELIVERED; in mpi_sata_completion()
2447 ts->stat = SAS_QUEUE_FULL; in mpi_sata_completion()
2453 pm8001_dbg(pm8001_ha, IO, in mpi_sata_completion()
2454 "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"); in mpi_sata_completion()
2455 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2456 ts->stat = SAS_OPEN_REJECT; in mpi_sata_completion()
2457 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_sata_completion()
2459 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2462 pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status); in mpi_sata_completion()
2464 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_completion()
2465 ts->stat = SAS_DEV_NO_RESPONSE; in mpi_sata_completion()
2467 atomic_dec(&pm8001_dev->running_req); in mpi_sata_completion()
2470 spin_lock_irqsave(&t->task_state_lock, flags); in mpi_sata_completion()
2471 t->task_state_flags &= ~SAS_TASK_STATE_PENDING; in mpi_sata_completion()
2472 t->task_state_flags |= SAS_TASK_STATE_DONE; in mpi_sata_completion()
2473 if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { in mpi_sata_completion()
2474 spin_unlock_irqrestore(&t->task_state_lock, flags); in mpi_sata_completion()
2476 "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", in mpi_sata_completion()
2477 t, status, ts->resp, ts->stat); in mpi_sata_completion()
2480 spin_unlock_irqrestore(&t->task_state_lock, flags); in mpi_sata_completion()
2494 u32 event = le32_to_cpu(psataPayload->event); in mpi_sata_event()
2495 u32 tag = le32_to_cpu(psataPayload->tag); in mpi_sata_event()
2496 u32 port_id = le32_to_cpu(psataPayload->port_id); in mpi_sata_event()
2497 u32 dev_id = le32_to_cpu(psataPayload->device_id); in mpi_sata_event()
2500 pm8001_dbg(pm8001_ha, FAIL, "SATA EVENT 0x%x\n", event); in mpi_sata_event()
2513 ccb = &pm8001_ha->ccb_info[tag]; in mpi_sata_event()
2514 t = ccb->task; in mpi_sata_event()
2515 pm8001_dev = ccb->device; in mpi_sata_event()
2517 pm8001_dbg(pm8001_ha, FAIL, "sata IO status 0x%x\n", event); in mpi_sata_event()
2520 pm8001_dbg(pm8001_ha, FAIL, "task null, freeing CCB tag %d\n", in mpi_sata_event()
2521 ccb->ccb_tag); in mpi_sata_event()
2526 if (unlikely(!t->lldd_task || !t->dev)) in mpi_sata_event()
2529 ts = &t->task_status; in mpi_sata_event()
2531 "port_id:0x%x, device_id:0x%x, tag:0x%x, event:0x%x\n", in mpi_sata_event()
2535 pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); in mpi_sata_event()
2536 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2537 ts->stat = SAS_DATA_OVERRUN; in mpi_sata_event()
2538 ts->residual = 0; in mpi_sata_event()
2541 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); in mpi_sata_event()
2542 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2543 ts->stat = SAS_INTERRUPTED; in mpi_sata_event()
2546 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); in mpi_sata_event()
2547 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2548 ts->stat = SAS_OPEN_REJECT; in mpi_sata_event()
2549 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_sata_event()
2552 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); in mpi_sata_event()
2553 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2554 ts->stat = SAS_OPEN_REJECT; in mpi_sata_event()
2555 ts->open_rej_reason = SAS_OREJ_EPROTO; in mpi_sata_event()
2558 pm8001_dbg(pm8001_ha, IO, in mpi_sata_event()
2559 "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); in mpi_sata_event()
2560 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2561 ts->stat = SAS_OPEN_REJECT; in mpi_sata_event()
2562 ts->open_rej_reason = SAS_OREJ_UNKNOWN; in mpi_sata_event()
2565 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); in mpi_sata_event()
2566 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2567 ts->stat = SAS_OPEN_REJECT; in mpi_sata_event()
2568 ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; in mpi_sata_event()
2571 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); in mpi_sata_event()
2572 ts->resp = SAS_TASK_UNDELIVERED; in mpi_sata_event()
2573 ts->stat = SAS_DEV_NO_RESPONSE; in mpi_sata_event()
2574 if (!t->uldd_task) { in mpi_sata_event()
2578 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2579 ts->stat = SAS_QUEUE_FULL; in mpi_sata_event()
2584 pm8001_dbg(pm8001_ha, IO, in mpi_sata_event()
2585 "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); in mpi_sata_event()
2586 ts->resp = SAS_TASK_UNDELIVERED; in mpi_sata_event()
2587 ts->stat = SAS_OPEN_REJECT; in mpi_sata_event()
2588 ts->open_rej_reason = SAS_OREJ_BAD_DEST; in mpi_sata_event()
2591 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); in mpi_sata_event()
2592 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2593 ts->stat = SAS_OPEN_REJECT; in mpi_sata_event()
2594 ts->open_rej_reason = SAS_OREJ_CONN_RATE; in mpi_sata_event()
2597 pm8001_dbg(pm8001_ha, IO, in mpi_sata_event()
2598 "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); in mpi_sata_event()
2599 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2600 ts->stat = SAS_OPEN_REJECT; in mpi_sata_event()
2601 ts->open_rej_reason = SAS_OREJ_WRONG_DEST; in mpi_sata_event()
2604 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_NAK_RECEIVED\n"); in mpi_sata_event()
2605 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2606 ts->stat = SAS_NAK_R_ERR; in mpi_sata_event()
2609 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PEER_ABORTED\n"); in mpi_sata_event()
2610 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2611 ts->stat = SAS_NAK_R_ERR; in mpi_sata_event()
2614 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_REJECTED_NCQ_MODE\n"); in mpi_sata_event()
2615 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2616 ts->stat = SAS_DATA_UNDERRUN; in mpi_sata_event()
2619 pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); in mpi_sata_event()
2620 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2621 ts->stat = SAS_OPEN_TO; in mpi_sata_event()
2624 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_UNEXPECTED_PHASE\n"); in mpi_sata_event()
2625 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2626 ts->stat = SAS_OPEN_TO; in mpi_sata_event()
2629 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_XFER_RDY_OVERRUN\n"); in mpi_sata_event()
2630 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2631 ts->stat = SAS_OPEN_TO; in mpi_sata_event()
2634 pm8001_dbg(pm8001_ha, IO, in mpi_sata_event()
2635 "IO_XFER_ERROR_XFER_RDY_NOT_EXPECTED\n"); in mpi_sata_event()
2636 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2637 ts->stat = SAS_OPEN_TO; in mpi_sata_event()
2640 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_OFFSET_MISMATCH\n"); in mpi_sata_event()
2641 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2642 ts->stat = SAS_OPEN_TO; in mpi_sata_event()
2645 pm8001_dbg(pm8001_ha, IO, in mpi_sata_event()
2646 "IO_XFER_ERROR_XFER_ZERO_DATA_LEN\n"); in mpi_sata_event()
2647 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2648 ts->stat = SAS_OPEN_TO; in mpi_sata_event()
2651 pm8001_dbg(pm8001_ha, IO, "IO_XFER_CMD_FRAME_ISSUED\n"); in mpi_sata_event()
2654 pm8001_dbg(pm8001_ha, IO, "IO_XFER_PIO_SETUP_ERROR\n"); in mpi_sata_event()
2655 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2656 ts->stat = SAS_OPEN_TO; in mpi_sata_event()
2659 pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", event); in mpi_sata_event()
2661 ts->resp = SAS_TASK_COMPLETE; in mpi_sata_event()
2662 ts->stat = SAS_OPEN_TO; in mpi_sata_event()
2681 status = le32_to_cpu(psmpPayload->status); in mpi_smp_completion()
2682 tag = le32_to_cpu(psmpPayload->tag); in mpi_smp_completion()
2684 ccb = &pm8001_ha->ccb_info[tag]; in mpi_smp_completion()
2685 t = ccb->task; in mpi_smp_completion()
2686 ts = &t->task_status; in mpi_smp_completion()
2687 pm8001_dev = ccb->device; in mpi_smp_completion()
2689 pm8001_dbg(pm8001_ha, FAIL, "smp IO status 0x%x\n", status); in mpi_smp_completion()
2691 "status:0x%x, tag:0x%x, task:0x%p\n", in mpi_smp_completion()
2694 if (unlikely(!t || !t->lldd_task || !t->dev)) in mpi_smp_completion()
2699 pm8001_dbg(pm8001_ha, IO, "IO_SUCCESS\n"); in mpi_smp_completion()
2700 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2701 ts->stat = SAS_SAM_STAT_GOOD; in mpi_smp_completion()
2703 atomic_dec(&pm8001_dev->running_req); in mpi_smp_completion()
2706 pm8001_dbg(pm8001_ha, IO, "IO_ABORTED IOMB\n"); in mpi_smp_completion()
2707 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2708 ts->stat = SAS_ABORTED_TASK; in mpi_smp_completion()
2710 atomic_dec(&pm8001_dev->running_req); in mpi_smp_completion()
2713 pm8001_dbg(pm8001_ha, IO, "IO_UNDERFLOW\n"); in mpi_smp_completion()
2714 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2715 ts->stat = SAS_DATA_OVERRUN; in mpi_smp_completion()
2716 ts->residual = 0; in mpi_smp_completion()
2718 atomic_dec(&pm8001_dev->running_req); in mpi_smp_completion()
2721 pm8001_dbg(pm8001_ha, IO, "IO_NO_DEVICE\n"); in mpi_smp_completion()
2722 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2723 ts->stat = SAS_PHY_DOWN; in mpi_smp_completion()
2726 pm8001_dbg(pm8001_ha, IO, "IO_ERROR_HW_TIMEOUT\n"); in mpi_smp_completion()
2727 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2728 ts->stat = SAS_SAM_STAT_BUSY; in mpi_smp_completion()
2731 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_BREAK\n"); in mpi_smp_completion()
2732 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2733 ts->stat = SAS_SAM_STAT_BUSY; in mpi_smp_completion()
2736 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_PHY_NOT_READY\n"); in mpi_smp_completion()
2737 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2738 ts->stat = SAS_SAM_STAT_BUSY; in mpi_smp_completion()
2741 pm8001_dbg(pm8001_ha, IO, in mpi_smp_completion()
2742 "IO_OPEN_CNX_ERROR_PROTOCOL_NOT_SUPPORTED\n"); in mpi_smp_completion()
2743 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2744 ts->stat = SAS_OPEN_REJECT; in mpi_smp_completion()
2745 ts->open_rej_reason = SAS_OREJ_UNKNOWN; in mpi_smp_completion()
2748 pm8001_dbg(pm8001_ha, IO, in mpi_smp_completion()
2749 "IO_OPEN_CNX_ERROR_ZONE_VIOLATION\n"); in mpi_smp_completion()
2750 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2751 ts->stat = SAS_OPEN_REJECT; in mpi_smp_completion()
2752 ts->open_rej_reason = SAS_OREJ_UNKNOWN; in mpi_smp_completion()
2755 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_BREAK\n"); in mpi_smp_completion()
2756 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2757 ts->stat = SAS_OPEN_REJECT; in mpi_smp_completion()
2758 ts->open_rej_reason = SAS_OREJ_RSVD_CONT0; in mpi_smp_completion()
2761 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_IT_NEXUS_LOSS\n"); in mpi_smp_completion()
2762 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2763 ts->stat = SAS_OPEN_REJECT; in mpi_smp_completion()
2764 ts->open_rej_reason = SAS_OREJ_UNKNOWN; in mpi_smp_completion()
2770 pm8001_dbg(pm8001_ha, IO, in mpi_smp_completion()
2771 "IO_OPEN_CNX_ERROR_BAD_DESTINATION\n"); in mpi_smp_completion()
2772 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2773 ts->stat = SAS_OPEN_REJECT; in mpi_smp_completion()
2774 ts->open_rej_reason = SAS_OREJ_BAD_DEST; in mpi_smp_completion()
2777 pm8001_dbg(pm8001_ha, IO, "IO_OPEN_CNX_ERROR_CONNECTION_RATE_NOT_SUPPORTED\n"); in mpi_smp_completion()
2778 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2779 ts->stat = SAS_OPEN_REJECT; in mpi_smp_completion()
2780 ts->open_rej_reason = SAS_OREJ_CONN_RATE; in mpi_smp_completion()
2783 pm8001_dbg(pm8001_ha, IO, in mpi_smp_completion()
2784 "IO_OPEN_CNX_ERROR_WRONG_DESTINATION\n"); in mpi_smp_completion()
2785 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2786 ts->stat = SAS_OPEN_REJECT; in mpi_smp_completion()
2787 ts->open_rej_reason = SAS_OREJ_WRONG_DEST; in mpi_smp_completion()
2790 pm8001_dbg(pm8001_ha, IO, "IO_XFER_ERROR_RX_FRAME\n"); in mpi_smp_completion()
2791 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2792 ts->stat = SAS_DEV_NO_RESPONSE; in mpi_smp_completion()
2795 pm8001_dbg(pm8001_ha, IO, "IO_XFER_OPEN_RETRY_TIMEOUT\n"); in mpi_smp_completion()
2796 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2797 ts->stat = SAS_OPEN_REJECT; in mpi_smp_completion()
2798 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_smp_completion()
2801 pm8001_dbg(pm8001_ha, IO, "IO_ERROR_INTERNAL_SMP_RESOURCE\n"); in mpi_smp_completion()
2802 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2803 ts->stat = SAS_QUEUE_FULL; in mpi_smp_completion()
2806 pm8001_dbg(pm8001_ha, IO, "IO_PORT_IN_RESET\n"); in mpi_smp_completion()
2807 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2808 ts->stat = SAS_OPEN_REJECT; in mpi_smp_completion()
2809 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_smp_completion()
2812 pm8001_dbg(pm8001_ha, IO, "IO_DS_NON_OPERATIONAL\n"); in mpi_smp_completion()
2813 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2814 ts->stat = SAS_DEV_NO_RESPONSE; in mpi_smp_completion()
2817 pm8001_dbg(pm8001_ha, IO, "IO_DS_IN_RECOVERY\n"); in mpi_smp_completion()
2818 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2819 ts->stat = SAS_OPEN_REJECT; in mpi_smp_completion()
2820 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_smp_completion()
2823 pm8001_dbg(pm8001_ha, IO, in mpi_smp_completion()
2824 "IO_OPEN_CNX_ERROR_HW_RESOURCE_BUSY\n"); in mpi_smp_completion()
2825 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2826 ts->stat = SAS_OPEN_REJECT; in mpi_smp_completion()
2827 ts->open_rej_reason = SAS_OREJ_RSVD_RETRY; in mpi_smp_completion()
2830 pm8001_dbg(pm8001_ha, DEVIO, "Unknown status 0x%x\n", status); in mpi_smp_completion()
2831 ts->resp = SAS_TASK_COMPLETE; in mpi_smp_completion()
2832 ts->stat = SAS_DEV_NO_RESPONSE; in mpi_smp_completion()
2836 spin_lock_irqsave(&t->task_state_lock, flags); in mpi_smp_completion()
2837 t->task_state_flags &= ~SAS_TASK_STATE_PENDING; in mpi_smp_completion()
2838 t->task_state_flags |= SAS_TASK_STATE_DONE; in mpi_smp_completion()
2839 if (unlikely((t->task_state_flags & SAS_TASK_STATE_ABORTED))) { in mpi_smp_completion()
2840 spin_unlock_irqrestore(&t->task_state_lock, flags); in mpi_smp_completion()
2841 …1_ha, FAIL, "task 0x%p done with io_status 0x%x resp 0x%x stat 0x%x but aborted by upper layer!\n", in mpi_smp_completion()
2842 t, status, ts->resp, ts->stat); in mpi_smp_completion()
2845 spin_unlock_irqrestore(&t->task_state_lock, flags); in mpi_smp_completion()
2855 u32 tag = le32_to_cpu(pPayload->tag); in pm8001_mpi_set_dev_state_resp()
2856 struct pm8001_ccb_info *ccb = &pm8001_ha->ccb_info[tag]; in pm8001_mpi_set_dev_state_resp()
2857 struct pm8001_device *pm8001_dev = ccb->device; in pm8001_mpi_set_dev_state_resp()
2858 u32 status = le32_to_cpu(pPayload->status); in pm8001_mpi_set_dev_state_resp()
2859 u32 device_id = le32_to_cpu(pPayload->device_id); in pm8001_mpi_set_dev_state_resp()
2860 u8 pds = le32_to_cpu(pPayload->pds_nds) & PDS_BITS; in pm8001_mpi_set_dev_state_resp()
2861 u8 nds = le32_to_cpu(pPayload->pds_nds) & NDS_BITS; in pm8001_mpi_set_dev_state_resp()
2864 "Set device id = 0x%x state from 0x%x to 0x%x status = 0x%x!\n", in pm8001_mpi_set_dev_state_resp()
2866 complete(pm8001_dev->setds_completion); in pm8001_mpi_set_dev_state_resp()
2874 u32 tag = le32_to_cpu(pPayload->tag); in pm8001_mpi_set_nvmd_resp()
2875 struct pm8001_ccb_info *ccb = &pm8001_ha->ccb_info[tag]; in pm8001_mpi_set_nvmd_resp()
2876 u32 dlen_status = le32_to_cpu(pPayload->dlen_status); in pm8001_mpi_set_nvmd_resp()
2878 complete(pm8001_ha->nvmd_completion); in pm8001_mpi_set_nvmd_resp()
2879 pm8001_dbg(pm8001_ha, MSG, "Set nvm data complete!\n"); in pm8001_mpi_set_nvmd_resp()
2881 pm8001_dbg(pm8001_ha, FAIL, "Set nvm data error %x\n", in pm8001_mpi_set_nvmd_resp()
2893 u32 tag = le32_to_cpu(pPayload->tag); in pm8001_mpi_get_nvmd_resp()
2894 struct pm8001_ccb_info *ccb = &pm8001_ha->ccb_info[tag]; in pm8001_mpi_get_nvmd_resp()
2895 u32 dlen_status = le32_to_cpu(pPayload->dlen_status); in pm8001_mpi_get_nvmd_resp()
2897 le32_to_cpu(pPayload->ir_tda_bn_dps_das_nvm); in pm8001_mpi_get_nvmd_resp()
2898 void *virt_addr = pm8001_ha->memoryMap.region[NVMD].virt_ptr; in pm8001_mpi_get_nvmd_resp()
2899 fw_control_context = ccb->fw_control_context; in pm8001_mpi_get_nvmd_resp()
2901 pm8001_dbg(pm8001_ha, MSG, "Get nvm data complete!\n"); in pm8001_mpi_get_nvmd_resp()
2903 pm8001_dbg(pm8001_ha, FAIL, "Get nvm data error %x\n", in pm8001_mpi_get_nvmd_resp()
2905 complete(pm8001_ha->nvmd_completion); in pm8001_mpi_get_nvmd_resp()
2913 /* indirect mode - IR bit set */ in pm8001_mpi_get_nvmd_resp()
2914 pm8001_dbg(pm8001_ha, MSG, "Get NVMD success, IR=1\n"); in pm8001_mpi_get_nvmd_resp()
2917 memcpy(pm8001_ha->sas_addr, in pm8001_mpi_get_nvmd_resp()
2920 pm8001_dbg(pm8001_ha, MSG, "Get SAS address from VPD successfully!\n"); in pm8001_mpi_get_nvmd_resp()
2932 "(IR=1)Wrong Device type 0x%x\n", in pm8001_mpi_get_nvmd_resp()
2937 "Get NVMD success, IR=0, dataLen=%d\n", in pm8001_mpi_get_nvmd_resp()
2943 memcpy(fw_control_context->usrAddr, in pm8001_mpi_get_nvmd_resp()
2944 pm8001_ha->memoryMap.region[NVMD].virt_ptr, in pm8001_mpi_get_nvmd_resp()
2945 fw_control_context->len); in pm8001_mpi_get_nvmd_resp()
2946 kfree(ccb->fw_control_context); in pm8001_mpi_get_nvmd_resp()
2949 * fw_control_context->usrAddr in pm8001_mpi_get_nvmd_resp()
2951 complete(pm8001_ha->nvmd_completion); in pm8001_mpi_get_nvmd_resp()
2952 pm8001_dbg(pm8001_ha, MSG, "Get nvmd data complete!\n"); in pm8001_mpi_get_nvmd_resp()
2961 u32 status = le32_to_cpu(pPayload->status); in pm8001_mpi_local_phy_ctl()
2962 u32 phy_id = le32_to_cpu(pPayload->phyop_phyid) & ID_BITS; in pm8001_mpi_local_phy_ctl()
2963 u32 phy_op = le32_to_cpu(pPayload->phyop_phyid) & OP_BITS; in pm8001_mpi_local_phy_ctl()
2964 tag = le32_to_cpu(pPayload->tag); in pm8001_mpi_local_phy_ctl()
2967 "%x phy execute %x phy op failed!\n", in pm8001_mpi_local_phy_ctl()
2971 "%x phy execute %x phy op success!\n", in pm8001_mpi_local_phy_ctl()
2973 pm8001_ha->phy[phy_id].reset_success = true; in pm8001_mpi_local_phy_ctl()
2975 if (pm8001_ha->phy[phy_id].enable_completion) { in pm8001_mpi_local_phy_ctl()
2976 complete(pm8001_ha->phy[phy_id].enable_completion); in pm8001_mpi_local_phy_ctl()
2977 pm8001_ha->phy[phy_id].enable_completion = NULL; in pm8001_mpi_local_phy_ctl()
2984 * pm8001_bytes_dmaed - one of the interface function communication with libsas
2996 struct pm8001_phy *phy = &pm8001_ha->phy[i]; in pm8001_bytes_dmaed()
2997 struct asd_sas_phy *sas_phy = &phy->sas_phy; in pm8001_bytes_dmaed()
2998 if (!phy->phy_attached) in pm8001_bytes_dmaed()
3001 if (phy->phy_type & PORT_TYPE_SAS) { in pm8001_bytes_dmaed()
3003 id = (struct sas_identify_frame *)phy->frame_rcvd; in pm8001_bytes_dmaed()
3004 id->dev_type = phy->identify.device_type; in pm8001_bytes_dmaed()
3005 id->initiator_bits = SAS_PROTOCOL_ALL; in pm8001_bytes_dmaed()
3006 id->target_bits = phy->identify.target_port_protocols; in pm8001_bytes_dmaed()
3007 } else if (phy->phy_type & PORT_TYPE_SATA) { in pm8001_bytes_dmaed()
3010 pm8001_dbg(pm8001_ha, MSG, "phy %d byte dmaded.\n", i); in pm8001_bytes_dmaed()
3012 sas_phy->frame_rcvd_size = phy->frame_rcvd_size; in pm8001_bytes_dmaed()
3019 struct sas_phy *sas_phy = phy->sas_phy.phy; in pm8001_get_lrate_mode()
3023 phy->sas_phy.linkrate = SAS_LINK_RATE_12_0_GBPS; in pm8001_get_lrate_mode()
3026 phy->sas_phy.linkrate = SAS_LINK_RATE_6_0_GBPS; in pm8001_get_lrate_mode()
3029 phy->sas_phy.linkrate = SAS_LINK_RATE_3_0_GBPS; in pm8001_get_lrate_mode()
3032 phy->sas_phy.linkrate = SAS_LINK_RATE_1_5_GBPS; in pm8001_get_lrate_mode()
3035 sas_phy->negotiated_linkrate = phy->sas_phy.linkrate; in pm8001_get_lrate_mode()
3036 sas_phy->maximum_linkrate_hw = phy->maximum_linkrate; in pm8001_get_lrate_mode()
3037 sas_phy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS; in pm8001_get_lrate_mode()
3038 sas_phy->maximum_linkrate = phy->maximum_linkrate; in pm8001_get_lrate_mode()
3039 sas_phy->minimum_linkrate = phy->minimum_linkrate; in pm8001_get_lrate_mode()
3043 * pm8001_get_attached_sas_addr - extract/generate attached SAS address
3057 if (phy->sas_phy.frame_rcvd[0] == 0x34 in pm8001_get_attached_sas_addr()
3058 && phy->sas_phy.oob_mode == SATA_OOB_MODE) { in pm8001_get_attached_sas_addr()
3059 struct pm8001_hba_info *pm8001_ha = phy->sas_phy.ha->lldd_ha; in pm8001_get_attached_sas_addr()
3060 /* FIS device-to-host */ in pm8001_get_attached_sas_addr()
3061 u64 addr = be64_to_cpu(*(__be64 *)pm8001_ha->sas_addr); in pm8001_get_attached_sas_addr()
3062 addr += phy->sas_phy.id; in pm8001_get_attached_sas_addr()
3066 (void *) phy->sas_phy.frame_rcvd; in pm8001_get_attached_sas_addr()
3067 memcpy(sas_addr, idframe->sas_addr, SAS_ADDR_SIZE); in pm8001_get_attached_sas_addr()
3072 * pm8001_hw_event_ack_req- For PM8001,some events need to acknowage to FW.
3101 * hw_event_sas_phy_up -FW tells me a SAS phy up event.
3103 * @piomb: IO message buffer
3111 le32_to_cpu(pPayload->lr_evt_status_phyid_portid); in hw_event_sas_phy_up()
3117 u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate); in hw_event_sas_phy_up()
3119 struct pm8001_port *port = &pm8001_ha->port[port_id]; in hw_event_sas_phy_up()
3120 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; in hw_event_sas_phy_up()
3122 u8 deviceType = pPayload->sas_identify.dev_type; in hw_event_sas_phy_up()
3123 phy->port = port; in hw_event_sas_phy_up()
3124 port->port_id = port_id; in hw_event_sas_phy_up()
3125 port->port_state = portstate; in hw_event_sas_phy_up()
3126 phy->phy_state = PHY_STATE_LINK_UP_SPC; in hw_event_sas_phy_up()
3128 "HW_EVENT_SAS_PHY_UP port id = %d, phy id = %d\n", in hw_event_sas_phy_up()
3133 pm8001_dbg(pm8001_ha, MSG, "device type no device.\n"); in hw_event_sas_phy_up()
3136 pm8001_dbg(pm8001_ha, MSG, "end device.\n"); in hw_event_sas_phy_up()
3139 port->port_attached = 1; in hw_event_sas_phy_up()
3143 pm8001_dbg(pm8001_ha, MSG, "expander device.\n"); in hw_event_sas_phy_up()
3144 port->port_attached = 1; in hw_event_sas_phy_up()
3148 pm8001_dbg(pm8001_ha, MSG, "fanout expander device.\n"); in hw_event_sas_phy_up()
3149 port->port_attached = 1; in hw_event_sas_phy_up()
3153 pm8001_dbg(pm8001_ha, DEVIO, "unknown device type(%x)\n", in hw_event_sas_phy_up()
3157 phy->phy_type |= PORT_TYPE_SAS; in hw_event_sas_phy_up()
3158 phy->identify.device_type = deviceType; in hw_event_sas_phy_up()
3159 phy->phy_attached = 1; in hw_event_sas_phy_up()
3160 if (phy->identify.device_type == SAS_END_DEVICE) in hw_event_sas_phy_up()
3161 phy->identify.target_port_protocols = SAS_PROTOCOL_SSP; in hw_event_sas_phy_up()
3162 else if (phy->identify.device_type != SAS_PHY_UNUSED) in hw_event_sas_phy_up()
3163 phy->identify.target_port_protocols = SAS_PROTOCOL_SMP; in hw_event_sas_phy_up()
3164 phy->sas_phy.oob_mode = SAS_OOB_MODE; in hw_event_sas_phy_up()
3165 sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE, GFP_ATOMIC); in hw_event_sas_phy_up()
3166 spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); in hw_event_sas_phy_up()
3167 memcpy(phy->frame_rcvd, &pPayload->sas_identify, in hw_event_sas_phy_up()
3168 sizeof(struct sas_identify_frame)-4); in hw_event_sas_phy_up()
3169 phy->frame_rcvd_size = sizeof(struct sas_identify_frame) - 4; in hw_event_sas_phy_up()
3170 pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); in hw_event_sas_phy_up()
3171 spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); in hw_event_sas_phy_up()
3172 if (pm8001_ha->flags == PM8001F_RUN_TIME) in hw_event_sas_phy_up()
3178 * hw_event_sata_phy_up -FW tells me a SATA phy up event.
3180 * @piomb: IO message buffer
3188 le32_to_cpu(pPayload->lr_evt_status_phyid_portid); in hw_event_sata_phy_up()
3194 u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate); in hw_event_sata_phy_up()
3196 struct pm8001_port *port = &pm8001_ha->port[port_id]; in hw_event_sata_phy_up()
3197 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; in hw_event_sata_phy_up()
3199 pm8001_dbg(pm8001_ha, DEVIO, "HW_EVENT_SATA_PHY_UP port id = %d, phy id = %d\n", in hw_event_sata_phy_up()
3201 phy->port = port; in hw_event_sata_phy_up()
3202 port->port_id = port_id; in hw_event_sata_phy_up()
3203 port->port_state = portstate; in hw_event_sata_phy_up()
3204 phy->phy_state = PHY_STATE_LINK_UP_SPC; in hw_event_sata_phy_up()
3205 port->port_attached = 1; in hw_event_sata_phy_up()
3207 phy->phy_type |= PORT_TYPE_SATA; in hw_event_sata_phy_up()
3208 phy->phy_attached = 1; in hw_event_sata_phy_up()
3209 phy->sas_phy.oob_mode = SATA_OOB_MODE; in hw_event_sata_phy_up()
3210 sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_DONE, GFP_ATOMIC); in hw_event_sata_phy_up()
3211 spin_lock_irqsave(&phy->sas_phy.frame_rcvd_lock, flags); in hw_event_sata_phy_up()
3212 memcpy(phy->frame_rcvd, ((u8 *)&pPayload->sata_fis - 4), in hw_event_sata_phy_up()
3214 phy->frame_rcvd_size = sizeof(struct dev_to_host_fis); in hw_event_sata_phy_up()
3215 phy->identify.target_port_protocols = SAS_PROTOCOL_SATA; in hw_event_sata_phy_up()
3216 phy->identify.device_type = SAS_SATA_DEV; in hw_event_sata_phy_up()
3217 pm8001_get_attached_sas_addr(phy, phy->sas_phy.attached_sas_addr); in hw_event_sata_phy_up()
3218 spin_unlock_irqrestore(&phy->sas_phy.frame_rcvd_lock, flags); in hw_event_sata_phy_up()
3223 * hw_event_phy_down -we should notify the libsas the phy is down.
3225 * @piomb: IO message buffer
3233 le32_to_cpu(pPayload->lr_evt_status_phyid_portid); in hw_event_phy_down()
3237 u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate); in hw_event_phy_down()
3239 struct pm8001_port *port = &pm8001_ha->port[port_id]; in hw_event_phy_down()
3240 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; in hw_event_phy_down()
3241 port->port_state = portstate; in hw_event_phy_down()
3242 phy->phy_type = 0; in hw_event_phy_down()
3243 phy->identify.device_type = 0; in hw_event_phy_down()
3244 phy->phy_attached = 0; in hw_event_phy_down()
3245 memset(&phy->dev_sas_addr, 0, SAS_ADDR_SIZE); in hw_event_phy_down()
3250 pm8001_dbg(pm8001_ha, MSG, " PortInvalid portID %d\n", in hw_event_phy_down()
3253 " Last phy Down and port invalid\n"); in hw_event_phy_down()
3254 port->port_attached = 0; in hw_event_phy_down()
3259 pm8001_dbg(pm8001_ha, MSG, " Port In Reset portID %d\n", in hw_event_phy_down()
3264 " phy Down and PORT_NOT_ESTABLISHED\n"); in hw_event_phy_down()
3265 port->port_attached = 0; in hw_event_phy_down()
3268 pm8001_dbg(pm8001_ha, MSG, " phy Down and PORT_LOSTCOMM\n"); in hw_event_phy_down()
3270 " Last phy Down and port invalid\n"); in hw_event_phy_down()
3271 port->port_attached = 0; in hw_event_phy_down()
3276 port->port_attached = 0; in hw_event_phy_down()
3277 pm8001_dbg(pm8001_ha, DEVIO, " phy Down and(default) = %x\n", in hw_event_phy_down()
3285 * pm8001_mpi_reg_resp -process register device ID response.
3287 * @piomb: IO message buffer
3291 * has assigned, from now, inter-communication with FW is no longer using the
3304 htag = le32_to_cpu(registerRespPayload->tag); in pm8001_mpi_reg_resp()
3305 ccb = &pm8001_ha->ccb_info[htag]; in pm8001_mpi_reg_resp()
3306 pm8001_dev = ccb->device; in pm8001_mpi_reg_resp()
3307 status = le32_to_cpu(registerRespPayload->status); in pm8001_mpi_reg_resp()
3308 device_id = le32_to_cpu(registerRespPayload->device_id); in pm8001_mpi_reg_resp()
3310 "register device status %d phy_id 0x%x device_id %d\n", in pm8001_mpi_reg_resp()
3311 status, pm8001_dev->attached_phy, device_id); in pm8001_mpi_reg_resp()
3314 pm8001_dbg(pm8001_ha, MSG, "DEVREG_SUCCESS\n"); in pm8001_mpi_reg_resp()
3315 pm8001_dev->device_id = device_id; in pm8001_mpi_reg_resp()
3318 pm8001_dbg(pm8001_ha, MSG, "DEVREG_FAILURE_OUT_OF_RESOURCE\n"); in pm8001_mpi_reg_resp()
3322 "DEVREG_FAILURE_DEVICE_ALREADY_REGISTERED\n"); in pm8001_mpi_reg_resp()
3325 pm8001_dbg(pm8001_ha, MSG, "DEVREG_FAILURE_INVALID_PHY_ID\n"); in pm8001_mpi_reg_resp()
3329 "DEVREG_FAILURE_PHY_ID_ALREADY_REGISTERED\n"); in pm8001_mpi_reg_resp()
3333 "DEVREG_FAILURE_PORT_ID_OUT_OF_RANGE\n"); in pm8001_mpi_reg_resp()
3337 "DEVREG_FAILURE_PORT_NOT_VALID_STATE\n"); in pm8001_mpi_reg_resp()
3341 "DEVREG_FAILURE_DEVICE_TYPE_NOT_VALID\n"); in pm8001_mpi_reg_resp()
3345 "DEVREG_FAILURE_DEVICE_TYPE_NOT_SUPPORTED\n"); in pm8001_mpi_reg_resp()
3348 complete(pm8001_dev->dcompletion); in pm8001_mpi_reg_resp()
3360 status = le32_to_cpu(registerRespPayload->status); in pm8001_mpi_dereg_resp()
3361 device_id = le32_to_cpu(registerRespPayload->device_id); in pm8001_mpi_dereg_resp()
3364 " deregister device failed ,status = %x, device_id = %x\n", in pm8001_mpi_dereg_resp()
3370 * pm8001_mpi_fw_flash_update_resp - Response from FW for flash update command.
3372 * @piomb: IO message buffer
3380 u32 tag = le32_to_cpu(ppayload->tag); in pm8001_mpi_fw_flash_update_resp()
3381 struct pm8001_ccb_info *ccb = &pm8001_ha->ccb_info[tag]; in pm8001_mpi_fw_flash_update_resp()
3383 status = le32_to_cpu(ppayload->status); in pm8001_mpi_fw_flash_update_resp()
3387 ": FLASH_UPDATE_COMPLETE_PENDING_REBOOT\n"); in pm8001_mpi_fw_flash_update_resp()
3390 pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_IN_PROGRESS\n"); in pm8001_mpi_fw_flash_update_resp()
3393 pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_HDR_ERR\n"); in pm8001_mpi_fw_flash_update_resp()
3396 pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_OFFSET_ERR\n"); in pm8001_mpi_fw_flash_update_resp()
3399 pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_CRC_ERR\n"); in pm8001_mpi_fw_flash_update_resp()
3402 pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_LENGTH_ERR\n"); in pm8001_mpi_fw_flash_update_resp()
3405 pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_HW_ERR\n"); in pm8001_mpi_fw_flash_update_resp()
3409 ": FLASH_UPDATE_DNLD_NOT_SUPPORTED\n"); in pm8001_mpi_fw_flash_update_resp()
3412 pm8001_dbg(pm8001_ha, MSG, ": FLASH_UPDATE_DISABLED\n"); in pm8001_mpi_fw_flash_update_resp()
3415 pm8001_dbg(pm8001_ha, DEVIO, "No matched status = %d\n", in pm8001_mpi_fw_flash_update_resp()
3419 kfree(ccb->fw_control_context); in pm8001_mpi_fw_flash_update_resp()
3421 complete(pm8001_ha->nvmd_completion); in pm8001_mpi_fw_flash_update_resp()
3431 status = le32_to_cpu(pPayload->status); in pm8001_mpi_general_event()
3432 pm8001_dbg(pm8001_ha, MSG, " status = 0x%x\n", status); in pm8001_mpi_general_event()
3434 pm8001_dbg(pm8001_ha, MSG, "inb_IOMB_payload[0x%x] 0x%x,\n", in pm8001_mpi_general_event()
3436 pPayload->inb_IOMB_payload[i]); in pm8001_mpi_general_event()
3453 status = le32_to_cpu(pPayload->status); in pm8001_mpi_task_abort_resp()
3454 tag = le32_to_cpu(pPayload->tag); in pm8001_mpi_task_abort_resp()
3456 scp = le32_to_cpu(pPayload->scp); in pm8001_mpi_task_abort_resp()
3457 ccb = &pm8001_ha->ccb_info[tag]; in pm8001_mpi_task_abort_resp()
3458 t = ccb->task; in pm8001_mpi_task_abort_resp()
3459 pm8001_dev = ccb->device; /* retrieve device */ in pm8001_mpi_task_abort_resp()
3462 pm8001_dbg(pm8001_ha, FAIL, " TASK NULL. RETURNING !!!\n"); in pm8001_mpi_task_abort_resp()
3463 return -1; in pm8001_mpi_task_abort_resp()
3466 if (t->task_proto == SAS_PROTOCOL_INTERNAL_ABORT) in pm8001_mpi_task_abort_resp()
3467 atomic_dec(&pm8001_dev->running_req); in pm8001_mpi_task_abort_resp()
3469 ts = &t->task_status; in pm8001_mpi_task_abort_resp()
3471 pm8001_dbg(pm8001_ha, FAIL, "task abort failed status 0x%x ,tag = 0x%x, scp= 0x%x\n", in pm8001_mpi_task_abort_resp()
3475 pm8001_dbg(pm8001_ha, FAIL, "ABORT IO_SUCCESS for tag %#x\n", in pm8001_mpi_task_abort_resp()
3477 ts->resp = SAS_TASK_COMPLETE; in pm8001_mpi_task_abort_resp()
3478 ts->stat = SAS_SAM_STAT_GOOD; in pm8001_mpi_task_abort_resp()
3481 pm8001_dbg(pm8001_ha, FAIL, "IO_NOT_VALID for tag %#x\n", tag); in pm8001_mpi_task_abort_resp()
3482 ts->resp = TMF_RESP_FUNC_FAILED; in pm8001_mpi_task_abort_resp()
3485 spin_lock_irqsave(&t->task_state_lock, flags); in pm8001_mpi_task_abort_resp()
3486 t->task_state_flags &= ~SAS_TASK_STATE_PENDING; in pm8001_mpi_task_abort_resp()
3487 t->task_state_flags |= SAS_TASK_STATE_DONE; in pm8001_mpi_task_abort_resp()
3488 spin_unlock_irqrestore(&t->task_state_lock, flags); in pm8001_mpi_task_abort_resp()
3492 t->task_done(t); in pm8001_mpi_task_abort_resp()
3498 * mpi_hw_event -The hw event has come.
3500 * @piomb: IO message buffer
3508 le32_to_cpu(pPayload->lr_evt_status_phyid_portid); in mpi_hw_event()
3516 struct sas_ha_struct *sas_ha = pm8001_ha->sas; in mpi_hw_event()
3517 struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; in mpi_hw_event()
3518 struct asd_sas_phy *sas_phy = sas_ha->sas_phy[phy_id]; in mpi_hw_event()
3520 "SPC HW event for portid:%d, phyid:%d, event:%x, status:%x\n", in mpi_hw_event()
3524 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_START_STATUS status = %x\n", in mpi_hw_event()
3527 phy->phy_state = 1; in mpi_hw_event()
3529 if (pm8001_ha->flags == PM8001F_RUN_TIME && in mpi_hw_event()
3530 phy->enable_completion != NULL) { in mpi_hw_event()
3531 complete(phy->enable_completion); in mpi_hw_event()
3532 phy->enable_completion = NULL; in mpi_hw_event()
3536 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_START_STATUS\n"); in mpi_hw_event()
3540 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_PHY_UP\n"); in mpi_hw_event()
3544 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_STOP_STATUS status = %x\n", in mpi_hw_event()
3547 phy->phy_state = 0; in mpi_hw_event()
3550 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_SATA_SPINUP_HOLD\n"); in mpi_hw_event()
3551 sas_notify_phy_event(&phy->sas_phy, PHYE_SPINUP_HOLD, in mpi_hw_event()
3555 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_DOWN\n"); in mpi_hw_event()
3556 sas_notify_phy_event(&phy->sas_phy, PHYE_LOSS_OF_SIGNAL, in mpi_hw_event()
3558 phy->phy_attached = 0; in mpi_hw_event()
3559 phy->phy_state = 0; in mpi_hw_event()
3563 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_INVALID\n"); in mpi_hw_event()
3565 phy->phy_attached = 0; in mpi_hw_event()
3572 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_CHANGE\n"); in mpi_hw_event()
3575 spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); in mpi_hw_event()
3576 sas_phy->sas_prim = HW_EVENT_BROADCAST_CHANGE; in mpi_hw_event()
3577 spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); in mpi_hw_event()
3582 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PHY_ERROR\n"); in mpi_hw_event()
3583 sas_phy_disconnected(&phy->sas_phy); in mpi_hw_event()
3584 phy->phy_attached = 0; in mpi_hw_event()
3585 sas_notify_phy_event(&phy->sas_phy, PHYE_OOB_ERROR, GFP_ATOMIC); in mpi_hw_event()
3588 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_EXP\n"); in mpi_hw_event()
3589 spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); in mpi_hw_event()
3590 sas_phy->sas_prim = HW_EVENT_BROADCAST_EXP; in mpi_hw_event()
3591 spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); in mpi_hw_event()
3597 "HW_EVENT_LINK_ERR_INVALID_DWORD\n"); in mpi_hw_event()
3601 phy->phy_attached = 0; in mpi_hw_event()
3607 "HW_EVENT_LINK_ERR_DISPARITY_ERROR\n"); in mpi_hw_event()
3612 phy->phy_attached = 0; in mpi_hw_event()
3618 "HW_EVENT_LINK_ERR_CODE_VIOLATION\n"); in mpi_hw_event()
3623 phy->phy_attached = 0; in mpi_hw_event()
3629 "HW_EVENT_LINK_ERR_LOSS_OF_DWORD_SYNCH\n"); in mpi_hw_event()
3634 phy->phy_attached = 0; in mpi_hw_event()
3639 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_MALFUNCTION\n"); in mpi_hw_event()
3642 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_BROADCAST_SES\n"); in mpi_hw_event()
3643 spin_lock_irqsave(&sas_phy->sas_prim_lock, flags); in mpi_hw_event()
3644 sas_phy->sas_prim = HW_EVENT_BROADCAST_SES; in mpi_hw_event()
3645 spin_unlock_irqrestore(&sas_phy->sas_prim_lock, flags); in mpi_hw_event()
3650 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_INBOUND_CRC_ERROR\n"); in mpi_hw_event()
3656 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_HARD_RESET_RECEIVED\n"); in mpi_hw_event()
3660 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_ID_FRAME_TIMEOUT\n"); in mpi_hw_event()
3662 phy->phy_attached = 0; in mpi_hw_event()
3668 "HW_EVENT_LINK_ERR_PHY_RESET_FAILED\n"); in mpi_hw_event()
3673 phy->phy_attached = 0; in mpi_hw_event()
3678 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_TIMER_TMO\n"); in mpi_hw_event()
3680 phy->phy_attached = 0; in mpi_hw_event()
3686 "HW_EVENT_PORT_RECOVERY_TIMER_TMO\n"); in mpi_hw_event()
3688 phy->phy_attached = 0; in mpi_hw_event()
3693 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RECOVER\n"); in mpi_hw_event()
3696 pm8001_dbg(pm8001_ha, MSG, "HW_EVENT_PORT_RESET_COMPLETE\n"); in mpi_hw_event()
3699 pm8001_dbg(pm8001_ha, MSG, "EVENT_BROADCAST_ASYNCH_EVENT\n"); in mpi_hw_event()
3702 pm8001_dbg(pm8001_ha, DEVIO, "Unknown event type = %x\n", in mpi_hw_event()
3710 * process_one_iomb - process one outbound Queue memory block
3712 * @piomb: IO message buffer
3719 pm8001_dbg(pm8001_ha, MSG, "process_one_iomb:\n"); in process_one_iomb()
3723 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_ECHO\n"); in process_one_iomb()
3726 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_HW_EVENT\n"); in process_one_iomb()
3730 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_COMP\n"); in process_one_iomb()
3734 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_COMP\n"); in process_one_iomb()
3738 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_LOCAL_PHY_CNTRL\n"); in process_one_iomb()
3742 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_REGIST\n"); in process_one_iomb()
3746 pm8001_dbg(pm8001_ha, MSG, "unregister the device\n"); in process_one_iomb()
3750 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEV_HANDLE\n"); in process_one_iomb()
3753 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_COMP\n"); in process_one_iomb()
3757 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_EVENT\n"); in process_one_iomb()
3761 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_EVENT\n"); in process_one_iomb()
3765 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_HANDLE_ARRIV\n"); in process_one_iomb()
3769 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_RECV_EVENT\n"); in process_one_iomb()
3773 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEV_INFO\n"); in process_one_iomb()
3776 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_FW_FLASH_UPDATE\n"); in process_one_iomb()
3780 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_RESPONSE\n"); in process_one_iomb()
3783 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GPIO_EVENT\n"); in process_one_iomb()
3786 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GENERAL_EVENT\n"); in process_one_iomb()
3790 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SSP_ABORT_RSP\n"); in process_one_iomb()
3794 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SATA_ABORT_RSP\n"); in process_one_iomb()
3799 "OPC_OUB_SAS_DIAG_MODE_START_END\n"); in process_one_iomb()
3802 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_DIAG_EXECUTE\n"); in process_one_iomb()
3805 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_TIME_STAMP\n"); in process_one_iomb()
3808 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_HW_EVENT_ACK\n"); in process_one_iomb()
3811 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_PORT_CONTROL\n"); in process_one_iomb()
3814 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SMP_ABORT_RSP\n"); in process_one_iomb()
3818 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_NVMD_DATA\n"); in process_one_iomb()
3822 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_NVMD_DATA\n"); in process_one_iomb()
3826 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_DEVICE_HANDLE_REMOVAL\n"); in process_one_iomb()
3829 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEVICE_STATE\n"); in process_one_iomb()
3833 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_GET_DEVICE_STATE\n"); in process_one_iomb()
3836 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SET_DEV_INFO\n"); in process_one_iomb()
3839 pm8001_dbg(pm8001_ha, MSG, "OPC_OUB_SAS_RE_INITIALIZE\n"); in process_one_iomb()
3843 "Unknown outbound Queue IOMB OPC = %x\n", in process_one_iomb()
3857 spin_lock_irqsave(&pm8001_ha->lock, flags); in process_oq()
3858 circularQ = &pm8001_ha->outbnd_q_tbl[vec]; in process_oq()
3863 process_one_iomb(pm8001_ha, (void *)(pMsg1 - 4)); in process_oq()
3870 circularQ->producer_index = in process_oq()
3871 cpu_to_le32(pm8001_read_32(circularQ->pi_virt)); in process_oq()
3872 if (le32_to_cpu(circularQ->producer_index) == in process_oq()
3873 circularQ->consumer_idx) in process_oq()
3878 spin_unlock_irqrestore(&pm8001_ha->lock, flags); in process_oq()
3897 buf_prd->addr = cpu_to_le64(sg_dma_address(sg)); in pm8001_chip_make_sg()
3898 buf_prd->im_len.len = cpu_to_le32(sg_dma_len(sg)); in pm8001_chip_make_sg()
3899 buf_prd->im_len.e = 0; in pm8001_chip_make_sg()
3906 psmp_cmd->tag = hTag; in build_smp_cmd()
3907 psmp_cmd->device_id = cpu_to_le32(deviceID); in build_smp_cmd()
3908 psmp_cmd->len_ip_ir = cpu_to_le32(1|(1 << 1)); in build_smp_cmd()
3912 * pm8001_chip_smp_req - send a SMP task to FW
3920 struct sas_task *task = ccb->task; in pm8001_chip_smp_req()
3921 struct domain_device *dev = task->dev; in pm8001_chip_smp_req()
3922 struct pm8001_device *pm8001_dev = dev->lldd_dev; in pm8001_chip_smp_req()
3930 * DMA-map SMP request, response buffers in pm8001_chip_smp_req()
3932 sg_req = &task->smp_task.smp_req; in pm8001_chip_smp_req()
3933 elem = dma_map_sg(pm8001_ha->dev, sg_req, 1, DMA_TO_DEVICE); in pm8001_chip_smp_req()
3935 return -ENOMEM; in pm8001_chip_smp_req()
3938 sg_resp = &task->smp_task.smp_resp; in pm8001_chip_smp_req()
3939 elem = dma_map_sg(pm8001_ha->dev, sg_resp, 1, DMA_FROM_DEVICE); in pm8001_chip_smp_req()
3941 rc = -ENOMEM; in pm8001_chip_smp_req()
3947 rc = -EINVAL; in pm8001_chip_smp_req()
3952 smp_cmd.tag = cpu_to_le32(ccb->ccb_tag); in pm8001_chip_smp_req()
3954 cpu_to_le64((u64)sg_dma_address(&task->smp_task.smp_req)); in pm8001_chip_smp_req()
3956 cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_req)-4); in pm8001_chip_smp_req()
3958 cpu_to_le64((u64)sg_dma_address(&task->smp_task.smp_resp)); in pm8001_chip_smp_req()
3960 cpu_to_le32((u32)sg_dma_len(&task->smp_task.smp_resp)-4); in pm8001_chip_smp_req()
3961 build_smp_cmd(pm8001_dev->device_id, smp_cmd.tag, &smp_cmd); in pm8001_chip_smp_req()
3970 dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_resp, 1, in pm8001_chip_smp_req()
3973 dma_unmap_sg(pm8001_ha->dev, &ccb->task->smp_task.smp_req, 1, in pm8001_chip_smp_req()
3979 * pm8001_chip_ssp_io_req - send a SSP task to FW
3986 struct sas_task *task = ccb->task; in pm8001_chip_ssp_io_req()
3987 struct domain_device *dev = task->dev; in pm8001_chip_ssp_io_req()
3988 struct pm8001_device *pm8001_dev = dev->lldd_dev; in pm8001_chip_ssp_io_req()
3990 u32 tag = ccb->ccb_tag; in pm8001_chip_ssp_io_req()
3994 memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8); in pm8001_chip_ssp_io_req()
3996 cpu_to_le32(data_dir_flags[task->data_dir] << 8 | 0x0);/*0 for in pm8001_chip_ssp_io_req()
3998 ssp_cmd.data_len = cpu_to_le32(task->total_xfer_len); in pm8001_chip_ssp_io_req()
3999 ssp_cmd.device_id = cpu_to_le32(pm8001_dev->device_id); in pm8001_chip_ssp_io_req()
4001 ssp_cmd.ssp_iu.efb_prio_attr |= (task->ssp_task.task_attr & 7); in pm8001_chip_ssp_io_req()
4002 memcpy(ssp_cmd.ssp_iu.cdb, task->ssp_task.cmd->cmnd, in pm8001_chip_ssp_io_req()
4003 task->ssp_task.cmd->cmd_len); in pm8001_chip_ssp_io_req()
4006 if (task->num_scatter > 1) { in pm8001_chip_ssp_io_req()
4007 pm8001_chip_make_sg(task->scatter, ccb->n_elem, ccb->buf_prd); in pm8001_chip_ssp_io_req()
4008 phys_addr = ccb->ccb_dma_handle; in pm8001_chip_ssp_io_req()
4012 } else if (task->num_scatter == 1) { in pm8001_chip_ssp_io_req()
4013 u64 dma_addr = sg_dma_address(task->scatter); in pm8001_chip_ssp_io_req()
4016 ssp_cmd.len = cpu_to_le32(task->total_xfer_len); in pm8001_chip_ssp_io_req()
4018 } else if (task->num_scatter == 0) { in pm8001_chip_ssp_io_req()
4021 ssp_cmd.len = cpu_to_le32(task->total_xfer_len); in pm8001_chip_ssp_io_req()
4032 struct sas_task *task = ccb->task; in pm8001_chip_sata_req()
4033 struct domain_device *dev = task->dev; in pm8001_chip_sata_req()
4034 struct pm8001_device *pm8001_ha_dev = dev->lldd_dev; in pm8001_chip_sata_req()
4035 u32 tag = ccb->ccb_tag; in pm8001_chip_sata_req()
4045 if (task->data_dir == DMA_NONE && !task->ata_task.use_ncq) { in pm8001_chip_sata_req()
4047 pm8001_dbg(pm8001_ha, IO, "no data\n"); in pm8001_chip_sata_req()
4048 } else if (likely(!task->ata_task.device_control_reg_update)) { in pm8001_chip_sata_req()
4049 if (task->ata_task.use_ncq && in pm8001_chip_sata_req()
4050 dev->sata_dev.class != ATA_DEV_ATAPI) { in pm8001_chip_sata_req()
4052 pm8001_dbg(pm8001_ha, IO, "FPDMA\n"); in pm8001_chip_sata_req()
4053 } else if (task->ata_task.dma_xfer) { in pm8001_chip_sata_req()
4055 pm8001_dbg(pm8001_ha, IO, "DMA\n"); in pm8001_chip_sata_req()
4058 pm8001_dbg(pm8001_ha, IO, "PIO\n"); in pm8001_chip_sata_req()
4061 if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag)) { in pm8001_chip_sata_req()
4062 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); in pm8001_chip_sata_req()
4065 dir = data_dir_flags[task->data_dir] << 8; in pm8001_chip_sata_req()
4067 sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); in pm8001_chip_sata_req()
4068 sata_cmd.data_len = cpu_to_le32(task->total_xfer_len); in pm8001_chip_sata_req()
4069 if (task->ata_task.return_fis_on_success) in pm8001_chip_sata_req()
4074 sata_cmd.sata_fis = task->ata_task.fis; in pm8001_chip_sata_req()
4075 if (likely(!task->ata_task.device_control_reg_update)) in pm8001_chip_sata_req()
4079 if (task->num_scatter > 1) { in pm8001_chip_sata_req()
4080 pm8001_chip_make_sg(task->scatter, ccb->n_elem, ccb->buf_prd); in pm8001_chip_sata_req()
4081 phys_addr = ccb->ccb_dma_handle; in pm8001_chip_sata_req()
4085 } else if (task->num_scatter == 1) { in pm8001_chip_sata_req()
4086 u64 dma_addr = sg_dma_address(task->scatter); in pm8001_chip_sata_req()
4089 sata_cmd.len = cpu_to_le32(task->total_xfer_len); in pm8001_chip_sata_req()
4091 } else if (task->num_scatter == 0) { in pm8001_chip_sata_req()
4094 sata_cmd.len = cpu_to_le32(task->total_xfer_len); in pm8001_chip_sata_req()
4103 * pm8001_chip_phy_start_req - start phy via PHY_START COMMAND
4128 &pm8001_ha->phy[phy_id].dev_sas_addr, SAS_ADDR_SIZE); in pm8001_chip_phy_start_req()
4136 * pm8001_chip_phy_stop_req - start phy via PHY_STOP COMMAND
4170 struct domain_device *dev = pm8001_dev->sas_device; in pm8001_chip_reg_dev_req()
4171 struct domain_device *parent_dev = dev->parent; in pm8001_chip_reg_dev_req()
4172 struct pm8001_port *port = dev->port->lldd_port; in pm8001_chip_reg_dev_req()
4177 return -SAS_QUEUE_FULL; in pm8001_chip_reg_dev_req()
4179 payload.tag = cpu_to_le32(ccb->ccb_tag); in pm8001_chip_reg_dev_req()
4183 if (pm8001_dev->dev_type == SAS_SATA_DEV) in pm8001_chip_reg_dev_req()
4185 else if (pm8001_dev->dev_type == SAS_END_DEVICE || in pm8001_chip_reg_dev_req()
4186 dev_is_expander(pm8001_dev->dev_type)) in pm8001_chip_reg_dev_req()
4189 if (parent_dev && dev_is_expander(parent_dev->dev_type)) in pm8001_chip_reg_dev_req()
4190 phy_id = parent_dev->ex_dev.ex_phy->phy_id; in pm8001_chip_reg_dev_req()
4192 phy_id = pm8001_dev->attached_phy; in pm8001_chip_reg_dev_req()
4194 linkrate = (pm8001_dev->sas_device->linkrate < dev->port->linkrate) ? in pm8001_chip_reg_dev_req()
4195 pm8001_dev->sas_device->linkrate : dev->port->linkrate; in pm8001_chip_reg_dev_req()
4197 cpu_to_le32(((port->port_id) & 0x0F) | in pm8001_chip_reg_dev_req()
4204 memcpy(payload.sas_addr, pm8001_dev->sas_device->sas_addr, in pm8001_chip_reg_dev_req()
4227 pm8001_dbg(pm8001_ha, INIT, "unregister device device_id %d\n", in pm8001_chip_dereg_dev_req()
4235 * pm8001_chip_phy_ctl_req - support the local phy operation
4259 if (pm8001_ha->use_msix) in pm8001_chip_is_our_interrupt()
4269 * pm8001_chip_isr - PM8001 isr handler.
4278 "irq vec %d, ODMR:0x%x\n", in pm8001_chip_isr()
4299 pm8001_dbg(pm8001_ha, EH, "unknown type (%d)\n", type); in send_task_abort()
4300 return -EIO; in send_task_abort()
4310 * pm8001_chip_abort_task - SAS abort task when error or exception happened.
4315 struct sas_task *task = ccb->task; in pm8001_chip_abort_task()
4316 struct sas_internal_abort_task *abort = &task->abort_task; in pm8001_chip_abort_task()
4317 struct pm8001_device *pm8001_dev = ccb->device; in pm8001_chip_abort_task()
4321 pm8001_dbg(pm8001_ha, EH, "cmd_tag = %x, abort task tag = 0x%x\n", in pm8001_chip_abort_task()
4322 ccb->ccb_tag, abort->tag); in pm8001_chip_abort_task()
4323 if (pm8001_dev->dev_type == SAS_END_DEVICE) in pm8001_chip_abort_task()
4325 else if (pm8001_dev->dev_type == SAS_SATA_DEV) in pm8001_chip_abort_task()
4329 device_id = pm8001_dev->device_id; in pm8001_chip_abort_task()
4330 rc = send_task_abort(pm8001_ha, opc, device_id, abort->type, in pm8001_chip_abort_task()
4331 abort->tag, ccb->ccb_tag); in pm8001_chip_abort_task()
4333 pm8001_dbg(pm8001_ha, EH, "rc= %d\n", rc); in pm8001_chip_abort_task()
4338 * pm8001_chip_ssp_tm_req - built the task management command.
4346 struct sas_task *task = ccb->task; in pm8001_chip_ssp_tm_req()
4347 struct domain_device *dev = task->dev; in pm8001_chip_ssp_tm_req()
4348 struct pm8001_device *pm8001_dev = dev->lldd_dev; in pm8001_chip_ssp_tm_req()
4353 sspTMCmd.device_id = cpu_to_le32(pm8001_dev->device_id); in pm8001_chip_ssp_tm_req()
4354 sspTMCmd.relate_tag = cpu_to_le32((u32)tmf->tag_of_task_to_be_managed); in pm8001_chip_ssp_tm_req()
4355 sspTMCmd.tmf = cpu_to_le32(tmf->tmf); in pm8001_chip_ssp_tm_req()
4356 memcpy(sspTMCmd.lun, task->ssp_task.LUN, 8); in pm8001_chip_ssp_tm_req()
4357 sspTMCmd.tag = cpu_to_le32(ccb->ccb_tag); in pm8001_chip_ssp_tm_req()
4358 if (pm8001_ha->chip_id != chip_8001) in pm8001_chip_ssp_tm_req()
4376 nvmd_type = ioctl_payload->minor_function; in pm8001_chip_get_nvmd_req()
4379 return -ENOMEM; in pm8001_chip_get_nvmd_req()
4380 fw_control_context->usrAddr = (u8 *)ioctl_payload->func_specific; in pm8001_chip_get_nvmd_req()
4381 fw_control_context->len = ioctl_payload->rd_length; in pm8001_chip_get_nvmd_req()
4387 return -SAS_QUEUE_FULL; in pm8001_chip_get_nvmd_req()
4389 ccb->fw_control_context = fw_control_context; in pm8001_chip_get_nvmd_req()
4391 nvmd_req.tag = cpu_to_le32(ccb->ccb_tag); in pm8001_chip_get_nvmd_req()
4401 nvmd_req.resp_len = cpu_to_le32(ioctl_payload->rd_length); in pm8001_chip_get_nvmd_req()
4403 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi); in pm8001_chip_get_nvmd_req()
4405 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_lo); in pm8001_chip_get_nvmd_req()
4410 nvmd_req.resp_len = cpu_to_le32(ioctl_payload->rd_length); in pm8001_chip_get_nvmd_req()
4412 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi); in pm8001_chip_get_nvmd_req()
4414 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_lo); in pm8001_chip_get_nvmd_req()
4419 nvmd_req.resp_len = cpu_to_le32(ioctl_payload->rd_length); in pm8001_chip_get_nvmd_req()
4421 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi); in pm8001_chip_get_nvmd_req()
4423 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_lo); in pm8001_chip_get_nvmd_req()
4428 nvmd_req.resp_len = cpu_to_le32(ioctl_payload->rd_length); in pm8001_chip_get_nvmd_req()
4430 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi); in pm8001_chip_get_nvmd_req()
4432 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_lo); in pm8001_chip_get_nvmd_req()
4437 nvmd_req.resp_len = cpu_to_le32(ioctl_payload->rd_length); in pm8001_chip_get_nvmd_req()
4438 nvmd_req.vpd_offset = cpu_to_le32(ioctl_payload->offset); in pm8001_chip_get_nvmd_req()
4440 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi); in pm8001_chip_get_nvmd_req()
4442 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_lo); in pm8001_chip_get_nvmd_req()
4469 nvmd_type = ioctl_payload->minor_function; in pm8001_chip_set_nvmd_req()
4472 return -ENOMEM; in pm8001_chip_set_nvmd_req()
4474 memcpy(pm8001_ha->memoryMap.region[NVMD].virt_ptr, in pm8001_chip_set_nvmd_req()
4475 &ioctl_payload->func_specific, in pm8001_chip_set_nvmd_req()
4476 ioctl_payload->wr_length); in pm8001_chip_set_nvmd_req()
4482 return -SAS_QUEUE_FULL; in pm8001_chip_set_nvmd_req()
4484 ccb->fw_control_context = fw_control_context; in pm8001_chip_set_nvmd_req()
4486 nvmd_req.tag = cpu_to_le32(ccb->ccb_tag); in pm8001_chip_set_nvmd_req()
4495 nvmd_req.resp_len = cpu_to_le32(ioctl_payload->wr_length); in pm8001_chip_set_nvmd_req()
4497 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi); in pm8001_chip_set_nvmd_req()
4499 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_lo); in pm8001_chip_set_nvmd_req()
4504 nvmd_req.resp_len = cpu_to_le32(ioctl_payload->wr_length); in pm8001_chip_set_nvmd_req()
4507 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi); in pm8001_chip_set_nvmd_req()
4509 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_lo); in pm8001_chip_set_nvmd_req()
4513 nvmd_req.resp_len = cpu_to_le32(ioctl_payload->wr_length); in pm8001_chip_set_nvmd_req()
4516 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi); in pm8001_chip_set_nvmd_req()
4518 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_lo); in pm8001_chip_set_nvmd_req()
4522 nvmd_req.resp_len = cpu_to_le32(ioctl_payload->wr_length); in pm8001_chip_set_nvmd_req()
4525 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_hi); in pm8001_chip_set_nvmd_req()
4527 cpu_to_le32(pm8001_ha->memoryMap.region[NVMD].phys_addr_lo); in pm8001_chip_set_nvmd_req()
4543 * pm8001_chip_fw_flash_update_build - support the firmware update operation
4559 payload.cur_image_len = cpu_to_le32(info->cur_image_len); in pm8001_chip_fw_flash_update_build()
4560 payload.cur_image_offset = cpu_to_le32(info->cur_image_offset); in pm8001_chip_fw_flash_update_build()
4561 payload.total_image_len = cpu_to_le32(info->total_image_len); in pm8001_chip_fw_flash_update_build()
4562 payload.len = info->sgl.im_len.len ; in pm8001_chip_fw_flash_update_build()
4564 cpu_to_le32(lower_32_bits(le64_to_cpu(info->sgl.addr))); in pm8001_chip_fw_flash_update_build()
4566 cpu_to_le32(upper_32_bits(le64_to_cpu(info->sgl.addr))); in pm8001_chip_fw_flash_update_build()
4581 void *buffer = pm8001_ha->memoryMap.region[FW_FLASH].virt_ptr; in pm8001_chip_fw_flash_update_req()
4582 dma_addr_t phys_addr = pm8001_ha->memoryMap.region[FW_FLASH].phys_addr; in pm8001_chip_fw_flash_update_req()
4587 return -ENOMEM; in pm8001_chip_fw_flash_update_req()
4588 fw_control = (struct fw_control_info *)&ioctl_payload->func_specific; in pm8001_chip_fw_flash_update_req()
4590 "dma fw_control context input length :%x\n", in pm8001_chip_fw_flash_update_req()
4591 fw_control->len); in pm8001_chip_fw_flash_update_req()
4592 memcpy(buffer, fw_control->buffer, fw_control->len); in pm8001_chip_fw_flash_update_req()
4594 flash_update_info.sgl.im_len.len = cpu_to_le32(fw_control->len); in pm8001_chip_fw_flash_update_req()
4596 flash_update_info.cur_image_offset = fw_control->offset; in pm8001_chip_fw_flash_update_req()
4597 flash_update_info.cur_image_len = fw_control->len; in pm8001_chip_fw_flash_update_req()
4598 flash_update_info.total_image_len = fw_control->size; in pm8001_chip_fw_flash_update_req()
4599 fw_control_context->fw_control = fw_control; in pm8001_chip_fw_flash_update_req()
4600 fw_control_context->virtAddr = buffer; in pm8001_chip_fw_flash_update_req()
4601 fw_control_context->phys_addr = phys_addr; in pm8001_chip_fw_flash_update_req()
4602 fw_control_context->len = fw_control->len; in pm8001_chip_fw_flash_update_req()
4607 return -SAS_QUEUE_FULL; in pm8001_chip_fw_flash_update_req()
4609 ccb->fw_control_context = fw_control_context; in pm8001_chip_fw_flash_update_req()
4612 ccb->ccb_tag); in pm8001_chip_fw_flash_update_req()
4630 struct pm8001_hba_info *pm8001_ha = sha->lldd_ha; in pm8001_get_gsm_dump()
4633 gsm_dump_offset = pm8001_ha->fatal_forensic_shift_offset; in pm8001_get_gsm_dump()
4638 return -EINVAL; in pm8001_get_gsm_dump()
4640 if (pm8001_ha->chip_id == chip_8001) in pm8001_get_gsm_dump()
4654 if (pm8001_ha->chip_id == chip_8001) in pm8001_get_gsm_dump()
4662 if (pm8001_ha->chip_id == chip_8001) { in pm8001_get_gsm_dump()
4664 if (-1 == pm8001_bar4_shift(pm8001_ha, in pm8001_get_gsm_dump()
4666 return -EIO; in pm8001_get_gsm_dump()
4669 if (-1 == pm80xx_bar4_shift(pm8001_ha, in pm8001_get_gsm_dump()
4671 return -EIO; in pm8001_get_gsm_dump()
4690 if (-1 == pm8001_bar4_shift(pm8001_ha, 0)) in pm8001_get_gsm_dump()
4691 return -EIO; in pm8001_get_gsm_dump()
4692 pm8001_ha->fatal_forensic_shift_offset += 1024; in pm8001_get_gsm_dump()
4694 if (pm8001_ha->fatal_forensic_shift_offset >= 0x100000) in pm8001_get_gsm_dump()
4695 pm8001_ha->fatal_forensic_shift_offset = 0; in pm8001_get_gsm_dump()
4696 return direct_data - buf; in pm8001_get_gsm_dump()
4712 return -SAS_QUEUE_FULL; in pm8001_chip_set_dev_state_req()
4714 payload.tag = cpu_to_le32(ccb->ccb_tag); in pm8001_chip_set_dev_state_req()
4715 payload.device_id = cpu_to_le32(pm8001_dev->device_id); in pm8001_chip_set_dev_state_req()
4738 return -SAS_QUEUE_FULL; in pm8001_chip_sas_re_initialization()
4740 payload.tag = cpu_to_le32(ccb->ccb_tag); in pm8001_chip_sas_re_initialization()