Lines Matching +full:sata +full:- +full:oob
1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Copyright 2009-2011 Marvell. <[email protected]>
28 /* driver compile-time configuration */
30 MVS_TX_RING_SZ = 1024, /* TX ring size (12-bit) */
31 MVS_RX_RING_SZ = 1024, /* RX ring size (12-bit) */
32 /* software requires power-of-2
40 MVS_ATA_CMD_SZ = 96, /* SATA command table buffer size */
44 MVS_SOC_CAN_QUEUE = MVS_SOC_SLOTS - 2,
77 INT_SAS_SATA = (1U << 0), /* SAS/SATA event */
79 /* MVS_GBL_PORT_TYPE */ /* shl for ports 1-3 */
80 SATA_TARGET = (1U << 16), /* port0 SATA target enable */
81 MODE_AUTO_DET_PORT7 = (1U << 15), /* port0 SAS/SATA autodetect */
93 MODE_SAS_PORT7_MASK = (1U << 7), /* port0 SAS(1), SATA(0) mode */
135 /* shl for ports 1-3 */
147 TXQ_CMD_STP = 3, /* STP/SATA protocol */
156 TXQ_SRS_SHIFT = 20, /* SATA register set */
173 MCH_PRD_LEN_SHIFT = 16, /* 16-bit PRD table len */
190 MCH_PASSTHRU = (1U << 12), /* pass-through (SSP) */
195 MCH_RESET = (1U << 7), /* Reset (STP/SATA) */
196 MCH_FPDMA = (1U << 6), /* First party DMA (STP/SATA) */
197 MCH_ATAPI = (1U << 5), /* ATAPI (STP/SATA) */
198 MCH_BIST = (1U << 4), /* BIST activate (STP/SATA) */
199 MCH_PMP_MASK = 0xf, /* PMP from cmd FIS (STP/SATA)*/
209 /* MVS_Px_SER_CTLSTAT (per-phy control) */
216 /* MVS_Px_INT_STAT, MVS_Px_INT_MASK (per-phy events) */
221 PHYEV_AN = (1U << 18), /* SATA async notification */
224 PHYEV_POOF = (1U << 12), /* phy ready from 1 -> 0 */
239 PCS_EN_SATA_REG_SHIFT = (16), /* Enable SATA Register Set */
245 PCS_SELF_CLEAR = (1U << 5), /* self-clearing int mode */
247 PCS_CMD_STOP_ERR = (1U << 3), /* cmd stop-on-err enable */
288 /* SAS/SATA configuration port registers, aka phy registers */
296 PHYR_SATA_CTL = 0x18, /* SATA control */
298 PHYR_SATA_SIG0 = 0x20, /*port SATA signature FIS(Byte 0-3) */
299 PHYR_SATA_SIG1 = 0x24, /*port SATA signature FIS(Byte 4-7) */
300 PHYR_SATA_SIG2 = 0x28, /*port SATA signature FIS(Byte 8-11) */
301 PHYR_SATA_SIG3 = 0x2c, /*port SATA signature FIS(Byte 12-15) */
325 CMD_CMRST_OOB_DET = 0x100, /* COMRESET OOB detect register */
326 CMD_CMWK_OOB_DET = 0x104, /* COMWAKE OOB detect register */
327 CMD_CMSAS_OOB_DET = 0x108, /* COMSAS OOB detect register */
328 CMD_BRST_OOB_DET = 0x10c, /* burst OOB detect register */
329 CMD_OOB_SPACE = 0x110, /* OOB space control register */
330 CMD_OOB_BURST = 0x114, /* OOB burst control register */
347 CMD_SATA_PORT_MEM_CTL0 = 0x158, /* SATA Port Memory Control 0 */
348 CMD_SATA_PORT_MEM_CTL1 = 0x15c, /* SATA Port Memory Control 1 */
430 TFILE_ERR = (1U << 24), /* SATA taskfile Error bit set */
431 R_ERR = (1U << 23), /* SATA returned R_ERR prim */