Lines Matching +full:scu +full:- +full:index
7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
60 * This file contains the constants and structures for the SCU memory mapped
109 * struct scu_viit_entry - This is the SCU Virtual Initiator Table Entry
164 * struct scu_iit_entry - This will be implemented later when we support
177 /* Generate a value for an SCU register */
182 * Generate a bit value for an SCU register
195 * Unions for bitfield definitions of SCU Registers
394 /* -------------------------------------------------------------------------- */
421 /* -------------------------------------------------------------------------- */
606 * * SCU Link Layer Registers
640 * * SCU SAS Maximum Arbitration Wait Time Timeout Register
905 * ----------------------------------------------------------------------------
917 * ----------------------------------------------------------------------------
955 * struct smu_registers - These are the SMU registers
1033 /* MSI-X registers not included */
1052 * struct scu_sdma_registers - These are the SCU SDMA Registers
1084 * * SCU Link Registers
1122 * struct scu_transport_layer_registers - These are the SCU Transport Layer
1259 * struct scu_link_layer_registers - SCU Link Layer Registers
1395 /* 0x0110 - 0x011C PLAPRDCTRLxREG */
1411 * ----------------------------------------------------------------------------
1413 * ---------------------------------------------------------------------------- */
1428 * struct scu_sgpio_registers - SCU SGPIO Registers
1459 * * Access additional entries by SCU_VIIT_BASE + index * 0x10
1469 * * SCU PORT TASK SCHEDULER REGISTERS
1493 * struct scu_port_task_scheduler_registers - These are the control/stats pairs
1504 * struct scu_port_task_scheduler_group_registers - These are the PORT Task
1605 /* 0x0060-0x006c */
1619 /* 0x0088-0x00fc */
1624 * struct scu_afe_registers - AFE Regsiters
1641 /* 0x0018-0x007c */
1649 /* 0x008C-0x00fc */
1673 /* 0x012c-0x01a8 AFE_DFX_P0_DRx */
1677 /* 0x01b0-0x020c AFE_DFX_P0_IRx */
1683 /* 0x0218-0x245 AFE_DFX_P1_DRx */
1685 /* 0x0258-0x029c */
1687 /* 0x02a0-0x02bc AFE_DFX_P1_IRx */
1689 /* 0x02c0-0x2fc */
1712 /* 0x032c-0x07fc */
1715 /* 0x0800-0x0bfc */
1718 /* 0x0c00-0x0ffc */
1800 * struct transport_link_layer_pair - The SCU Hardware pairs up the TL
1812 * struct scu_peg_registers - SCU Protocol Engine Memory mapped register space.
1814 * at most two PEG for a single SCU part.
1830 * struct scu_registers - SCU registers including both PEG registers if we turn
1837 /* 0x0000 - PEG 0 */
1840 /* 0x6000 - SDMA and Miscellaneous */
1850 /* 0x8000 - PEG 1 */
1853 /* 0xE000 - AFE Registers */
1856 /* 0xF000 - reserved */
1859 /* 0x212000 - scratch RAM */