Lines Matching +full:data +full:- +full:independent
1 // SPDX-License-Identifier: GPL-2.0-only
38 /* ---------- Pause/Unpause CSEQ/LSEQ ---------- */
41 * asd_pause_cseq - pause the central sequencer
61 } while (--count > 0); in asd_pause_cseq()
64 return -1; in asd_pause_cseq()
68 * asd_unpause_cseq - unpause the central sequencer.
88 } while (--count > 0); in asd_unpause_cseq()
91 return -1; in asd_unpause_cseq()
95 * asd_seq_pause_lseq - pause a link sequencer
116 } while (--count > 0); in asd_seq_pause_lseq()
119 return -1; in asd_seq_pause_lseq()
123 * asd_pause_lseq - pause the link sequencer(s)
144 * asd_seq_unpause_lseq - unpause a link sequencer
165 } while (--count > 0); in asd_seq_unpause_lseq()
172 /* ---------- Downloading CSEQ/LSEQ microcode ---------- */
187 pci_name(asd_ha->pcidev), in asd_verify_cseq()
189 return -1; in asd_verify_cseq()
197 * asd_verify_lseq - verify the microcode of a link sequencer
212 int pages = (size + LSEQ_CODEPAGE_SIZE - 1) / LSEQ_CODEPAGE_SIZE; in asd_verify_lseq()
222 i += 4, prog++, size-=4) { in asd_verify_lseq()
229 pci_name(asd_ha->pcidev), in asd_verify_lseq()
231 return -1; in asd_verify_lseq()
236 (int)((u8 *)prog-_prog)); in asd_verify_lseq()
241 * asd_verify_seq -- verify CSEQ/LSEQ microcode
269 #define MAX_DMA_OVLY_COUNT ((1U << 14)-1)
276 const int pages = (size + MAX_DMA_OVLY_COUNT - 1) / MAX_DMA_OVLY_COUNT; in asd_download_seq()
282 return -1; in asd_download_seq()
299 err = -ENOMEM; in asd_download_seq()
302 ASD_DPRINTK("dma-ing %d bytes\n", size); in asd_download_seq()
306 u32 left = min(size-page*MAX_DMA_OVLY_COUNT, in asd_download_seq()
309 memcpy(token->vaddr, prog + page*MAX_DMA_OVLY_COUNT, left); in asd_download_seq()
310 asd_write_reg_addr(asd_ha, OVLYDMAADR, token->dma_handle); in asd_download_seq()
318 for (i = PAUSE_TRIES*100; i > 0; i--) { in asd_download_seq()
329 asd_printk("%s: error DMA-ing sequencer code\n", in asd_download_seq()
330 pci_name(asd_ha->pcidev)); in asd_download_seq()
331 err = -ENODEV; in asd_download_seq()
350 return -1; in asd_download_seq()
376 * asd_seq_download_seqs - download the sequencer microcode
385 if (!asd_ha->hw_prof.enabled_phys) { in asd_seq_download_seqs()
386 asd_printk("%s: no enabled phys!\n", pci_name(asd_ha->pcidev)); in asd_seq_download_seqs()
387 return -ENODEV; in asd_seq_download_seqs()
403 asd_ha->hw_prof.enabled_phys); in asd_seq_download_seqs()
407 u8 lseq_mask = asd_ha->hw_prof.enabled_phys; in asd_seq_download_seqs()
422 /* ---------- Initializing the chip, chip memory, etc. ---------- */
425 * asd_init_cseq_mip - initialize CSEQ mode independent pages 4-7
430 /* CSEQ Mode Independent, page 4 setup. */ in asd_init_cseq_mip()
452 /* CSEQ Mode independent, page 5 setup. */ in asd_init_cseq_mip()
464 /* CSEQ Mode independent, page 6 setup. */ in asd_init_cseq_mip()
477 cmdctx = (~((cmdctx/128)-1)) >> 8; in asd_init_cseq_mip()
487 /* CSEQ Mode independent, page 7 setup. */ in asd_init_cseq_mip()
503 * asd_init_cseq_mdp - initialize CSEQ Mode dependent pages
513 /* CSEQ Mode dependent, modes 0-7, page 0 setup. */ in asd_init_cseq_mdp()
522 /* CSEQ Mode dependent, mode 0-7, page 1 and 2 shall be ignored. */ in asd_init_cseq_mdp()
540 (u16)asd_ha->hw_prof.max_ddbs); in asd_init_cseq_mdp()
551 asd_ha->seq.next_scb.dma_handle); in asd_init_cseq_mdp()
553 (unsigned long long)asd_ha->seq.next_scb.dma_handle); in asd_init_cseq_mdp()
557 asd_ha->seq.actual_dl->dma_handle); in asd_init_cseq_mdp()
562 ASD_BUSADDR_LO(asd_ha->seq.actual_dl->dma_handle)); in asd_init_cseq_mdp()
570 * asd_init_cseq_scratch -- setup and init CSEQ
574 * independent and dependent scratch page to the default settings.
583 * asd_init_lseq_mip -- initialize LSEQ Mode independent pages 0-3
591 /* LSEQ Mode independent page 0 setup. */ in asd_init_lseq_mip()
607 /* LSEQ Mode independent page 1 setup. */ in asd_init_lseq_mip()
623 /* LSEQ Mode Independent page 2 setup. */ in asd_init_lseq_mip()
638 /* LSEQ Mode Independent page 3 setup. */ in asd_init_lseq_mip()
671 * asd_init_lseq_mdp -- initialize LSEQ mode dependent pages.
724 (u16)asd_ha->hw_prof.max_ddbs); in asd_init_lseq_mdp()
769 * (ENABLE SPINUP) primitive. Must be initialized to val - 1. in asd_init_lseq_mdp()
772 ASD_NOTIFY_TIMEOUT - 1); in asd_init_lseq_mdp()
838 * asd_init_lseq_scratch -- setup and init link sequencers
846 lseq_mask = asd_ha->hw_prof.enabled_phys; in asd_init_lseq_scratch()
854 * asd_init_scb_sites -- initialize sequencer SCB sites (memory).
866 for (site_no = asd_ha->hw_prof.max_scbs-1; in asd_init_scb_sites()
867 site_no != (u16) -1; in asd_init_scb_sites()
868 site_no--) { in asd_init_scb_sites()
903 asd_ha->hw_prof.max_scbs = max_scbs; in asd_init_scb_sites()
904 ASD_DPRINTK("max_scbs:%d\n", asd_ha->hw_prof.max_scbs); in asd_init_scb_sites()
910 * asd_init_cseq_cio - initialize CSEQ CIO registers
921 asd_ha->seq.scbpro = 0; in asd_init_cseq_cio()
939 /* Initialize CSEQ Mode[0-8] Dependent registers. */ in asd_init_cseq_cio()
956 * asd_init_lseq_cio -- initialize LmSEQ CIO registers
1043 sas_addr = asd_ha->phys[lseq].phy_desc->sas_addr; in asd_init_lseq_cio()
1056 /* Initialize Interrupt Vector[0-10] address in Mode 3. in asd_init_lseq_cio()
1083 * asd_post_init_cseq -- clear CSEQ Mode n Int. status and Response mailbox
1099 * asd_init_ddb_0 -- initialize DDB 0
1116 asd_ha->hw_prof.max_ddbs-1); in asd_init_ddb_0()
1131 asd_ha->hw_prof.num_phys * 2); in asd_init_ddb_0()
1139 set_bit(0, asd_ha->hw_prof.ddb_bitmap); in asd_init_ddb_0()
1153 * asd_seq_setup_seqs -- setup and initialize central and link sequencers
1180 lseq_mask = asd_ha->hw_prof.enabled_phys; in asd_seq_setup_seqs()
1188 * asd_seq_start_cseq -- start the central sequencer, CSEQ
1201 * asd_seq_start_lseq -- start a link sequencer
1234 &asd_ha->pcidev->dev); in asd_request_firmware()
1238 hdr_ptr = (const struct sequencer_file_header *)sequencer_fw->data; in asd_request_firmware()
1240 header.csum = le32_to_cpu(hdr_ptr->csum); in asd_request_firmware()
1241 header.major = le32_to_cpu(hdr_ptr->major); in asd_request_firmware()
1242 header.minor = le32_to_cpu(hdr_ptr->minor); in asd_request_firmware()
1243 header.cseq_table_offset = le32_to_cpu(hdr_ptr->cseq_table_offset); in asd_request_firmware()
1244 header.cseq_table_size = le32_to_cpu(hdr_ptr->cseq_table_size); in asd_request_firmware()
1245 header.lseq_table_offset = le32_to_cpu(hdr_ptr->lseq_table_offset); in asd_request_firmware()
1246 header.lseq_table_size = le32_to_cpu(hdr_ptr->lseq_table_size); in asd_request_firmware()
1247 header.cseq_code_offset = le32_to_cpu(hdr_ptr->cseq_code_offset); in asd_request_firmware()
1248 header.cseq_code_size = le32_to_cpu(hdr_ptr->cseq_code_size); in asd_request_firmware()
1249 header.lseq_code_offset = le32_to_cpu(hdr_ptr->lseq_code_offset); in asd_request_firmware()
1250 header.lseq_code_size = le32_to_cpu(hdr_ptr->lseq_code_size); in asd_request_firmware()
1251 header.mode2_task = le16_to_cpu(hdr_ptr->mode2_task); in asd_request_firmware()
1252 header.cseq_idle_loop = le16_to_cpu(hdr_ptr->cseq_idle_loop); in asd_request_firmware()
1253 header.lseq_idle_loop = le16_to_cpu(hdr_ptr->lseq_idle_loop); in asd_request_firmware()
1255 for (i = sizeof(header.csum); i < sequencer_fw->size; i++) in asd_request_firmware()
1256 csum += sequencer_fw->data[i]; in asd_request_firmware()
1260 return -EINVAL; in asd_request_firmware()
1266 return -EINVAL; in asd_request_firmware()
1270 header.major, header.minor, hdr_ptr->version); in asd_request_firmware()
1276 return -EINVAL; in asd_request_firmware()
1279 ptr_cseq_vecs = (u16 *)&sequencer_fw->data[header.cseq_table_offset]; in asd_request_firmware()
1280 ptr_lseq_vecs = (u16 *)&sequencer_fw->data[header.lseq_table_offset]; in asd_request_firmware()
1291 cseq_code = &sequencer_fw->data[header.cseq_code_offset]; in asd_request_firmware()
1293 lseq_code = &sequencer_fw->data[header.lseq_code_offset]; in asd_request_firmware()
1314 pci_name(asd_ha->pcidev)); in asd_init_seqs()
1332 pci_name(asd_ha->pcidev)); in asd_start_seqs()
1336 lseq_mask = asd_ha->hw_prof.enabled_phys; in asd_start_seqs()
1341 pci_name(asd_ha->pcidev)); in asd_start_seqs()
1350 * asd_update_port_links -- update port_map_by_links and phy_is_up
1369 const u8 phy_mask = (u8) phy->asd_port->phy_mask; in asd_update_port_links()
1375 spin_lock_irqsave(&asd_ha->hw_prof.ddb_lock, flags); in asd_update_port_links()
1390 else if (err == -EFAULT) { in asd_update_port_links()
1395 spin_unlock_irqrestore(&asd_ha->hw_prof.ddb_lock, flags); in asd_update_port_links()