1 // SPDX-License-Identifier: GPL-2.0-only
3  * Real time clocks driver for MStar/SigmaStar SSD202D SoCs.
14 #include <linux/rtc.h>
65 	struct device *dev = &priv->rtc_dev->dev;  in ssd202d_rtc_isoctrl()
73 		writeb(sequence[i] & ISO_CTRL_MASK, priv->base +  REG_ISO_CTRL);  in ssd202d_rtc_isoctrl()
76 					20 * 100, true, priv->base);  in ssd202d_rtc_isoctrl()
87 	ret = read_poll_timeout(read_iso_en, val, val, 100, 22 * 100, true, priv->base);  in ssd202d_rtc_isoctrl()
100 	/* Ask for the content of an RTC value into RDDATA by gating iso_en,  in ssd202d_rtc_read_reg()
103 	val = readw(priv->base + reg);  in ssd202d_rtc_read_reg()
104 	writew(val | field, priv->base + reg);  in ssd202d_rtc_read_reg()
106 	writew(val & ~field, priv->base + reg);  in ssd202d_rtc_read_reg()
108 	l = readw(priv->base + REG_RDDATA_L);  in ssd202d_rtc_read_reg()
109 	h = readw(priv->base + REG_RDDATA_H);  in ssd202d_rtc_read_reg()
119 	/* Set the content of an RTC value from WRDATA by gating iso_en */  in ssd202d_rtc_write_reg()
120 	val = readw(priv->base + reg);  in ssd202d_rtc_write_reg()
121 	writew(val | field, priv->base + reg);  in ssd202d_rtc_write_reg()
122 	writew(base, priv->base + REG_WRDATA_L);  in ssd202d_rtc_write_reg()
123 	writew(base >> 16, priv->base + REG_WRDATA_H);  in ssd202d_rtc_write_reg()
125 	writew(val & ~field, priv->base + reg);  in ssd202d_rtc_write_reg()
133 	val = readw(priv->base + REG_CTRL1);  in ssd202d_rtc_read_counter()
134 	writew(val | CNT_RD_BIT, priv->base + REG_CTRL1);  in ssd202d_rtc_read_counter()
136 	writew(val & ~CNT_RD_BIT, priv->base + REG_CTRL1);  in ssd202d_rtc_read_counter()
138 	val = readw(priv->base + REG_CTRL1);  in ssd202d_rtc_read_counter()
139 	writew(val | CNT_RD_TRIG_BIT, priv->base + REG_CNT_TRIG);  in ssd202d_rtc_read_counter()
140 	writew(val & ~CNT_RD_TRIG_BIT, priv->base + REG_CNT_TRIG);  in ssd202d_rtc_read_counter()
142 	l = readw(priv->base + REG_RDCNT_L);  in ssd202d_rtc_read_counter()
143 	h = readw(priv->base + REG_RDCNT_H);  in ssd202d_rtc_read_counter()
157 	/* Check that RTC is enabled by SW */  in ssd202d_rtc_read_time()
160 		return -EINVAL;  in ssd202d_rtc_read_time()
162 	/* Get RTC base value from RDDATA */  in ssd202d_rtc_read_time()
164 	/* Get RTC counter value from RDDATA */  in ssd202d_rtc_read_time()
180 	val = readw(priv->base + REG_CTRL);  in ssd202d_rtc_reset_counter()
181 	writew(val | CNT_RST_BIT, priv->base + REG_CTRL);  in ssd202d_rtc_reset_counter()
183 	writew(val & ~CNT_RST_BIT, priv->base + REG_CTRL);  in ssd202d_rtc_reset_counter()
208 	struct device *dev = &pdev->dev;  in ssd202d_rtc_probe()
211 	priv = devm_kzalloc(&pdev->dev, sizeof(struct ssd202d_rtc), GFP_KERNEL);  in ssd202d_rtc_probe()
213 		return -ENOMEM;  in ssd202d_rtc_probe()
215 	priv->base = devm_platform_ioremap_resource(pdev, 0);  in ssd202d_rtc_probe()
216 	if (IS_ERR(priv->base))  in ssd202d_rtc_probe()
217 		return PTR_ERR(priv->base);  in ssd202d_rtc_probe()
219 	priv->rtc_dev = devm_rtc_allocate_device(dev);  in ssd202d_rtc_probe()
220 	if (IS_ERR(priv->rtc_dev))  in ssd202d_rtc_probe()
221 		return PTR_ERR(priv->rtc_dev);  in ssd202d_rtc_probe()
223 	priv->rtc_dev->ops = &ssd202d_rtc_ops;  in ssd202d_rtc_probe()
224 	priv->rtc_dev->range_max = U32_MAX;  in ssd202d_rtc_probe()
228 	return devm_rtc_register_device(priv->rtc_dev);  in ssd202d_rtc_probe()
232 	{ .compatible = "mstar,ssd202d-rtc" },
240 		.name = "ssd202d-rtc",
248 MODULE_DESCRIPTION("MStar SSD202D RTC Driver");