Lines Matching +full:default +full:- +full:on
1 # SPDX-License-Identifier: GPL-2.0-only
7 default y if ARCH_HAS_RESET_CONTROLLER
12 via GPIOs or SoC-internal reset controller modules.
20 depends on MFD_ALTERA_A10SR || COMPILE_TEST
23 peripheral PHYs on the Altera Arria10 System Resource Chip.
27 default ATH79
34 default ARC_PLAT_AXS10X
40 depends on BMIPS_GENERIC || COMPILE_TEST
41 default BMIPS_GENERIC
47 depends on ARCH_BERLIN || COMPILE_TEST
48 default m if ARCH_BERLIN
54 depends on ARCH_BRCMSTB || COMPILE_TEST
55 default ARCH_BRCMSTB
62 depends on HAS_IOMEM
63 depends on ARCH_BRCMSTB || COMPILE_TEST
64 default ARCH_BRCMSTB
66 This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
71 depends on MACH_EYEQ5 || MACH_EYEQ6H || COMPILE_TEST
73 default MACH_EYEQ5 || MACH_EYEQ6H
84 depends on GPIOLIB
87 GPIOs. Typically for OF platforms this driver expects "reset-gpios"
90 If compiled as module, it will be called reset-gpio.
94 depends on HAS_IOMEM
95 depends on ARC_SOC_HSDK || COMPILE_TEST
101 depends on HAS_IOMEM
102 depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
103 default y if SOC_IMX7D
110 depends on ARCH_MXC || COMPILE_TEST
112 default CLK_IMX8MP
118 depends on X86 || COMPILE_TEST
119 depends on OF && HAS_IOMEM
128 depends on (SOC_CANAAN_K210 || COMPILE_TEST) && OF
130 default SOC_CANAAN_K210
132 Support for the Canaan Kendryte K210 RISC-V SoC reset controller.
138 default SOC_TYPE_XWAY
144 default ARCH_LPC18XX
150 depends on ARCH_SPARX5 || SOC_LAN966 || MCHP_LAN966X_PCI || COMPILE_TEST
151 default y if SPARX5_SWITCH
158 default ARCH_NPCM
166 depends on ARCH_MA35 || COMPILE_TEST
167 default ARCH_MA35
173 depends on MIPS || COMPILE_TEST
179 depends on MCHP_CLK_MPFS
181 default MCHP_CLK_MPFS
187 depends on ARCH_QCOM || COMPILE_TEST
189 This enables the AOSS (always on subsystem) reset driver
196 depends on ARCH_QCOM || COMPILE_TEST
205 depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
206 default USB_XHCI_PCI
208 Raspberry Pi 4's co-processor controls some of the board's HW
211 interfacing with RPi4's co-processor and model these firmware
216 depends on ARCH_RZG2L || COMPILE_TEST
218 Support for USBPHY Control found on RZ/G2L family. It mainly
223 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
224 default ARM_SCMI_PROTOCOL
234 …default ARCH_ASPEED || ARCH_BCMBCA || ARCH_BITMAIN || ARCH_REALTEK || ARCH_SOPHGO || ARCH_STM32 ||…
235 depends on HAS_IOMEM
242 - Altera SoCFPGAs
243 - ASPEED BMC SoCs
244 - Bitmain BM1880 SoC
245 - Realtek SoCs
246 - RCC reset controller in STM32 MCUs
247 - Allwinner SoCs
248 - SiFive FU740 SoCs
249 - Sophgo SoCs
253 default ARM && ARCH_INTEL_SOCFPGA
261 default ARCH_SUNPLUS
270 default ARCH_SUNXI
276 tristate "TI System Control Interface (TI-SCI) reset driver"
277 depends on TI_SCI_PROTOCOL || (COMPILE_TEST && TI_SCI_PROTOCOL=n)
280 available on some new TI's SoCs. If you wish to use reset resources
285 depends on HAS_IOMEM
289 memory-mapped reset registers as part of a syscon device node. If
290 you wish to use the reset framework for such memory-mapped devices,
303 depends on MFD_TN48M_CPLD || COMPILE_TEST
304 default MFD_TN48M_CPLD
307 It provides reset signals for Armada 7040 and 385 SoC-s, Alleycat 3X
308 switch MAC-s, Alaska OOB ethernet PHY, Quad Alaska ethernet PHY-s and
312 called reset-tn48m.
316 depends on ARCH_UNIPHIER || COMPILE_TEST
317 depends on OF && MFD_SYSCON
318 default ARCH_UNIPHIER
320 Support for reset controllers on UniPhier SoCs.
326 depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
327 default ARCH_UNIPHIER
331 on UniPhier SoCs. Say Y if you want to control reset signals
336 default ARCH_ZYNQ
342 default ARCH_ZYNQMP