Lines Matching full:q6
498 * When the AXI pipeline is being reset with the Q6 modem partly in q6v5_reset_assert()
500 * glitch, leading to spurious transactions and Q6 hangs. A work in q6v5_reset_assert()
502 * BIT before triggering Q6 MSS reset. AXI_GATING_VALID_OVERRIDE in q6v5_reset_assert()
677 /* Configure Q6 core CBCR to auto-enable after reset sequence */ in q6v5proc_reset()
682 /* De-assert the Q6 stop core signal */ in q6v5proc_reset()
688 /* Trigger the boot FSM to start the Q6 out-of-reset sequence */ in q6v5proc_reset()
1027 "assigning Q6 access to metadata failed: %d\n", ret); in q6v5_mpss_init_image()
1143 * the Q6 access to this region. in q6v5_mba_load()
1148 dev_err(qproc->dev, "assigning Q6 access to mpss memory failed: %d\n", ret); in q6v5_mba_load()
1152 /* Assign MBA image access in DDR to q6 */ in q6v5_mba_load()
1157 "assigning Q6 access to mba memory failed: %d\n", ret); in q6v5_mba_load()
1407 "assigning Q6 access to mpss memory failed: %d\n", ret); in q6v5_mpss_load()
1503 /* Transfer ownership of modem ddr region to q6 */ in q6v5_mpss_load()
1508 "assigning Q6 access to mpss memory failed: %d\n", ret); in q6v5_mpss_load()
1565 /* Try to reset ownership back to Q6 */ in qcom_q6v5_dump_segment()