Lines Matching +full:8 +full:- +full:cx +full:- +full:mx +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm self-authenticating modem subsystem remoteproc driver
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
13 #include <linux/dma-mapping.h>
118 #define QDSP6V55_MEM_BITS GENMASK(16, 8)
144 const char *supply; member
198 struct clk *active_clks[8];
269 for (i = 0; reg_res[i].supply; i++) { in q6v5_regulator_init()
270 regs[i].reg = devm_regulator_get(dev, reg_res[i].supply); in q6v5_regulator_init()
274 reg_res[i].supply); in q6v5_regulator_init()
294 dev_err(qproc->dev, in q6v5_regulator_enable()
305 dev_err(qproc->dev, in q6v5_regulator_enable()
313 dev_err(qproc->dev, "Regulator enable failed\n"); in q6v5_regulator_enable()
320 for (; i >= 0; i--) { in q6v5_regulator_enable()
365 for (i--; i >= 0; i--) in q6v5_clk_enable()
399 for (i--; i >= 0; i--) { in q6v5_pds_enable()
425 if (!qproc->need_mem_protection) in q6v5_xfer_mem_ownership()
452 if (request_firmware_direct(&dp_fw, "msadp", qproc->dev)) in q6v5_debug_policy_load()
455 if (SZ_1M + dp_fw->size <= qproc->mba_size) { in q6v5_debug_policy_load()
456 memcpy(mba_region + SZ_1M, dp_fw->data, dp_fw->size); in q6v5_debug_policy_load()
457 qproc->dp_size = dp_fw->size; in q6v5_debug_policy_load()
465 struct q6v5 *qproc = rproc->priv; in q6v5_load()
469 if (fw->size > qproc->mba_size || fw->size > SZ_1M) { in q6v5_load()
470 dev_err(qproc->dev, "MBA firmware load failed\n"); in q6v5_load()
471 return -EINVAL; in q6v5_load()
474 mba_region = memremap(qproc->mba_phys, qproc->mba_size, MEMREMAP_WC); in q6v5_load()
476 dev_err(qproc->dev, "unable to map memory region: %pa+%zx\n", in q6v5_load()
477 &qproc->mba_phys, qproc->mba_size); in q6v5_load()
478 return -EBUSY; in q6v5_load()
481 memcpy(mba_region, fw->data, fw->size); in q6v5_load()
492 if (qproc->has_alt_reset) { in q6v5_reset_assert()
493 reset_control_assert(qproc->pdc_reset); in q6v5_reset_assert()
494 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_assert()
495 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_assert()
496 } else if (qproc->has_spare_reg) { in q6v5_reset_assert()
506 reset_control_assert(qproc->pdc_reset); in q6v5_reset_assert()
507 regmap_update_bits(qproc->conn_map, qproc->conn_box, in q6v5_reset_assert()
509 reset_control_assert(qproc->mss_restart); in q6v5_reset_assert()
510 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_assert()
511 regmap_update_bits(qproc->conn_map, qproc->conn_box, in q6v5_reset_assert()
513 ret = reset_control_deassert(qproc->mss_restart); in q6v5_reset_assert()
514 } else if (qproc->has_ext_cntl_regs) { in q6v5_reset_assert()
515 regmap_write(qproc->conn_map, qproc->rscc_disable, 0); in q6v5_reset_assert()
516 reset_control_assert(qproc->pdc_reset); in q6v5_reset_assert()
517 reset_control_assert(qproc->mss_restart); in q6v5_reset_assert()
518 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_assert()
519 ret = reset_control_deassert(qproc->mss_restart); in q6v5_reset_assert()
521 ret = reset_control_assert(qproc->mss_restart); in q6v5_reset_assert()
531 if (qproc->has_alt_reset) { in q6v5_reset_deassert()
532 reset_control_assert(qproc->pdc_reset); in q6v5_reset_deassert()
533 writel(1, qproc->rmb_base + RMB_MBA_ALT_RESET); in q6v5_reset_deassert()
534 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_deassert()
535 writel(0, qproc->rmb_base + RMB_MBA_ALT_RESET); in q6v5_reset_deassert()
536 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_deassert()
537 } else if (qproc->has_spare_reg || qproc->has_ext_cntl_regs) { in q6v5_reset_deassert()
538 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_deassert()
540 ret = reset_control_deassert(qproc->mss_restart); in q6v5_reset_deassert()
553 val = readl(qproc->rmb_base + RMB_PBL_STATUS_REG); in q6v5_rmb_pbl_wait()
558 return -ETIMEDOUT; in q6v5_rmb_pbl_wait()
574 val = readl(qproc->rmb_base + RMB_MBA_STATUS_REG); in q6v5_rmb_mba_wait()
584 return -ETIMEDOUT; in q6v5_rmb_mba_wait()
594 struct rproc *rproc = qproc->rproc; in q6v5_dump_mba_logs()
598 if (!qproc->has_mba_logs) in q6v5_dump_mba_logs()
601 if (q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, false, qproc->mba_phys, in q6v5_dump_mba_logs()
602 qproc->mba_size)) in q6v5_dump_mba_logs()
605 mba_region = memremap(qproc->mba_phys, qproc->mba_size, MEMREMAP_WC); in q6v5_dump_mba_logs()
612 dev_coredumpv(&rproc->dev, data, MBA_LOG_SIZE, GFP_KERNEL); in q6v5_dump_mba_logs()
623 if (qproc->version == MSS_SDM845) { in q6v5proc_reset()
624 val = readl(qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
626 writel(val, qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
628 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_SLEEP, in q6v5proc_reset()
632 dev_err(qproc->dev, "QDSP6SS Sleep clock timed out\n"); in q6v5proc_reset()
633 return -ETIMEDOUT; in q6v5proc_reset()
636 /* De-assert QDSP6 stop core */ in q6v5proc_reset()
637 writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START); in q6v5proc_reset()
639 writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD); in q6v5proc_reset()
641 ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS, in q6v5proc_reset()
644 dev_err(qproc->dev, "Boot FSM failed to complete.\n"); in q6v5proc_reset()
651 } else if (qproc->version == MSS_SC7180 || qproc->version == MSS_SC7280) { in q6v5proc_reset()
652 val = readl(qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
654 writel(val, qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
656 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_SLEEP, in q6v5proc_reset()
660 dev_err(qproc->dev, "QDSP6SS Sleep clock timed out\n"); in q6v5proc_reset()
661 return -ETIMEDOUT; in q6v5proc_reset()
665 val = readl(qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
667 writel(val, qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
669 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_XO_CBCR, in q6v5proc_reset()
673 dev_err(qproc->dev, "QDSP6SS XO clock timed out\n"); in q6v5proc_reset()
674 return -ETIMEDOUT; in q6v5proc_reset()
677 /* Configure Q6 core CBCR to auto-enable after reset sequence */ in q6v5proc_reset()
678 val = readl(qproc->reg_base + QDSP6SS_CORE_CBCR); in q6v5proc_reset()
680 writel(val, qproc->reg_base + QDSP6SS_CORE_CBCR); in q6v5proc_reset()
682 /* De-assert the Q6 stop core signal */ in q6v5proc_reset()
683 writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START); in q6v5proc_reset()
688 /* Trigger the boot FSM to start the Q6 out-of-reset sequence */ in q6v5proc_reset()
689 writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD); in q6v5proc_reset()
692 ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS, in q6v5proc_reset()
695 dev_err(qproc->dev, "Boot FSM failed to complete.\n"); in q6v5proc_reset()
701 } else if (qproc->version == MSS_MSM8909 || in q6v5proc_reset()
702 qproc->version == MSS_MSM8953 || in q6v5proc_reset()
703 qproc->version == MSS_MSM8996 || in q6v5proc_reset()
704 qproc->version == MSS_MSM8998 || in q6v5proc_reset()
705 qproc->version == MSS_SDM660) { in q6v5proc_reset()
707 if (qproc->version != MSS_MSM8909 && in q6v5proc_reset()
708 qproc->version != MSS_MSM8953) in q6v5proc_reset()
711 qproc->reg_base + QDSP6SS_STRAP_ACC); in q6v5proc_reset()
714 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
716 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
719 val = readl(qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
721 writel(val, qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
724 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_XO_CBCR, in q6v5proc_reset()
728 dev_err(qproc->dev, in q6v5proc_reset()
733 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
735 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
736 val |= readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
739 if (qproc->version == MSS_SDM660) { in q6v5proc_reset()
740 ret = readl_relaxed_poll_timeout(qproc->reg_base + QDSP6V62SS_BHS_STATUS, in q6v5proc_reset()
743 if (ret == -ETIMEDOUT) { in q6v5proc_reset()
744 dev_err(qproc->dev, "BHS_EN_REST_ACK not set!\n"); in q6v5proc_reset()
745 return -ETIMEDOUT; in q6v5proc_reset()
751 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
753 if (qproc->version != MSS_MSM8909) { in q6v5proc_reset()
757 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
759 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
763 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
766 if (qproc->version == MSS_MSM8953 || in q6v5proc_reset()
767 qproc->version == MSS_MSM8996) { in q6v5proc_reset()
775 val = readl(qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
776 for (; i >= 0; i--) { in q6v5proc_reset()
778 writel(val, qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
784 val |= readl(qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
789 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
792 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
797 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
802 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
804 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
807 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
809 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
812 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
814 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
815 val |= readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
821 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
824 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
826 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
828 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
830 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
834 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
837 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
839 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
842 val = readl(qproc->reg_base + QDSP6SS_GFMUX_CTL_REG); in q6v5proc_reset()
844 writel(val, qproc->reg_base + QDSP6SS_GFMUX_CTL_REG); in q6v5proc_reset()
847 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
849 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
854 if (ret == -ETIMEDOUT) { in q6v5proc_reset()
855 dev_err(qproc->dev, "PBL boot timed out\n"); in q6v5proc_reset()
857 dev_err(qproc->dev, "PBL returned unexpected status %d\n", ret); in q6v5proc_reset()
858 ret = -EINVAL; in q6v5proc_reset()
871 if (!qproc->has_qaccept_regs) in q6v5proc_enable_qchannel()
874 if (qproc->has_ext_cntl_regs) { in q6v5proc_enable_qchannel()
875 regmap_write(qproc->conn_map, qproc->rscc_disable, 0); in q6v5proc_enable_qchannel()
876 regmap_write(qproc->conn_map, qproc->force_clk_on, 1); in q6v5proc_enable_qchannel()
878 ret = regmap_read_poll_timeout(qproc->halt_map, qproc->axim1_clk_off, val, in q6v5proc_enable_qchannel()
881 dev_err(qproc->dev, "failed to enable axim1 clock\n"); in q6v5proc_enable_qchannel()
882 return -ETIMEDOUT; in q6v5proc_enable_qchannel()
892 dev_err(qproc->dev, "qchannel enable failed\n"); in q6v5proc_enable_qchannel()
893 return -ETIMEDOUT; in q6v5proc_enable_qchannel()
906 if (!qproc->has_qaccept_regs) in q6v5proc_disable_qchannel()
910 nretry--; in q6v5proc_disable_qchannel()
916 /* Request Q-channel transaction takedown */ in q6v5proc_disable_qchannel()
920 * If the request is denied, reset the Q-channel takedown request, in q6v5proc_disable_qchannel()
926 retry--; in q6v5proc_disable_qchannel()
946 dev_err(qproc->dev, "qchannel takedown failed\n"); in q6v5proc_disable_qchannel()
970 dev_err(qproc->dev, "port failed halt\n"); in q6v5proc_halt_axi_port()
988 metadata = qcom_mdt_read_metadata(fw, &size, fw_name, qproc->dev); in q6v5_mpss_init_image()
992 if (qproc->mdata_phys) { in q6v5_mpss_init_image()
993 if (size > qproc->mdata_size) { in q6v5_mpss_init_image()
994 ret = -EINVAL; in q6v5_mpss_init_image()
995 dev_err(qproc->dev, "metadata size outside memory range\n"); in q6v5_mpss_init_image()
999 phys = qproc->mdata_phys; in q6v5_mpss_init_image()
1000 ptr = memremap(qproc->mdata_phys, size, MEMREMAP_WC); in q6v5_mpss_init_image()
1002 ret = -EBUSY; in q6v5_mpss_init_image()
1003 dev_err(qproc->dev, "unable to map memory region: %pa+%zx\n", in q6v5_mpss_init_image()
1004 &qproc->mdata_phys, size); in q6v5_mpss_init_image()
1008 ptr = dma_alloc_attrs(qproc->dev, size, &phys, GFP_KERNEL, dma_attrs); in q6v5_mpss_init_image()
1010 ret = -ENOMEM; in q6v5_mpss_init_image()
1011 dev_err(qproc->dev, "failed to allocate mdt buffer\n"); in q6v5_mpss_init_image()
1018 if (qproc->mdata_phys) in q6v5_mpss_init_image()
1026 dev_err(qproc->dev, in q6v5_mpss_init_image()
1028 ret = -EAGAIN; in q6v5_mpss_init_image()
1032 writel(phys, qproc->rmb_base + RMB_PMI_META_DATA_REG); in q6v5_mpss_init_image()
1033 writel(RMB_CMD_META_DATA_READY, qproc->rmb_base + RMB_MBA_COMMAND_REG); in q6v5_mpss_init_image()
1036 if (ret == -ETIMEDOUT) in q6v5_mpss_init_image()
1037 dev_err(qproc->dev, "MPSS header authentication timed out\n"); in q6v5_mpss_init_image()
1039 dev_err(qproc->dev, "MPSS header authentication failed: %d\n", ret); in q6v5_mpss_init_image()
1045 dev_warn(qproc->dev, in q6v5_mpss_init_image()
1049 if (!qproc->mdata_phys) in q6v5_mpss_init_image()
1050 dma_free_attrs(qproc->dev, size, ptr, phys, dma_attrs); in q6v5_mpss_init_image()
1059 if (phdr->p_type != PT_LOAD) in q6v5_phdr_valid()
1062 if ((phdr->p_flags & QCOM_MDT_TYPE_MASK) == QCOM_MDT_TYPE_HASH) in q6v5_phdr_valid()
1065 if (!phdr->p_memsz) in q6v5_phdr_valid()
1077 ret = qcom_q6v5_prepare(&qproc->q6v5); in q6v5_mba_load()
1081 ret = q6v5_pds_enable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_mba_load()
1083 dev_err(qproc->dev, "failed to enable proxy power domains\n"); in q6v5_mba_load()
1087 ret = q6v5_regulator_enable(qproc, qproc->fallback_proxy_regs, in q6v5_mba_load()
1088 qproc->fallback_proxy_reg_count); in q6v5_mba_load()
1090 dev_err(qproc->dev, "failed to enable fallback proxy supplies\n"); in q6v5_mba_load()
1094 ret = q6v5_regulator_enable(qproc, qproc->proxy_regs, in q6v5_mba_load()
1095 qproc->proxy_reg_count); in q6v5_mba_load()
1097 dev_err(qproc->dev, "failed to enable proxy supplies\n"); in q6v5_mba_load()
1101 ret = q6v5_clk_enable(qproc->dev, qproc->proxy_clks, in q6v5_mba_load()
1102 qproc->proxy_clk_count); in q6v5_mba_load()
1104 dev_err(qproc->dev, "failed to enable proxy clocks\n"); in q6v5_mba_load()
1108 ret = q6v5_regulator_enable(qproc, qproc->active_regs, in q6v5_mba_load()
1109 qproc->active_reg_count); in q6v5_mba_load()
1111 dev_err(qproc->dev, "failed to enable supplies\n"); in q6v5_mba_load()
1115 ret = q6v5_clk_enable(qproc->dev, qproc->reset_clks, in q6v5_mba_load()
1116 qproc->reset_clk_count); in q6v5_mba_load()
1118 dev_err(qproc->dev, "failed to enable reset clocks\n"); in q6v5_mba_load()
1124 dev_err(qproc->dev, "failed to deassert mss restart\n"); in q6v5_mba_load()
1128 ret = q6v5_clk_enable(qproc->dev, qproc->active_clks, in q6v5_mba_load()
1129 qproc->active_clk_count); in q6v5_mba_load()
1131 dev_err(qproc->dev, "failed to enable clocks\n"); in q6v5_mba_load()
1135 ret = q6v5proc_enable_qchannel(qproc, qproc->halt_map, qproc->qaccept_axi); in q6v5_mba_load()
1137 dev_err(qproc->dev, "failed to enable axi bridge\n"); in q6v5_mba_load()
1145 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, false, true, in q6v5_mba_load()
1146 qproc->mpss_phys, qproc->mpss_size); in q6v5_mba_load()
1148 dev_err(qproc->dev, "assigning Q6 access to mpss memory failed: %d\n", ret); in q6v5_mba_load()
1153 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, false, true, in q6v5_mba_load()
1154 qproc->mba_phys, qproc->mba_size); in q6v5_mba_load()
1156 dev_err(qproc->dev, in q6v5_mba_load()
1161 if (qproc->has_mba_logs) in q6v5_mba_load()
1162 qcom_pil_info_store("mba", qproc->mba_phys, MBA_LOG_SIZE); in q6v5_mba_load()
1164 writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG); in q6v5_mba_load()
1165 if (qproc->dp_size) { in q6v5_mba_load()
1166 writel(qproc->mba_phys + SZ_1M, qproc->rmb_base + RMB_PMI_CODE_START_REG); in q6v5_mba_load()
1167 writel(qproc->dp_size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mba_load()
1175 if (ret == -ETIMEDOUT) { in q6v5_mba_load()
1176 dev_err(qproc->dev, "MBA boot timed out\n"); in q6v5_mba_load()
1180 dev_err(qproc->dev, "MBA returned unexpected status %d\n", ret); in q6v5_mba_load()
1181 ret = -EINVAL; in q6v5_mba_load()
1185 qproc->dump_mba_loaded = true; in q6v5_mba_load()
1189 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6); in q6v5_mba_load()
1190 if (qproc->has_vq6) in q6v5_mba_load()
1191 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_vq6); in q6v5_mba_load()
1192 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem); in q6v5_mba_load()
1193 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc); in q6v5_mba_load()
1194 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_mdm); in q6v5_mba_load()
1195 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_cx); in q6v5_mba_load()
1196 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_axi); in q6v5_mba_load()
1199 xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, in q6v5_mba_load()
1200 false, qproc->mba_phys, in q6v5_mba_load()
1201 qproc->mba_size); in q6v5_mba_load()
1203 dev_err(qproc->dev, in q6v5_mba_load()
1210 q6v5_clk_disable(qproc->dev, qproc->active_clks, in q6v5_mba_load()
1211 qproc->active_clk_count); in q6v5_mba_load()
1215 q6v5_clk_disable(qproc->dev, qproc->reset_clks, in q6v5_mba_load()
1216 qproc->reset_clk_count); in q6v5_mba_load()
1218 q6v5_regulator_disable(qproc, qproc->active_regs, in q6v5_mba_load()
1219 qproc->active_reg_count); in q6v5_mba_load()
1221 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in q6v5_mba_load()
1222 qproc->proxy_clk_count); in q6v5_mba_load()
1224 q6v5_regulator_disable(qproc, qproc->proxy_regs, in q6v5_mba_load()
1225 qproc->proxy_reg_count); in q6v5_mba_load()
1227 q6v5_regulator_disable(qproc, qproc->fallback_proxy_regs, in q6v5_mba_load()
1228 qproc->fallback_proxy_reg_count); in q6v5_mba_load()
1230 q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_mba_load()
1232 qcom_q6v5_unprepare(&qproc->q6v5); in q6v5_mba_load()
1242 qproc->dump_mba_loaded = false; in q6v5_mba_reclaim()
1243 qproc->dp_size = 0; in q6v5_mba_reclaim()
1245 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6); in q6v5_mba_reclaim()
1246 if (qproc->has_vq6) in q6v5_mba_reclaim()
1247 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_vq6); in q6v5_mba_reclaim()
1248 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem); in q6v5_mba_reclaim()
1249 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc); in q6v5_mba_reclaim()
1250 if (qproc->version == MSS_MSM8996) { in q6v5_mba_reclaim()
1252 * To avoid high MX current during LPASS/MSS restart. in q6v5_mba_reclaim()
1254 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5_mba_reclaim()
1257 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5_mba_reclaim()
1260 if (qproc->has_ext_cntl_regs) { in q6v5_mba_reclaim()
1261 regmap_write(qproc->conn_map, qproc->rscc_disable, 1); in q6v5_mba_reclaim()
1263 ret = regmap_read_poll_timeout(qproc->halt_map, qproc->axim1_clk_off, val, in q6v5_mba_reclaim()
1266 dev_err(qproc->dev, "failed to enable axim1 clock\n"); in q6v5_mba_reclaim()
1268 ret = regmap_read_poll_timeout(qproc->halt_map, qproc->crypto_clk_off, val, in q6v5_mba_reclaim()
1271 dev_err(qproc->dev, "failed to enable crypto clock\n"); in q6v5_mba_reclaim()
1274 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_mdm); in q6v5_mba_reclaim()
1275 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_cx); in q6v5_mba_reclaim()
1276 q6v5proc_disable_qchannel(qproc, qproc->halt_map, qproc->qaccept_axi); in q6v5_mba_reclaim()
1280 q6v5_clk_disable(qproc->dev, qproc->reset_clks, in q6v5_mba_reclaim()
1281 qproc->reset_clk_count); in q6v5_mba_reclaim()
1282 q6v5_clk_disable(qproc->dev, qproc->active_clks, in q6v5_mba_reclaim()
1283 qproc->active_clk_count); in q6v5_mba_reclaim()
1284 q6v5_regulator_disable(qproc, qproc->active_regs, in q6v5_mba_reclaim()
1285 qproc->active_reg_count); in q6v5_mba_reclaim()
1290 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, false, in q6v5_mba_reclaim()
1291 qproc->mba_phys, in q6v5_mba_reclaim()
1292 qproc->mba_size); in q6v5_mba_reclaim()
1295 ret = qcom_q6v5_unprepare(&qproc->q6v5); in q6v5_mba_reclaim()
1297 q6v5_pds_disable(qproc, qproc->proxy_pds, in q6v5_mba_reclaim()
1298 qproc->proxy_pd_count); in q6v5_mba_reclaim()
1299 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in q6v5_mba_reclaim()
1300 qproc->proxy_clk_count); in q6v5_mba_reclaim()
1301 q6v5_regulator_disable(qproc, qproc->fallback_proxy_regs, in q6v5_mba_reclaim()
1302 qproc->fallback_proxy_reg_count); in q6v5_mba_reclaim()
1303 q6v5_regulator_disable(qproc, qproc->proxy_regs, in q6v5_mba_reclaim()
1304 qproc->proxy_reg_count); in q6v5_mba_reclaim()
1310 struct q6v5 *qproc = rproc->priv; in q6v5_reload_mba()
1314 ret = request_firmware(&fw, rproc->firmware, qproc->dev); in q6v5_reload_mba()
1346 fw_name_len = strlen(qproc->hexagon_mdt_image); in q6v5_mpss_load()
1348 return -EINVAL; in q6v5_mpss_load()
1350 fw_name = kstrdup(qproc->hexagon_mdt_image, GFP_KERNEL); in q6v5_mpss_load()
1352 return -ENOMEM; in q6v5_mpss_load()
1354 ret = request_firmware(&fw, fw_name, qproc->dev); in q6v5_mpss_load()
1356 dev_err(qproc->dev, "unable to load %s\n", fw_name); in q6v5_mpss_load()
1361 writel(0, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1363 ret = q6v5_mpss_init_image(qproc, fw, qproc->hexagon_mdt_image); in q6v5_mpss_load()
1367 ehdr = (struct elf32_hdr *)fw->data; in q6v5_mpss_load()
1370 for (i = 0; i < ehdr->e_phnum; i++) { in q6v5_mpss_load()
1376 if (phdr->p_flags & QCOM_MDT_RELOCATABLE) in q6v5_mpss_load()
1379 if (phdr->p_paddr < min_addr) in q6v5_mpss_load()
1380 min_addr = phdr->p_paddr; in q6v5_mpss_load()
1382 if (phdr->p_paddr + phdr->p_memsz > max_addr) in q6v5_mpss_load()
1383 max_addr = ALIGN(phdr->p_paddr + phdr->p_memsz, SZ_4K); in q6v5_mpss_load()
1386 if (qproc->version == MSS_MSM8953) { in q6v5_mpss_load()
1387 ret = qcom_scm_pas_mem_setup(MPSS_PAS_ID, qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1389 dev_err(qproc->dev, in q6v5_mpss_load()
1399 q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, true, false, in q6v5_mpss_load()
1400 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1403 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, true, true, in q6v5_mpss_load()
1404 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1406 dev_err(qproc->dev, in q6v5_mpss_load()
1408 ret = -EAGAIN; in q6v5_mpss_load()
1412 mpss_reloc = relocate ? min_addr : qproc->mpss_phys; in q6v5_mpss_load()
1413 qproc->mpss_reloc = mpss_reloc; in q6v5_mpss_load()
1415 for (i = 0; i < ehdr->e_phnum; i++) { in q6v5_mpss_load()
1421 offset = phdr->p_paddr - mpss_reloc; in q6v5_mpss_load()
1422 if (offset < 0 || offset + phdr->p_memsz > qproc->mpss_size) { in q6v5_mpss_load()
1423 dev_err(qproc->dev, "segment outside memory range\n"); in q6v5_mpss_load()
1424 ret = -EINVAL; in q6v5_mpss_load()
1428 if (phdr->p_filesz > phdr->p_memsz) { in q6v5_mpss_load()
1429 dev_err(qproc->dev, in q6v5_mpss_load()
1432 ret = -EINVAL; in q6v5_mpss_load()
1436 ptr = memremap(qproc->mpss_phys + offset, phdr->p_memsz, MEMREMAP_WC); in q6v5_mpss_load()
1438 dev_err(qproc->dev, in q6v5_mpss_load()
1439 "unable to map memory region: %pa+%zx-%x\n", in q6v5_mpss_load()
1440 &qproc->mpss_phys, offset, phdr->p_memsz); in q6v5_mpss_load()
1444 if (phdr->p_filesz && phdr->p_offset < fw->size) { in q6v5_mpss_load()
1445 /* Firmware is large enough to be non-split */ in q6v5_mpss_load()
1446 if (phdr->p_offset + phdr->p_filesz > fw->size) { in q6v5_mpss_load()
1447 dev_err(qproc->dev, in q6v5_mpss_load()
1450 ret = -EINVAL; in q6v5_mpss_load()
1455 memcpy(ptr, fw->data + phdr->p_offset, phdr->p_filesz); in q6v5_mpss_load()
1456 } else if (phdr->p_filesz) { in q6v5_mpss_load()
1458 sprintf(fw_name + fw_name_len - 3, "b%02d", i); in q6v5_mpss_load()
1459 ret = request_firmware_into_buf(&seg_fw, fw_name, qproc->dev, in q6v5_mpss_load()
1460 ptr, phdr->p_filesz); in q6v5_mpss_load()
1462 dev_err(qproc->dev, "failed to load %s\n", fw_name); in q6v5_mpss_load()
1467 if (seg_fw->size != phdr->p_filesz) { in q6v5_mpss_load()
1468 dev_err(qproc->dev, in q6v5_mpss_load()
1471 ret = -EINVAL; in q6v5_mpss_load()
1480 if (phdr->p_memsz > phdr->p_filesz) { in q6v5_mpss_load()
1481 memset(ptr + phdr->p_filesz, 0, in q6v5_mpss_load()
1482 phdr->p_memsz - phdr->p_filesz); in q6v5_mpss_load()
1485 size += phdr->p_memsz; in q6v5_mpss_load()
1487 code_length = readl(qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1489 boot_addr = relocate ? qproc->mpss_phys : min_addr; in q6v5_mpss_load()
1490 writel(boot_addr, qproc->rmb_base + RMB_PMI_CODE_START_REG); in q6v5_mpss_load()
1491 writel(RMB_CMD_LOAD_READY, qproc->rmb_base + RMB_MBA_COMMAND_REG); in q6v5_mpss_load()
1493 writel(size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1495 ret = readl(qproc->rmb_base + RMB_MBA_STATUS_REG); in q6v5_mpss_load()
1497 dev_err(qproc->dev, "MPSS authentication failed: %d\n", in q6v5_mpss_load()
1504 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, false, true, in q6v5_mpss_load()
1505 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1507 dev_err(qproc->dev, in q6v5_mpss_load()
1509 ret = -EAGAIN; in q6v5_mpss_load()
1514 if (ret == -ETIMEDOUT) in q6v5_mpss_load()
1515 dev_err(qproc->dev, "MPSS authentication timed out\n"); in q6v5_mpss_load()
1517 dev_err(qproc->dev, "MPSS authentication failed: %d\n", ret); in q6v5_mpss_load()
1519 qcom_pil_info_store("modem", qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1534 struct q6v5 *qproc = rproc->priv; in qcom_q6v5_dump_segment()
1535 int offset = segment->da - qproc->mpss_reloc; in qcom_q6v5_dump_segment()
1539 if (!qproc->dump_mba_loaded) { in qcom_q6v5_dump_segment()
1543 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, in qcom_q6v5_dump_segment()
1545 qproc->mpss_phys, in qcom_q6v5_dump_segment()
1546 qproc->mpss_size); in qcom_q6v5_dump_segment()
1551 ptr = memremap(qproc->mpss_phys + offset + cp_offset, size, MEMREMAP_WC); in qcom_q6v5_dump_segment()
1560 qproc->current_dump_size += size; in qcom_q6v5_dump_segment()
1563 if (qproc->current_dump_size == qproc->total_dump_size) { in qcom_q6v5_dump_segment()
1564 if (qproc->dump_mba_loaded) { in qcom_q6v5_dump_segment()
1566 q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, in qcom_q6v5_dump_segment()
1568 qproc->mpss_phys, in qcom_q6v5_dump_segment()
1569 qproc->mpss_size); in qcom_q6v5_dump_segment()
1577 struct q6v5 *qproc = rproc->priv; in q6v5_start()
1585 dev_info(qproc->dev, "MBA booted with%s debug policy, loading mpss\n", in q6v5_start()
1586 qproc->dp_size ? "" : "out"); in q6v5_start()
1592 ret = qcom_q6v5_wait_for_start(&qproc->q6v5, msecs_to_jiffies(5000)); in q6v5_start()
1593 if (ret == -ETIMEDOUT) { in q6v5_start()
1594 dev_err(qproc->dev, "start timed out\n"); in q6v5_start()
1598 xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, in q6v5_start()
1599 false, qproc->mba_phys, in q6v5_start()
1600 qproc->mba_size); in q6v5_start()
1602 dev_err(qproc->dev, in q6v5_start()
1606 qproc->current_dump_size = 0; in q6v5_start()
1619 struct q6v5 *qproc = rproc->priv; in q6v5_stop()
1622 ret = qcom_q6v5_request_stop(&qproc->q6v5, qproc->sysmon); in q6v5_stop()
1623 if (ret == -ETIMEDOUT) in q6v5_stop()
1624 dev_err(qproc->dev, "timed out on wait\n"); in q6v5_stop()
1638 struct q6v5 *qproc = rproc->priv; in qcom_q6v5_register_dump_segments()
1642 ret = request_firmware(&fw, qproc->hexagon_mdt_image, qproc->dev); in qcom_q6v5_register_dump_segments()
1644 dev_err(qproc->dev, "unable to load %s\n", in qcom_q6v5_register_dump_segments()
1645 qproc->hexagon_mdt_image); in qcom_q6v5_register_dump_segments()
1651 ehdr = (struct elf32_hdr *)fw->data; in qcom_q6v5_register_dump_segments()
1653 qproc->total_dump_size = 0; in qcom_q6v5_register_dump_segments()
1655 for (i = 0; i < ehdr->e_phnum; i++) { in qcom_q6v5_register_dump_segments()
1661 ret = rproc_coredump_add_custom_segment(rproc, phdr->p_paddr, in qcom_q6v5_register_dump_segments()
1662 phdr->p_memsz, in qcom_q6v5_register_dump_segments()
1668 qproc->total_dump_size += phdr->p_memsz; in qcom_q6v5_register_dump_segments()
1677 struct q6v5 *qproc = rproc->priv; in q6v5_panic()
1679 return qcom_q6v5_panic(&qproc->q6v5); in q6v5_panic()
1694 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in qcom_msa_handover()
1695 qproc->proxy_clk_count); in qcom_msa_handover()
1696 q6v5_regulator_disable(qproc, qproc->proxy_regs, in qcom_msa_handover()
1697 qproc->proxy_reg_count); in qcom_msa_handover()
1698 q6v5_regulator_disable(qproc, qproc->fallback_proxy_regs, in qcom_msa_handover()
1699 qproc->fallback_proxy_reg_count); in qcom_msa_handover()
1700 q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in qcom_msa_handover()
1709 qproc->reg_base = devm_platform_ioremap_resource_byname(pdev, "qdsp6"); in q6v5_init_mem()
1710 if (IS_ERR(qproc->reg_base)) in q6v5_init_mem()
1711 return PTR_ERR(qproc->reg_base); in q6v5_init_mem()
1713 qproc->rmb_base = devm_platform_ioremap_resource_byname(pdev, "rmb"); in q6v5_init_mem()
1714 if (IS_ERR(qproc->rmb_base)) in q6v5_init_mem()
1715 return PTR_ERR(qproc->rmb_base); in q6v5_init_mem()
1717 if (qproc->has_vq6) in q6v5_init_mem()
1720 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1721 "qcom,halt-regs", halt_cell_cnt, 0, &args); in q6v5_init_mem()
1723 dev_err(&pdev->dev, "failed to parse qcom,halt-regs\n"); in q6v5_init_mem()
1724 return -EINVAL; in q6v5_init_mem()
1727 qproc->halt_map = syscon_node_to_regmap(args.np); in q6v5_init_mem()
1729 if (IS_ERR(qproc->halt_map)) in q6v5_init_mem()
1730 return PTR_ERR(qproc->halt_map); in q6v5_init_mem()
1732 qproc->halt_q6 = args.args[0]; in q6v5_init_mem()
1733 qproc->halt_modem = args.args[1]; in q6v5_init_mem()
1734 qproc->halt_nc = args.args[2]; in q6v5_init_mem()
1736 if (qproc->has_vq6) in q6v5_init_mem()
1737 qproc->halt_vq6 = args.args[3]; in q6v5_init_mem()
1739 if (qproc->has_qaccept_regs) { in q6v5_init_mem()
1740 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1741 "qcom,qaccept-regs", in q6v5_init_mem()
1744 dev_err(&pdev->dev, "failed to parse qaccept-regs\n"); in q6v5_init_mem()
1745 return -EINVAL; in q6v5_init_mem()
1748 qproc->qaccept_mdm = args.args[0]; in q6v5_init_mem()
1749 qproc->qaccept_cx = args.args[1]; in q6v5_init_mem()
1750 qproc->qaccept_axi = args.args[2]; in q6v5_init_mem()
1753 if (qproc->has_ext_cntl_regs) { in q6v5_init_mem()
1754 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1755 "qcom,ext-regs", in q6v5_init_mem()
1758 dev_err(&pdev->dev, "failed to parse ext-regs index 0\n"); in q6v5_init_mem()
1759 return -EINVAL; in q6v5_init_mem()
1762 qproc->conn_map = syscon_node_to_regmap(args.np); in q6v5_init_mem()
1764 if (IS_ERR(qproc->conn_map)) in q6v5_init_mem()
1765 return PTR_ERR(qproc->conn_map); in q6v5_init_mem()
1767 qproc->force_clk_on = args.args[0]; in q6v5_init_mem()
1768 qproc->rscc_disable = args.args[1]; in q6v5_init_mem()
1770 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1771 "qcom,ext-regs", in q6v5_init_mem()
1774 dev_err(&pdev->dev, "failed to parse ext-regs index 1\n"); in q6v5_init_mem()
1775 return -EINVAL; in q6v5_init_mem()
1778 qproc->axim1_clk_off = args.args[0]; in q6v5_init_mem()
1779 qproc->crypto_clk_off = args.args[1]; in q6v5_init_mem()
1782 if (qproc->has_spare_reg) { in q6v5_init_mem()
1783 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1784 "qcom,spare-regs", in q6v5_init_mem()
1787 dev_err(&pdev->dev, "failed to parse spare-regs\n"); in q6v5_init_mem()
1788 return -EINVAL; in q6v5_init_mem()
1791 qproc->conn_map = syscon_node_to_regmap(args.np); in q6v5_init_mem()
1793 if (IS_ERR(qproc->conn_map)) in q6v5_init_mem()
1794 return PTR_ERR(qproc->conn_map); in q6v5_init_mem()
1796 qproc->conn_box = args.args[0]; in q6v5_init_mem()
1835 if (num_pds == 1 && dev->pm_domain) { in q6v5_pds_attach()
1844 ret = PTR_ERR(devs[i]) ? : -ENODATA; in q6v5_pds_attach()
1852 for (i--; i >= 0; i--) in q6v5_pds_attach()
1861 struct device *dev = qproc->dev; in q6v5_pds_detach()
1865 if (pd_count == 1 && dev->pm_domain) { in q6v5_pds_detach()
1876 qproc->mss_restart = devm_reset_control_get_exclusive(qproc->dev, in q6v5_init_reset()
1878 if (IS_ERR(qproc->mss_restart)) { in q6v5_init_reset()
1879 dev_err(qproc->dev, "failed to acquire mss restart\n"); in q6v5_init_reset()
1880 return PTR_ERR(qproc->mss_restart); in q6v5_init_reset()
1883 if (qproc->has_alt_reset || qproc->has_spare_reg || qproc->has_ext_cntl_regs) { in q6v5_init_reset()
1884 qproc->pdc_reset = devm_reset_control_get_exclusive(qproc->dev, in q6v5_init_reset()
1886 if (IS_ERR(qproc->pdc_reset)) { in q6v5_init_reset()
1887 dev_err(qproc->dev, "failed to acquire pdc reset\n"); in q6v5_init_reset()
1888 return PTR_ERR(qproc->pdc_reset); in q6v5_init_reset()
1902 * In the absence of mba/mpss sub-child, extract the mba and mpss in q6v5_alloc_memory_region()
1903 * reserved memory regions from device's memory-region property. in q6v5_alloc_memory_region()
1905 child = of_get_child_by_name(qproc->dev->of_node, "mba"); in q6v5_alloc_memory_region()
1907 node = of_parse_phandle(qproc->dev->of_node, in q6v5_alloc_memory_region()
1908 "memory-region", 0); in q6v5_alloc_memory_region()
1910 node = of_parse_phandle(child, "memory-region", 0); in q6v5_alloc_memory_region()
1915 dev_err(qproc->dev, "no mba memory-region specified\n"); in q6v5_alloc_memory_region()
1916 return -EINVAL; in q6v5_alloc_memory_region()
1922 dev_err(qproc->dev, "unable to resolve mba region\n"); in q6v5_alloc_memory_region()
1923 return -EINVAL; in q6v5_alloc_memory_region()
1926 qproc->mba_phys = rmem->base; in q6v5_alloc_memory_region()
1927 qproc->mba_size = rmem->size; in q6v5_alloc_memory_region()
1930 node = of_parse_phandle(qproc->dev->of_node, in q6v5_alloc_memory_region()
1931 "memory-region", 1); in q6v5_alloc_memory_region()
1933 child = of_get_child_by_name(qproc->dev->of_node, "mpss"); in q6v5_alloc_memory_region()
1934 node = of_parse_phandle(child, "memory-region", 0); in q6v5_alloc_memory_region()
1939 dev_err(qproc->dev, "no mpss memory-region specified\n"); in q6v5_alloc_memory_region()
1940 return -EINVAL; in q6v5_alloc_memory_region()
1946 dev_err(qproc->dev, "unable to resolve mpss region\n"); in q6v5_alloc_memory_region()
1947 return -EINVAL; in q6v5_alloc_memory_region()
1950 qproc->mpss_phys = qproc->mpss_reloc = rmem->base; in q6v5_alloc_memory_region()
1951 qproc->mpss_size = rmem->size; in q6v5_alloc_memory_region()
1954 node = of_parse_phandle(qproc->dev->of_node, "memory-region", 2); in q6v5_alloc_memory_region()
1956 child = of_get_child_by_name(qproc->dev->of_node, "metadata"); in q6v5_alloc_memory_region()
1957 node = of_parse_phandle(child, "memory-region", 0); in q6v5_alloc_memory_region()
1966 dev_err(qproc->dev, "unable to resolve metadata region\n"); in q6v5_alloc_memory_region()
1967 return -EINVAL; in q6v5_alloc_memory_region()
1970 qproc->mdata_phys = rmem->base; in q6v5_alloc_memory_region()
1971 qproc->mdata_size = rmem->size; in q6v5_alloc_memory_region()
1985 desc = of_device_get_match_data(&pdev->dev); in q6v5_probe()
1987 return -EINVAL; in q6v5_probe()
1989 if (desc->need_mem_protection && !qcom_scm_is_available()) in q6v5_probe()
1990 return -EPROBE_DEFER; in q6v5_probe()
1992 mba_image = desc->hexagon_mba_image; in q6v5_probe()
1993 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", in q6v5_probe()
1995 if (ret < 0 && ret != -EINVAL) { in q6v5_probe()
1996 dev_err(&pdev->dev, "unable to read mba firmware-name\n"); in q6v5_probe()
2000 rproc = devm_rproc_alloc(&pdev->dev, pdev->name, &q6v5_ops, in q6v5_probe()
2003 dev_err(&pdev->dev, "failed to allocate rproc\n"); in q6v5_probe()
2004 return -ENOMEM; in q6v5_probe()
2007 rproc->auto_boot = false; in q6v5_probe()
2010 qproc = rproc->priv; in q6v5_probe()
2011 qproc->dev = &pdev->dev; in q6v5_probe()
2012 qproc->rproc = rproc; in q6v5_probe()
2013 qproc->hexagon_mdt_image = "modem.mdt"; in q6v5_probe()
2014 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", in q6v5_probe()
2015 1, &qproc->hexagon_mdt_image); in q6v5_probe()
2016 if (ret < 0 && ret != -EINVAL) { in q6v5_probe()
2017 dev_err(&pdev->dev, "unable to read mpss firmware-name\n"); in q6v5_probe()
2023 qproc->has_qaccept_regs = desc->has_qaccept_regs; in q6v5_probe()
2024 qproc->has_ext_cntl_regs = desc->has_ext_cntl_regs; in q6v5_probe()
2025 qproc->has_vq6 = desc->has_vq6; in q6v5_probe()
2026 qproc->has_spare_reg = desc->has_spare_reg; in q6v5_probe()
2035 ret = q6v5_init_clocks(&pdev->dev, qproc->proxy_clks, in q6v5_probe()
2036 desc->proxy_clk_names); in q6v5_probe()
2039 qproc->proxy_clk_count = ret; in q6v5_probe()
2041 ret = q6v5_init_clocks(&pdev->dev, qproc->reset_clks, in q6v5_probe()
2042 desc->reset_clk_names); in q6v5_probe()
2045 qproc->reset_clk_count = ret; in q6v5_probe()
2047 ret = q6v5_init_clocks(&pdev->dev, qproc->active_clks, in q6v5_probe()
2048 desc->active_clk_names); in q6v5_probe()
2051 qproc->active_clk_count = ret; in q6v5_probe()
2053 ret = q6v5_regulator_init(&pdev->dev, qproc->proxy_regs, in q6v5_probe()
2054 desc->proxy_supply); in q6v5_probe()
2057 qproc->proxy_reg_count = ret; in q6v5_probe()
2059 ret = q6v5_regulator_init(&pdev->dev, qproc->active_regs, in q6v5_probe()
2060 desc->active_supply); in q6v5_probe()
2063 qproc->active_reg_count = ret; in q6v5_probe()
2065 ret = q6v5_pds_attach(&pdev->dev, qproc->proxy_pds, in q6v5_probe()
2066 desc->proxy_pd_names); in q6v5_probe()
2068 if (ret == -ENODATA && desc->fallback_proxy_supply) { in q6v5_probe()
2069 ret = q6v5_regulator_init(&pdev->dev, in q6v5_probe()
2070 qproc->fallback_proxy_regs, in q6v5_probe()
2071 desc->fallback_proxy_supply); in q6v5_probe()
2074 qproc->fallback_proxy_reg_count = ret; in q6v5_probe()
2076 dev_err(&pdev->dev, "Failed to init power domains\n"); in q6v5_probe()
2079 qproc->proxy_pd_count = ret; in q6v5_probe()
2082 qproc->has_alt_reset = desc->has_alt_reset; in q6v5_probe()
2087 qproc->version = desc->version; in q6v5_probe()
2088 qproc->need_mem_protection = desc->need_mem_protection; in q6v5_probe()
2089 qproc->has_mba_logs = desc->has_mba_logs; in q6v5_probe()
2091 ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, "modem", in q6v5_probe()
2096 qproc->mpss_perm = BIT(QCOM_SCM_VMID_HLOS); in q6v5_probe()
2097 qproc->mba_perm = BIT(QCOM_SCM_VMID_HLOS); in q6v5_probe()
2098 qcom_add_glink_subdev(rproc, &qproc->glink_subdev, "mpss"); in q6v5_probe()
2099 qcom_add_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_probe()
2100 qcom_add_pdm_subdev(rproc, &qproc->pdm_subdev); in q6v5_probe()
2101 qcom_add_ssr_subdev(rproc, &qproc->ssr_subdev, "mpss"); in q6v5_probe()
2102 qproc->sysmon = qcom_add_sysmon_subdev(rproc, "modem", 0x12); in q6v5_probe()
2103 if (IS_ERR(qproc->sysmon)) { in q6v5_probe()
2104 ret = PTR_ERR(qproc->sysmon); in q6v5_probe()
2112 node = of_get_compatible_child(pdev->dev.of_node, "qcom,bam-dmux"); in q6v5_probe()
2113 qproc->bam_dmux = of_platform_device_create(node, NULL, &pdev->dev); in q6v5_probe()
2119 qcom_remove_sysmon_subdev(qproc->sysmon); in q6v5_probe()
2121 qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); in q6v5_probe()
2122 qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_probe()
2123 qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); in q6v5_probe()
2125 q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_probe()
2133 struct rproc *rproc = qproc->rproc; in q6v5_remove()
2135 if (qproc->bam_dmux) in q6v5_remove()
2136 of_platform_device_destroy(&qproc->bam_dmux->dev, NULL); in q6v5_remove()
2139 qcom_q6v5_deinit(&qproc->q6v5); in q6v5_remove()
2140 qcom_remove_sysmon_subdev(qproc->sysmon); in q6v5_remove()
2141 qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); in q6v5_remove()
2142 qcom_remove_pdm_subdev(rproc, &qproc->pdm_subdev); in q6v5_remove()
2143 qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_remove()
2144 qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); in q6v5_remove()
2146 q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_remove()
2167 "cx",
2168 "mx",
2196 "cx",
2227 "cx",
2228 "mx",
2261 "cx",
2262 "mx",
2293 "cx",
2294 "mx",
2311 .supply = "pll",
2331 "mx",
2332 "cx",
2349 .supply = "pll",
2365 "mx",
2366 "cx",
2383 .supply = "pll",
2390 .supply = "mx",
2394 .supply = "cx",
2410 "mx",
2411 "cx",
2428 .supply = "pll",
2444 "cx",
2445 "mx",
2463 .supply = "pll",
2467 .supply = "mx",
2474 .supply = "cx",
2481 .supply = "mss",
2498 "cx",
2512 { .compatible = "qcom,q6v5-pil", .data = &msm8916_mss},
2513 { .compatible = "qcom,msm8909-mss-pil", .data = &msm8909_mss},
2514 { .compatible = "qcom,msm8916-mss-pil", .data = &msm8916_mss},
2515 { .compatible = "qcom,msm8953-mss-pil", .data = &msm8953_mss},
2516 { .compatible = "qcom,msm8974-mss-pil", .data = &msm8974_mss},
2517 { .compatible = "qcom,msm8996-mss-pil", .data = &msm8996_mss},
2518 { .compatible = "qcom,msm8998-mss-pil", .data = &msm8998_mss},
2519 { .compatible = "qcom,sc7180-mss-pil", .data = &sc7180_mss},
2520 { .compatible = "qcom,sc7280-mss-pil", .data = &sc7280_mss},
2521 { .compatible = "qcom,sdm660-mss-pil", .data = &sdm660_mss},
2522 { .compatible = "qcom,sdm845-mss-pil", .data = &sdm845_mss},
2531 .name = "qcom-q6v5-mss",
2537 MODULE_DESCRIPTION("Qualcomm Self-authenticating modem remoteproc driver");