Lines Matching +full:0 +full:xe8

21 #define ACT8945A_SYS_MODE	0x00
22 #define ACT8945A_SYS_CTRL	0x01
23 #define ACT8945A_SYS_UNLK_REGS	0x0b
24 #define ACT8945A_DCDC1_VSET1	0x20
25 #define ACT8945A_DCDC1_VSET2	0x21
26 #define ACT8945A_DCDC1_CTRL	0x22
27 #define ACT8945A_DCDC1_SUS	0x24
28 #define ACT8945A_DCDC2_VSET1	0x30
29 #define ACT8945A_DCDC2_VSET2	0x31
30 #define ACT8945A_DCDC2_CTRL	0x32
31 #define ACT8945A_DCDC2_SUS	0x34
32 #define ACT8945A_DCDC3_VSET1	0x40
33 #define ACT8945A_DCDC3_VSET2	0x41
34 #define ACT8945A_DCDC3_CTRL	0x42
35 #define ACT8945A_DCDC3_SUS	0x44
36 #define ACT8945A_LDO1_VSET	0x50
37 #define ACT8945A_LDO1_CTRL	0x51
38 #define ACT8945A_LDO1_SUS	0x52
39 #define ACT8945A_LDO2_VSET	0x54
40 #define ACT8945A_LDO2_CTRL	0x55
41 #define ACT8945A_LDO2_SUS	0x56
42 #define ACT8945A_LDO3_VSET	0x60
43 #define ACT8945A_LDO3_CTRL	0x61
44 #define ACT8945A_LDO3_SUS	0x62
45 #define ACT8945A_LDO4_VSET	0x64
46 #define ACT8945A_LDO4_CTRL	0x65
47 #define ACT8945A_LDO4_SUS	0x66
52 #define ACT8945A_ENA		0x80	/* ON - [7] */
53 #define ACT8945A_VSEL_MASK	0x3F	/* VSET - [5:0] */
77 	REGULATOR_LINEAR_RANGE(600000, 0, 23, 25000),
91 		val = 0xa8;  in act8945a_set_suspend_state()
95 		val = 0xa8;  in act8945a_set_suspend_state()
99 		val = 0xa8;  in act8945a_set_suspend_state()
103 		val = 0xe8;  in act8945a_set_suspend_state()
107 		val = 0xe8;  in act8945a_set_suspend_state()
111 		val = 0xe8;  in act8945a_set_suspend_state()
115 		val = 0xe8;  in act8945a_set_suspend_state()
159 	int reg, ret, val = 0;  in act8945a_set_mode()
206 	return 0;  in act8945a_set_mode()
308 	for (i = 0; i < num_regulators; i++) {  in act8945a_pmic_probe()
322 	return regmap_write(act8945a->regmap, ACT8945A_SYS_UNLK_REGS, 0xef);  in act8945a_pmic_probe()
333 	return regmap_write(act8945a->regmap, ACT8945A_SYS_CTRL, 0x42);  in act8945a_suspend()
345 	regmap_write(act8945a->regmap, ACT8945A_SYS_CTRL, 0x0);  in act8945a_pmic_shutdown()