27 #define ACT8600_SYS_MODE	0x00
28 #define ACT8600_SYS_CTRL	0x01
29 #define ACT8600_DCDC1_VSET	0x10
30 #define ACT8600_DCDC1_CTRL	0x12
31 #define ACT8600_DCDC2_VSET	0x20
32 #define ACT8600_DCDC2_CTRL	0x22
33 #define ACT8600_DCDC3_VSET	0x30
34 #define ACT8600_DCDC3_CTRL	0x32
35 #define ACT8600_SUDCDC4_VSET	0x40
36 #define ACT8600_SUDCDC4_CTRL	0x41
37 #define ACT8600_LDO5_VSET	0x50
38 #define ACT8600_LDO5_CTRL	0x51
39 #define ACT8600_LDO6_VSET	0x60
40 #define ACT8600_LDO6_CTRL	0x61
41 #define ACT8600_LDO7_VSET	0x70
42 #define ACT8600_LDO7_CTRL	0x71
43 #define ACT8600_LDO8_VSET	0x80
44 #define ACT8600_LDO8_CTRL	0x81
45 #define ACT8600_LDO910_CTRL	0x91
46 #define ACT8600_APCH0		0xA1
47 #define ACT8600_APCH1		0xA8
48 #define ACT8600_APCH2		0xA9
49 #define ACT8600_APCH_STAT	0xAA
50 #define ACT8600_OTG0		0xB0
51 #define ACT8600_OTG1		0xB2
56 #define	ACT8846_SYS0		0x00
57 #define	ACT8846_SYS1		0x01
58 #define	ACT8846_REG1_VSET	0x10
59 #define	ACT8846_REG1_CTRL	0x12
60 #define	ACT8846_REG2_VSET0	0x20
61 #define	ACT8846_REG2_VSET1	0x21
62 #define	ACT8846_REG2_CTRL	0x22
63 #define	ACT8846_REG3_VSET0	0x30
64 #define	ACT8846_REG3_VSET1	0x31
65 #define	ACT8846_REG3_CTRL	0x32
66 #define	ACT8846_REG4_VSET0	0x40
67 #define	ACT8846_REG4_VSET1	0x41
68 #define	ACT8846_REG4_CTRL	0x42
69 #define	ACT8846_REG5_VSET	0x50
70 #define	ACT8846_REG5_CTRL	0x51
71 #define	ACT8846_REG6_VSET	0x58
72 #define	ACT8846_REG6_CTRL	0x59
73 #define	ACT8846_REG7_VSET	0x60
74 #define	ACT8846_REG7_CTRL	0x61
75 #define	ACT8846_REG8_VSET	0x68
76 #define	ACT8846_REG8_CTRL	0x69
77 #define	ACT8846_REG9_VSET	0x70
78 #define	ACT8846_REG9_CTRL	0x71
79 #define	ACT8846_REG10_VSET	0x80
80 #define	ACT8846_REG10_CTRL	0x81
81 #define	ACT8846_REG11_VSET	0x90
82 #define	ACT8846_REG11_CTRL	0x91
83 #define	ACT8846_REG12_VSET	0xa0
84 #define	ACT8846_REG12_CTRL	0xa1
85 #define	ACT8846_REG13_CTRL	0xb1
86 #define	ACT8846_GLB_OFF_CTRL	0xc3
87 #define	ACT8846_OFF_SYSMASK	0x18
92 #define	ACT8865_SYS_MODE	0x00
93 #define	ACT8865_SYS_CTRL	0x01
94 #define	ACT8865_SYS_UNLK_REGS	0x0b
95 #define	ACT8865_DCDC1_VSET1	0x20
96 #define	ACT8865_DCDC1_VSET2	0x21
97 #define	ACT8865_DCDC1_CTRL	0x22
98 #define	ACT8865_DCDC1_SUS	0x24
99 #define	ACT8865_DCDC2_VSET1	0x30
100 #define	ACT8865_DCDC2_VSET2	0x31
101 #define	ACT8865_DCDC2_CTRL	0x32
102 #define	ACT8865_DCDC2_SUS	0x34
103 #define	ACT8865_DCDC3_VSET1	0x40
104 #define	ACT8865_DCDC3_VSET2	0x41
105 #define	ACT8865_DCDC3_CTRL	0x42
106 #define	ACT8865_DCDC3_SUS	0x44
107 #define	ACT8865_LDO1_VSET	0x50
108 #define	ACT8865_LDO1_CTRL	0x51
109 #define	ACT8865_LDO1_SUS	0x52
110 #define	ACT8865_LDO2_VSET	0x54
111 #define	ACT8865_LDO2_CTRL	0x55
112 #define	ACT8865_LDO2_SUS	0x56
113 #define	ACT8865_LDO3_VSET	0x60
114 #define	ACT8865_LDO3_CTRL	0x61
115 #define	ACT8865_LDO3_SUS	0x62
116 #define	ACT8865_LDO4_VSET	0x64
117 #define	ACT8865_LDO4_CTRL	0x65
118 #define	ACT8865_LDO4_SUS	0x66
119 #define	ACT8865_MSTROFF		0x20
124 #define	ACT8865_ENA		0x80	/* ON - [7] */
125 #define	ACT8865_DIS		0x40	/* DIS - [6] */
127 #define	ACT8865_VSEL_MASK	0x3F	/* VSET - [5:0] */
130 #define ACT8600_LDO10_ENA		0x40	/* ON - [6] */
131 #define ACT8600_SUDCDC_VSEL_MASK	0xFF	/* SUDCDC VSET - [7:0] */
151 	regmap_reg_range(0x00, 0x01),
152 	regmap_reg_range(0x10, 0x10),
153 	regmap_reg_range(0x12, 0x12),
154 	regmap_reg_range(0x20, 0x20),
155 	regmap_reg_range(0x22, 0x22),
156 	regmap_reg_range(0x30, 0x30),
157 	regmap_reg_range(0x32, 0x32),
158 	regmap_reg_range(0x40, 0x41),
159 	regmap_reg_range(0x50, 0x51),
160 	regmap_reg_range(0x60, 0x61),
161 	regmap_reg_range(0x70, 0x71),
162 	regmap_reg_range(0x80, 0x81),
163 	regmap_reg_range(0x91, 0x91),
164 	regmap_reg_range(0xA1, 0xA1),
165 	regmap_reg_range(0xA8, 0xAA),
166 	regmap_reg_range(0xB0, 0xB0),
167 	regmap_reg_range(0xB2, 0xB2),
168 	regmap_reg_range(0xC1, 0xC1),
172 	regmap_reg_range(0xAA, 0xAA),
173 	regmap_reg_range(0xC1, 0xC1),
177 	regmap_reg_range(0x00, 0x01),
178 	regmap_reg_range(0x12, 0x12),
179 	regmap_reg_range(0x22, 0x22),
180 	regmap_reg_range(0x32, 0x32),
181 	regmap_reg_range(0x41, 0x41),
182 	regmap_reg_range(0x51, 0x51),
183 	regmap_reg_range(0x61, 0x61),
184 	regmap_reg_range(0x71, 0x71),
185 	regmap_reg_range(0x81, 0x81),
186 	regmap_reg_range(0xA8, 0xA8),
187 	regmap_reg_range(0xAA, 0xAA),
188 	regmap_reg_range(0xB0, 0xB0),
189 	regmap_reg_range(0xC1, 0xC1),
212 	.max_register = 0xFF,
224 	REGULATOR_LINEAR_RANGE(600000, 0, 23, 25000),
230 	REGULATOR_LINEAR_RANGE(3000000, 0, 63, 0),
234 	REGULATOR_LINEAR_RANGE(41400000, 248, 255, 0),
245 		val = 0xa8;  in act8865_set_suspend_state()
249 		val = 0xa8;  in act8865_set_suspend_state()
253 		val = 0xa8;  in act8865_set_suspend_state()
257 		val = 0xe8;  in act8865_set_suspend_state()
261 		val = 0xe8;  in act8865_set_suspend_state()
265 		val = 0xe8;  in act8865_set_suspend_state()
269 		val = 0xe8;  in act8865_set_suspend_state()
313 	int reg, val = 0;  in act8865_set_mode()
362 	int reg, ret, val = 0;  in act8865_get_mode()
567 	for (i = 0; i < pdata->num_regulators; i++) {  in act8865_get_regulator_data()
592 	if (ret < 0)  in act8600_charger_get_status()
617 		if (ret < 0)  in act8600_charger_get_property()
626 	return 0;  in act8600_charger_get_property()
665 	int voltage_select = 0;  in act8865_pmic_probe()
726 		if (!pm_power_off && (off_reg > 0)) {  in act8865_pmic_probe()
737 	for (i = 0; i < num_regulators; i++) {  in act8865_pmic_probe()
765 		if (ret < 0) {  in act8865_pmic_probe()
775 	return type != ACT8865 ? 0 : regmap_write(act8865->regmap,  in act8865_pmic_probe()
776 						  ACT8865_SYS_UNLK_REGS, 0xef);  in act8865_pmic_probe()