65 	u32 offset = pin % PINS_PER_BANK * MUX_FIELD_WIDTH;  in sunxi_mux_reg()  local
77 	u32 offset = pin % PINS_PER_BANK * DATA_FIELD_WIDTH;  in sunxi_data_reg()  local
89 	u32 offset = pin % PINS_PER_BANK * pctl->dlevel_field_width;  in sunxi_dlevel_reg()  local
101 	u32 offset = pin % PINS_PER_BANK * PULL_FIELD_WIDTH;  in sunxi_pull_reg()  local
238 	u32 val;  in sunxi_pctrl_parse_bias_prop()  local
268 	u32 val;  in sunxi_pctrl_parse_drive_prop()  local
541 	u32 reg, shift, mask, val;  in sunxi_pconf_get()  local
607 		u32 arg, reg, shift, mask, val;  in sunxi_pconf_set()  local
684 	u32 val, reg;  in sunxi_pinctrl_set_io_bias_cfg()  local
816 			unsigned offset,  in sunxi_pmx_gpio_set_direction()
837 static int sunxi_pmx_request(struct pinctrl_dev *pctldev, unsigned offset)  in sunxi_pmx_request()
883 static int sunxi_pmx_free(struct pinctrl_dev *pctldev, unsigned offset)  in sunxi_pmx_free()
913 					unsigned offset)  in sunxi_pinctrl_gpio_direction_input()
921 static int sunxi_pinctrl_gpio_get(struct gpio_chip *chip, unsigned offset)  in sunxi_pinctrl_gpio_get()
927 	u32 reg, shift, mask, val;  in sunxi_pinctrl_gpio_get()  local
943 				unsigned offset, int value)  in sunxi_pinctrl_gpio_set()
946 	u32 reg, shift, mask, val;  in sunxi_pinctrl_gpio_set()  local
966 					unsigned offset, int value)  in sunxi_pinctrl_gpio_direction_output()
993 static int sunxi_pinctrl_gpio_to_irq(struct gpio_chip *chip, unsigned offset)  in sunxi_pinctrl_gpio_to_irq()
1111 	u32 val;  in sunxi_pinctrl_irq_mask()  local
1128 	u32 val;  in sunxi_pinctrl_irq_unmask()  local
1219 	unsigned long bank, reg, val;  in sunxi_pinctrl_irq_handler()  local