99 	struct jh7110_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev);  in jh7110_pin_dbg_show()  local
100 	const struct jh7110_pinctrl_soc_info *info = sfp->info;  in jh7110_pin_dbg_show()
104 	if (pin < sfp->gc.ngpio) {  in jh7110_pin_dbg_show()
107 		u32 dout = readl_relaxed(sfp->base + info->dout_reg_base + offset);  in jh7110_pin_dbg_show()
108 		u32 doen = readl_relaxed(sfp->base + info->doen_reg_base + offset);  in jh7110_pin_dbg_show()
109 		u32 gpi = readl_relaxed(sfp->base + info->gpi_reg_base + offset);  in jh7110_pin_dbg_show()
127 	struct jh7110_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev);  in jh7110_dt_node_to_map()  local
128 	struct device *dev = sfp->gc.parent;  in jh7110_dt_node_to_map()
152 	mutex_lock(&sfp->mutex);  in jh7110_dt_node_to_map()
230 	mutex_unlock(&sfp->mutex);  in jh7110_dt_node_to_map()
238 	mutex_unlock(&sfp->mutex);  in jh7110_dt_node_to_map()
251 void jh7110_set_gpiomux(struct jh7110_pinctrl *sfp, unsigned int pin,  in jh7110_set_gpiomux()  argument
254 	const struct jh7110_pinctrl_soc_info *info = sfp->info;  in jh7110_set_gpiomux()
266 	reg_dout = sfp->base + info->dout_reg_base + offset;  in jh7110_set_gpiomux()
267 	reg_doen = sfp->base + info->doen_reg_base + offset;  in jh7110_set_gpiomux()
274 		reg_din = sfp->base + info->gpi_reg_base + ioffset;  in jh7110_set_gpiomux()
281 	raw_spin_lock_irqsave(&sfp->lock, flags);  in jh7110_set_gpiomux()
290 	raw_spin_unlock_irqrestore(&sfp->lock, flags);  in jh7110_set_gpiomux()
297 	struct jh7110_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev);  in jh7110_set_mux()  local
298 	const struct jh7110_pinctrl_soc_info *info = sfp->info;  in jh7110_set_mux()
312 			info->jh7110_set_one_pin_mux(sfp,  in jh7110_set_mux()
349 static void jh7110_padcfg_rmw(struct jh7110_pinctrl *sfp,  in jh7110_padcfg_rmw()  argument
352 	const struct jh7110_pinctrl_soc_info *info = sfp->info;  in jh7110_padcfg_rmw()
360 	padcfg_base = info->jh7110_get_padcfg_base(sfp, pin);  in jh7110_padcfg_rmw()
364 	reg = sfp->base + padcfg_base + 4 * pin;  in jh7110_padcfg_rmw()
367 	raw_spin_lock_irqsave(&sfp->lock, flags);  in jh7110_padcfg_rmw()
370 	raw_spin_unlock_irqrestore(&sfp->lock, flags);  in jh7110_padcfg_rmw()
376 	struct jh7110_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev);  in jh7110_pinconf_get()  local
377 	const struct jh7110_pinctrl_soc_info *info = sfp->info;  in jh7110_pinconf_get()
386 	padcfg_base = info->jh7110_get_padcfg_base(sfp, pin);  in jh7110_pinconf_get()
390 	padcfg = readl_relaxed(sfp->base + padcfg_base + 4 * pin);  in jh7110_pinconf_get()
446 	struct jh7110_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev);  in jh7110_pinconf_group_set()  local
510 		jh7110_padcfg_rmw(sfp, group->grp.pins[i], mask, value);  in jh7110_pinconf_group_set()
519 	struct jh7110_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev);  in jh7110_pinconf_dbg_show()  local
520 	const struct jh7110_pinctrl_soc_info *info = sfp->info;  in jh7110_pinconf_dbg_show()
527 	padcfg_base = info->jh7110_get_padcfg_base(sfp, pin);  in jh7110_pinconf_dbg_show()
531 	value = readl_relaxed(sfp->base + padcfg_base + 4 * pin);  in jh7110_pinconf_dbg_show()
549 	struct jh7110_pinctrl *sfp = container_of(gc,  in jh7110_gpio_get_direction()  local
551 	const struct jh7110_pinctrl_soc_info *info = sfp->info;  in jh7110_gpio_get_direction()
554 	u32 doen = readl_relaxed(sfp->base + info->doen_reg_base + offset);  in jh7110_gpio_get_direction()
565 	struct jh7110_pinctrl *sfp = container_of(gc,  in jh7110_gpio_direction_input()  local
567 	const struct jh7110_pinctrl_soc_info *info = sfp->info;  in jh7110_gpio_direction_input()
570 	jh7110_padcfg_rmw(sfp, gpio,  in jh7110_gpio_direction_input()
575 		info->jh7110_set_one_pin_mux(sfp, gpio,  in jh7110_gpio_direction_input()
584 	struct jh7110_pinctrl *sfp = container_of(gc,  in jh7110_gpio_direction_output()  local
586 	const struct jh7110_pinctrl_soc_info *info = sfp->info;  in jh7110_gpio_direction_output()
589 		info->jh7110_set_one_pin_mux(sfp, gpio,  in jh7110_gpio_direction_output()
594 	jh7110_padcfg_rmw(sfp, gpio,  in jh7110_gpio_direction_output()
602 	struct jh7110_pinctrl *sfp = container_of(gc,  in jh7110_gpio_get()  local
604 	const struct jh7110_pinctrl_soc_info *info = sfp->info;  in jh7110_gpio_get()
605 	void __iomem *reg = sfp->base + info->gpioin_reg_base  in jh7110_gpio_get()
614 	struct jh7110_pinctrl *sfp = container_of(gc,  in jh7110_gpio_set()  local
616 	const struct jh7110_pinctrl_soc_info *info = sfp->info;  in jh7110_gpio_set()
619 	void __iomem *reg_dout = sfp->base + info->dout_reg_base + offset;  in jh7110_gpio_set()
624 	raw_spin_lock_irqsave(&sfp->lock, flags);  in jh7110_gpio_set()
627 	raw_spin_unlock_irqrestore(&sfp->lock, flags);  in jh7110_gpio_set()
633 	struct jh7110_pinctrl *sfp = container_of(gc,  in jh7110_gpio_set_config()  local
670 	jh7110_padcfg_rmw(sfp, gpio, mask, value);  in jh7110_gpio_set_config()
676 	struct jh7110_pinctrl *sfp = container_of(gc,  in jh7110_gpio_add_pin_ranges()  local
679 	sfp->gpios.name = sfp->gc.label;  in jh7110_gpio_add_pin_ranges()
680 	sfp->gpios.base = sfp->gc.base;  in jh7110_gpio_add_pin_ranges()
681 	sfp->gpios.pin_base = 0;  in jh7110_gpio_add_pin_ranges()
682 	sfp->gpios.npins = sfp->gc.ngpio;  in jh7110_gpio_add_pin_ranges()
683 	sfp->gpios.gc = &sfp->gc;  in jh7110_gpio_add_pin_ranges()
684 	pinctrl_add_gpio_range(sfp->pctl, &sfp->gpios);  in jh7110_gpio_add_pin_ranges()
690 	struct jh7110_pinctrl *sfp = jh7110_from_irq_data(d);  in jh7110_irq_ack()  local
691 	const struct jh7110_gpio_irq_reg *irq_reg = sfp->info->irq_reg;  in jh7110_irq_ack()
693 	void __iomem *ic = sfp->base + irq_reg->ic_reg_base  in jh7110_irq_ack()
699 	raw_spin_lock_irqsave(&sfp->lock, flags);  in jh7110_irq_ack()
703 	raw_spin_unlock_irqrestore(&sfp->lock, flags);  in jh7110_irq_ack()
708 	struct jh7110_pinctrl *sfp = jh7110_from_irq_data(d);  in jh7110_irq_mask()  local
709 	const struct jh7110_gpio_irq_reg *irq_reg = sfp->info->irq_reg;  in jh7110_irq_mask()
711 	void __iomem *ie = sfp->base + irq_reg->ie_reg_base  in jh7110_irq_mask()
717 	raw_spin_lock_irqsave(&sfp->lock, flags);  in jh7110_irq_mask()
720 	raw_spin_unlock_irqrestore(&sfp->lock, flags);  in jh7110_irq_mask()
722 	gpiochip_disable_irq(&sfp->gc, d->hwirq);  in jh7110_irq_mask()
727 	struct jh7110_pinctrl *sfp = jh7110_from_irq_data(d);  in jh7110_irq_mask_ack()  local
728 	const struct jh7110_gpio_irq_reg *irq_reg = sfp->info->irq_reg;  in jh7110_irq_mask_ack()
730 	void __iomem *ie = sfp->base + irq_reg->ie_reg_base  in jh7110_irq_mask_ack()
732 	void __iomem *ic = sfp->base + irq_reg->ic_reg_base  in jh7110_irq_mask_ack()
738 	raw_spin_lock_irqsave(&sfp->lock, flags);  in jh7110_irq_mask_ack()
745 	raw_spin_unlock_irqrestore(&sfp->lock, flags);  in jh7110_irq_mask_ack()
750 	struct jh7110_pinctrl *sfp = jh7110_from_irq_data(d);  in jh7110_irq_unmask()  local
751 	const struct jh7110_gpio_irq_reg *irq_reg = sfp->info->irq_reg;  in jh7110_irq_unmask()
753 	void __iomem *ie = sfp->base + irq_reg->ie_reg_base  in jh7110_irq_unmask()
759 	gpiochip_enable_irq(&sfp->gc, d->hwirq);  in jh7110_irq_unmask()
761 	raw_spin_lock_irqsave(&sfp->lock, flags);  in jh7110_irq_unmask()
764 	raw_spin_unlock_irqrestore(&sfp->lock, flags);  in jh7110_irq_unmask()
769 	struct jh7110_pinctrl *sfp = jh7110_from_irq_data(d);  in jh7110_irq_set_type()  local
770 	const struct jh7110_gpio_irq_reg *irq_reg = sfp->info->irq_reg;  in jh7110_irq_set_type()
772 	void __iomem *base = sfp->base + 4 * (gpio / 32);  in jh7110_irq_set_type()
812 	raw_spin_lock_irqsave(&sfp->lock, flags);  in jh7110_irq_set_type()
821 	raw_spin_unlock_irqrestore(&sfp->lock, flags);  in jh7110_irq_set_type()
844 	struct jh7110_pinctrl *sfp;  in jh7110_pinctrl_probe()  local
859 	sfp = devm_kzalloc(dev, sizeof(*sfp), GFP_KERNEL);  in jh7110_pinctrl_probe()
860 	if (!sfp)  in jh7110_pinctrl_probe()
864 	sfp->saved_regs = devm_kcalloc(dev, info->nsaved_regs,  in jh7110_pinctrl_probe()
865 				       sizeof(*sfp->saved_regs), GFP_KERNEL);  in jh7110_pinctrl_probe()
866 	if (!sfp->saved_regs)  in jh7110_pinctrl_probe()
870 	sfp->base = devm_platform_ioremap_resource(pdev, 0);  in jh7110_pinctrl_probe()
871 	if (IS_ERR(sfp->base))  in jh7110_pinctrl_probe()
872 		return PTR_ERR(sfp->base);  in jh7110_pinctrl_probe()
915 	sfp->info = info;  in jh7110_pinctrl_probe()
916 	sfp->dev = dev;  in jh7110_pinctrl_probe()
917 	platform_set_drvdata(pdev, sfp);  in jh7110_pinctrl_probe()
918 	sfp->gc.parent = dev;  in jh7110_pinctrl_probe()
919 	raw_spin_lock_init(&sfp->lock);  in jh7110_pinctrl_probe()
920 	mutex_init(&sfp->mutex);  in jh7110_pinctrl_probe()
924 					     sfp, &sfp->pctl);  in jh7110_pinctrl_probe()
929 	sfp->gc.label = dev_name(dev);  in jh7110_pinctrl_probe()
930 	sfp->gc.owner = THIS_MODULE;  in jh7110_pinctrl_probe()
931 	sfp->gc.request = pinctrl_gpio_request;  in jh7110_pinctrl_probe()
932 	sfp->gc.free = pinctrl_gpio_free;  in jh7110_pinctrl_probe()
933 	sfp->gc.get_direction = jh7110_gpio_get_direction;  in jh7110_pinctrl_probe()
934 	sfp->gc.direction_input = jh7110_gpio_direction_input;  in jh7110_pinctrl_probe()
935 	sfp->gc.direction_output = jh7110_gpio_direction_output;  in jh7110_pinctrl_probe()
936 	sfp->gc.get = jh7110_gpio_get;  in jh7110_pinctrl_probe()
937 	sfp->gc.set = jh7110_gpio_set;  in jh7110_pinctrl_probe()
938 	sfp->gc.set_config = jh7110_gpio_set_config;  in jh7110_pinctrl_probe()
939 	sfp->gc.add_pin_ranges = jh7110_gpio_add_pin_ranges;  in jh7110_pinctrl_probe()
940 	sfp->gc.base = info->gc_base;  in jh7110_pinctrl_probe()
941 	sfp->gc.ngpio = info->ngpios;  in jh7110_pinctrl_probe()
943 	jh7110_irq_chip.name = sfp->gc.label;  in jh7110_pinctrl_probe()
944 	gpio_irq_chip_set_chip(&sfp->gc.irq, &jh7110_irq_chip);  in jh7110_pinctrl_probe()
945 	sfp->gc.irq.parent_handler = info->jh7110_gpio_irq_handler;  in jh7110_pinctrl_probe()
946 	sfp->gc.irq.num_parents = 1;  in jh7110_pinctrl_probe()
947 	sfp->gc.irq.parents = devm_kcalloc(dev, sfp->gc.irq.num_parents,  in jh7110_pinctrl_probe()
948 					   sizeof(*sfp->gc.irq.parents),  in jh7110_pinctrl_probe()
950 	if (!sfp->gc.irq.parents)  in jh7110_pinctrl_probe()
952 	sfp->gc.irq.default_type = IRQ_TYPE_NONE;  in jh7110_pinctrl_probe()
953 	sfp->gc.irq.handler = handle_bad_irq;  in jh7110_pinctrl_probe()
954 	sfp->gc.irq.init_hw = info->jh7110_gpio_init_hw;  in jh7110_pinctrl_probe()
959 	sfp->gc.irq.parents[0] = ret;  in jh7110_pinctrl_probe()
961 	ret = devm_gpiochip_add_data(dev, &sfp->gc, sfp);  in jh7110_pinctrl_probe()
965 	dev_info(dev, "StarFive GPIO chip registered %d GPIOs\n", sfp->gc.ngpio);  in jh7110_pinctrl_probe()
967 	return pinctrl_enable(sfp->pctl);  in jh7110_pinctrl_probe()
973 	struct jh7110_pinctrl *sfp = dev_get_drvdata(dev);  in jh7110_pinctrl_suspend()  local
977 	raw_spin_lock_irqsave(&sfp->lock, flags);  in jh7110_pinctrl_suspend()
978 	for (i = 0 ; i < sfp->info->nsaved_regs ; i++)  in jh7110_pinctrl_suspend()
979 		sfp->saved_regs[i] = readl_relaxed(sfp->base + 4 * i);  in jh7110_pinctrl_suspend()
981 	raw_spin_unlock_irqrestore(&sfp->lock, flags);  in jh7110_pinctrl_suspend()
987 	struct jh7110_pinctrl *sfp = dev_get_drvdata(dev);  in jh7110_pinctrl_resume()  local
991 	raw_spin_lock_irqsave(&sfp->lock, flags);  in jh7110_pinctrl_resume()
992 	for (i = 0 ; i < sfp->info->nsaved_regs ; i++)  in jh7110_pinctrl_resume()
993 		writel_relaxed(sfp->saved_regs[i], sfp->base + 4 * i);  in jh7110_pinctrl_resume()
995 	raw_spin_unlock_irqrestore(&sfp->lock, flags);  in jh7110_pinctrl_resume()