92 	struct pinctrl_dev *pctrl;  member
128 static int pm8xxx_read_bank(struct pm8xxx_gpio *pctrl,  in pm8xxx_read_bank()  argument
134 	ret = regmap_write(pctrl->regmap, pin->reg, val);  in pm8xxx_read_bank()
136 		dev_err(pctrl->dev, "failed to select bank %d\n", bank);  in pm8xxx_read_bank()
140 	ret = regmap_read(pctrl->regmap, pin->reg, &val);  in pm8xxx_read_bank()
142 		dev_err(pctrl->dev, "failed to read register %d\n", bank);  in pm8xxx_read_bank()
149 static int pm8xxx_write_bank(struct pm8xxx_gpio *pctrl,  in pm8xxx_write_bank()  argument
159 	ret = regmap_write(pctrl->regmap, pin->reg, val);  in pm8xxx_write_bank()
161 		dev_err(pctrl->dev, "failed to write register\n");  in pm8xxx_write_bank()
168 	struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_get_groups_count()  local
170 	return pctrl->npins;  in pm8xxx_get_groups_count()
185 	struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_get_group_pins()  local
187 	*pins = &pctrl->desc.pins[group].number;  in pm8xxx_get_group_pins()
217 	struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_get_function_groups()  local
220 	*num_groups = pctrl->npins;  in pm8xxx_get_function_groups()
228 	struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_pinmux_set_mux()  local
229 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data;  in pm8xxx_pinmux_set_mux()
235 	pm8xxx_write_bank(pctrl, pin, 4, val);  in pm8xxx_pinmux_set_mux()
251 	struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_pin_config_get()  local
252 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_pin_config_get()
321 	struct pm8xxx_gpio *pctrl = pinctrl_dev_get_drvdata(pctldev);  in pm8xxx_pin_config_set()  local
322 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_pin_config_set()
348 				dev_err(pctrl->dev, "invalid pull-up strength\n");  in pm8xxx_pin_config_set()
378 				dev_err(pctrl->dev, "invalid drive strength\n");  in pm8xxx_pin_config_set()
393 			dev_err(pctrl->dev,  in pm8xxx_pin_config_set()
403 		pm8xxx_write_bank(pctrl, pin, 0, val);  in pm8xxx_pin_config_set()
410 		pm8xxx_write_bank(pctrl, pin, 1, val);  in pm8xxx_pin_config_set()
415 		pm8xxx_write_bank(pctrl, pin, 2, val);  in pm8xxx_pin_config_set()
421 		pm8xxx_write_bank(pctrl, pin, 3, val);  in pm8xxx_pin_config_set()
426 		pm8xxx_write_bank(pctrl, pin, 4, val);  in pm8xxx_pin_config_set()
433 		pm8xxx_write_bank(pctrl, pin, 5, val);  in pm8xxx_pin_config_set()
456 	struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip);  in pm8xxx_gpio_direction_input()  local
457 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_gpio_direction_input()
463 	pm8xxx_write_bank(pctrl, pin, 1, val);  in pm8xxx_gpio_direction_input()
472 	struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip);  in pm8xxx_gpio_direction_output()  local
473 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_gpio_direction_output()
483 	pm8xxx_write_bank(pctrl, pin, 1, val);  in pm8xxx_gpio_direction_output()
490 	struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip);  in pm8xxx_gpio_get()  local
491 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_gpio_get()
512 	struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip);  in pm8xxx_gpio_set()  local
513 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_gpio_set()
522 	pm8xxx_write_bank(pctrl, pin, 1, val);  in pm8xxx_gpio_set()
547 	struct pm8xxx_gpio *pctrl = gpiochip_get_data(chip);  in pm8xxx_gpio_dbg_show_one()  local
548 	struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data;  in pm8xxx_gpio_dbg_show_one()
605 static int pm8xxx_pin_populate(struct pm8xxx_gpio *pctrl,  in pm8xxx_pin_populate()  argument
610 	val = pm8xxx_read_bank(pctrl, pin, 0);  in pm8xxx_pin_populate()
616 	val = pm8xxx_read_bank(pctrl, pin, 1);  in pm8xxx_pin_populate()
624 	val = pm8xxx_read_bank(pctrl, pin, 2);  in pm8xxx_pin_populate()
634 	val = pm8xxx_read_bank(pctrl, pin, 3);  in pm8xxx_pin_populate()
641 	val = pm8xxx_read_bank(pctrl, pin, 4);  in pm8xxx_pin_populate()
647 	val = pm8xxx_read_bank(pctrl, pin, 5);  in pm8xxx_pin_populate()
687 	struct pm8xxx_gpio *pctrl = container_of(domain->host_data,  in pm8xxx_domain_translate()  local
691 	    fwspec->param[0] > pctrl->chip.ngpio)  in pm8xxx_domain_translate()
735 	struct pm8xxx_gpio *pctrl;  in pm8xxx_gpio_probe()  local
738 	pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);  in pm8xxx_gpio_probe()
739 	if (!pctrl)  in pm8xxx_gpio_probe()
742 	pctrl->dev = &pdev->dev;  in pm8xxx_gpio_probe()
743 	pctrl->npins = (uintptr_t) device_get_match_data(&pdev->dev);  in pm8xxx_gpio_probe()
745 	pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL);  in pm8xxx_gpio_probe()
746 	if (!pctrl->regmap) {  in pm8xxx_gpio_probe()
751 	pctrl->desc = pm8xxx_pinctrl_desc;  in pm8xxx_gpio_probe()
752 	pctrl->desc.npins = pctrl->npins;  in pm8xxx_gpio_probe()
755 			    pctrl->desc.npins,  in pm8xxx_gpio_probe()
762 				pctrl->desc.npins,  in pm8xxx_gpio_probe()
768 	for (i = 0; i < pctrl->desc.npins; i++) {  in pm8xxx_gpio_probe()
771 		ret = pm8xxx_pin_populate(pctrl, &pin_data[i]);  in pm8xxx_gpio_probe()
779 	pctrl->desc.pins = pins;  in pm8xxx_gpio_probe()
781 	pctrl->desc.num_custom_params = ARRAY_SIZE(pm8xxx_gpio_bindings);  in pm8xxx_gpio_probe()
782 	pctrl->desc.custom_params = pm8xxx_gpio_bindings;  in pm8xxx_gpio_probe()
784 	pctrl->desc.custom_conf_items = pm8xxx_conf_items;  in pm8xxx_gpio_probe()
787 	pctrl->pctrl = devm_pinctrl_register(&pdev->dev, &pctrl->desc, pctrl);  in pm8xxx_gpio_probe()
788 	if (IS_ERR(pctrl->pctrl)) {  in pm8xxx_gpio_probe()
790 		return PTR_ERR(pctrl->pctrl);  in pm8xxx_gpio_probe()
793 	pctrl->chip = pm8xxx_gpio_template;  in pm8xxx_gpio_probe()
794 	pctrl->chip.base = -1;  in pm8xxx_gpio_probe()
795 	pctrl->chip.parent = &pdev->dev;  in pm8xxx_gpio_probe()
796 	pctrl->chip.of_gpio_n_cells = 2;  in pm8xxx_gpio_probe()
797 	pctrl->chip.label = dev_name(pctrl->dev);  in pm8xxx_gpio_probe()
798 	pctrl->chip.ngpio = pctrl->npins;  in pm8xxx_gpio_probe()
800 	parent_node = of_irq_find_parent(pctrl->dev->of_node);  in pm8xxx_gpio_probe()
809 	girq = &pctrl->chip.irq;  in pm8xxx_gpio_probe()
813 	girq->fwnode = dev_fwnode(pctrl->dev);  in pm8xxx_gpio_probe()
820 	ret = gpiochip_add_data(&pctrl->chip, pctrl);  in pm8xxx_gpio_probe()
836 	if (!of_property_present(pctrl->dev->of_node, "gpio-ranges")) {  in pm8xxx_gpio_probe()
837 		ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev),  in pm8xxx_gpio_probe()
838 					     0, 0, pctrl->chip.ngpio);  in pm8xxx_gpio_probe()
840 			dev_err(pctrl->dev, "failed to add pin range\n");  in pm8xxx_gpio_probe()
845 	platform_set_drvdata(pdev, pctrl);  in pm8xxx_gpio_probe()
852 	gpiochip_remove(&pctrl->chip);  in pm8xxx_gpio_probe()
859 	struct pm8xxx_gpio *pctrl = platform_get_drvdata(pdev);  in pm8xxx_gpio_remove()  local
861 	gpiochip_remove(&pctrl->chip);  in pm8xxx_gpio_remove()