Lines Matching +full:bank +full:- +full:number

1 /* SPDX-License-Identifier: GPL-2.0-only */
3  * Copyright (c) 2020-2024 Rockchip Electronics Co., Ltd.
8  * With some ideas taken from pinctrl-samsung:
14  * and pinctrl-at91:
15  * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
244  * @offset: if initialized to -1 it will be autocalculated, by specifying
277  * @offset: if initialized to -1 it will be autocalculated, by specifying
290  * @dev: the pinctrl device bind to the bank
291  * @reg_base: register base of the gpio bank
293  * @clk: clock of the gpio bank
295  * @irq: interrupt of the gpio bank
297  * @pin_base: first pin number
298  * @nr_pins: number of pins in this bank
299  * @name: name of the bank
300  * @bank_num: number of the bank, to account for holes
301  * @iomux: array describing the 4 iomux sources of the bank
302  * @drv: array describing the 4 drive strength sources of the bank
303  * @pull_type: array describing the 4 pull type sources of the bank
305  * @of_node: dt node of this bank
307  * @domain: irqdomain of the gpio bank
310  * @slock: spinlock for the gpio bank
313  * @route_mask: bits describing the routing pins of per bank
314  * @deferred_output: gpio output settings to be done after gpio bank probed
350  * @num: bank number.
351  * @pin: pin number.
372  * @bank_num: bank number.
403 	int	(*pull_calc_reg)(struct rockchip_pin_bank *bank,
406 	int	(*drv_calc_reg)(struct rockchip_pin_bank *bank,
409 	int	(*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
433  * @npins: number of pins included in this group.
447  * @ngroups: number of groups included in @groups.