Lines Matching +full:pin +full:- +full:ctrl +full:- +full:enable
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2020-2024 Rockchip Electronics Co., Ltd.
8 * With some ideas taken from pinctrl-samsung:
14 * and pinctrl-at91:
15 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <[email protected]>
30 #include <linux/pinctrl/pinconf-generic.h>
37 #include <dt-bindings/pinctrl/rockchip.h>
41 #include "pinctrl-rockchip.h"
67 { .offset = -1 }, \
68 { .offset = -1 }, \
69 { .offset = -1 }, \
70 { .offset = -1 }, \
80 { .type = iom0, .offset = -1 }, \
81 { .type = iom1, .offset = -1 }, \
82 { .type = iom2, .offset = -1 }, \
83 { .type = iom3, .offset = -1 }, \
114 { .offset = -1 }, \
115 { .offset = -1 }, \
116 { .offset = -1 }, \
117 { .offset = -1 }, \
120 { .drv_type = type0, .offset = -1 }, \
121 { .drv_type = type1, .offset = -1 }, \
122 { .drv_type = type2, .offset = -1 }, \
123 { .drv_type = type3, .offset = -1 }, \
135 { .type = iom0, .offset = -1 }, \
136 { .type = iom1, .offset = -1 }, \
137 { .type = iom2, .offset = -1 }, \
138 { .type = iom3, .offset = -1 }, \
154 { .offset = -1 }, \
155 { .offset = -1 }, \
156 { .offset = -1 }, \
157 { .offset = -1 }, \
160 { .drv_type = drv0, .offset = -1 }, \
161 { .drv_type = drv1, .offset = -1 }, \
162 { .drv_type = drv2, .offset = -1 }, \
163 { .drv_type = drv3, .offset = -1 }, \
195 { .type = iom0, .offset = -1 }, \
196 { .type = iom1, .offset = -1 }, \
197 { .type = iom2, .offset = -1 }, \
198 { .type = iom3, .offset = -1 }, \
219 { .type = iom0, .offset = -1 }, \
220 { .type = iom1, .offset = -1 }, \
221 { .type = iom2, .offset = -1 }, \
222 { .type = iom3, .offset = -1 }, \
236 #define PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, FLAG) \ argument
239 .pin = PIN, \
246 #define RK_MUXROUTE_SAME(ID, PIN, FUNC, REG, VAL) \ argument
247 PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROCKCHIP_ROUTE_SAME)
249 #define RK_MUXROUTE_GRF(ID, PIN, FUNC, REG, VAL) \ argument
250 PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROCKCHIP_ROUTE_GRF)
252 #define RK_MUXROUTE_PMU(ID, PIN, FUNC, REG, VAL) \ argument
253 PIN_BANK_MUX_ROUTE_FLAGS(ID, PIN, FUNC, REG, VAL, ROCKCHIP_ROUTE_PMU)
255 #define RK3588_PIN_BANK_FLAGS(ID, PIN, LABEL, M, P) \ argument
256 PIN_BANK_IOMUX_FLAGS_PULL_FLAGS(ID, PIN, LABEL, M, M, M, M, P, P, P, P)
270 for (i = 0; i < info->ngroups; i++) { in pinctrl_name_to_group()
271 if (!strcmp(info->groups[i].name, name)) in pinctrl_name_to_group()
272 return &info->groups[i]; in pinctrl_name_to_group()
279 * given a pin number that is local to a pin controller, find out the pin bank
280 * and the register base of the pin bank.
283 unsigned pin) in pin_to_bank() argument
285 struct rockchip_pin_bank *b = info->ctrl->pin_banks; in pin_to_bank()
287 while (pin >= (b->pin_base + b->nr_pins)) in pin_to_bank()
297 struct rockchip_pin_bank *b = info->ctrl->pin_banks; in bank_num_to_bank()
300 for (i = 0; i < info->ctrl->nr_banks; i++, b++) { in bank_num_to_bank()
301 if (b->bank_num == num) in bank_num_to_bank()
305 return ERR_PTR(-EINVAL); in bank_num_to_bank()
316 return info->ngroups; in rockchip_get_groups_count()
324 return info->groups[selector].name; in rockchip_get_group_name()
333 if (selector >= info->ngroups) in rockchip_get_group_pins()
334 return -EINVAL; in rockchip_get_group_pins()
336 *pins = info->groups[selector].pins; in rockchip_get_group_pins()
337 *npins = info->groups[selector].npins; in rockchip_get_group_pins()
348 struct device *dev = info->dev; in rockchip_dt_node_to_map()
358 grp = pinctrl_name_to_group(info, np->name); in rockchip_dt_node_to_map()
361 return -EINVAL; in rockchip_dt_node_to_map()
364 map_num += grp->npins; in rockchip_dt_node_to_map()
368 return -ENOMEM; in rockchip_dt_node_to_map()
377 return -EINVAL; in rockchip_dt_node_to_map()
380 new_map[0].data.mux.function = parent->name; in rockchip_dt_node_to_map()
381 new_map[0].data.mux.group = np->name; in rockchip_dt_node_to_map()
386 for (i = 0; i < grp->npins; i++) { in rockchip_dt_node_to_map()
389 pin_get_name(pctldev, grp->pins[i]); in rockchip_dt_node_to_map()
390 new_map[i].data.configs.configs = grp->data[i].configs; in rockchip_dt_node_to_map()
391 new_map[i].data.configs.num_configs = grp->data[i].nconfigs; in rockchip_dt_node_to_map()
395 (*map)->data.mux.function, (*map)->data.mux.group, map_num); in rockchip_dt_node_to_map()
421 .pin = 0,
427 .pin = 1,
433 .pin = 2,
439 .pin = 3,
445 .pin = 4,
451 .pin = 5,
457 .pin = 6,
463 .pin = 7,
469 .pin = 8,
475 .pin = 9,
485 .pin = 20,
492 .pin = 21,
499 .pin = 22,
506 .pin = 23,
516 .pin = 20,
522 .pin = 21,
528 .pin = 22,
534 .pin = 23,
540 .pin = 24,
551 .pin = 14,
558 .pin = 15,
565 .pin = 18,
572 .pin = 19,
579 .pin = 20,
586 .pin = 21,
593 .pin = 22,
600 .pin = 23,
607 .pin = 2,
614 .pin = 3,
621 .pin = 16,
628 .pin = 10,
635 .pin = 11,
642 .pin = 12,
649 .pin = 13,
660 .pin = 15,
667 .pin = 23,
674 .pin = 9,
681 .pin = 10,
688 .pin = 11,
695 .pin = 12,
702 .pin = 13,
709 .pin = 14,
716 .pin = 15,
723 static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin, in rockchip_get_recalced_mux() argument
726 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_recalced_mux()
727 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_recalced_mux() local
731 for (i = 0; i < ctrl->niomux_recalced; i++) { in rockchip_get_recalced_mux()
732 data = &ctrl->iomux_recalced[i]; in rockchip_get_recalced_mux()
733 if (data->num == bank->bank_num && in rockchip_get_recalced_mux()
734 data->pin == pin) in rockchip_get_recalced_mux()
738 if (i >= ctrl->niomux_recalced) in rockchip_get_recalced_mux()
741 *reg = data->reg; in rockchip_get_recalced_mux()
742 *mask = data->mask; in rockchip_get_recalced_mux()
743 *bit = data->bit; in rockchip_get_recalced_mux()
747 RK_MUXROUTE_SAME(2, RK_PB4, 1, 0x184, BIT(16 + 7)), /* cif-d0m0 */
748 RK_MUXROUTE_SAME(3, RK_PA1, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d0m1 */
749 RK_MUXROUTE_SAME(2, RK_PB6, 1, 0x184, BIT(16 + 7)), /* cif-d1m0 */
750 RK_MUXROUTE_SAME(3, RK_PA2, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d1m1 */
751 RK_MUXROUTE_SAME(2, RK_PA0, 1, 0x184, BIT(16 + 7)), /* cif-d2m0 */
752 RK_MUXROUTE_SAME(3, RK_PA3, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d2m1 */
753 RK_MUXROUTE_SAME(2, RK_PA1, 1, 0x184, BIT(16 + 7)), /* cif-d3m0 */
754 RK_MUXROUTE_SAME(3, RK_PA5, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d3m1 */
755 RK_MUXROUTE_SAME(2, RK_PA2, 1, 0x184, BIT(16 + 7)), /* cif-d4m0 */
756 RK_MUXROUTE_SAME(3, RK_PA7, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d4m1 */
757 RK_MUXROUTE_SAME(2, RK_PA3, 1, 0x184, BIT(16 + 7)), /* cif-d5m0 */
758 RK_MUXROUTE_SAME(3, RK_PB0, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d5m1 */
759 RK_MUXROUTE_SAME(2, RK_PA4, 1, 0x184, BIT(16 + 7)), /* cif-d6m0 */
760 RK_MUXROUTE_SAME(3, RK_PB1, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d6m1 */
761 RK_MUXROUTE_SAME(2, RK_PA5, 1, 0x184, BIT(16 + 7)), /* cif-d7m0 */
762 RK_MUXROUTE_SAME(3, RK_PB4, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d7m1 */
763 RK_MUXROUTE_SAME(2, RK_PA6, 1, 0x184, BIT(16 + 7)), /* cif-d8m0 */
764 RK_MUXROUTE_SAME(3, RK_PB6, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d8m1 */
765 RK_MUXROUTE_SAME(2, RK_PA7, 1, 0x184, BIT(16 + 7)), /* cif-d9m0 */
766 RK_MUXROUTE_SAME(3, RK_PB7, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d9m1 */
767 RK_MUXROUTE_SAME(2, RK_PB7, 1, 0x184, BIT(16 + 7)), /* cif-d10m0 */
768 RK_MUXROUTE_SAME(3, RK_PC6, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d10m1 */
769 RK_MUXROUTE_SAME(2, RK_PC0, 1, 0x184, BIT(16 + 7)), /* cif-d11m0 */
770 RK_MUXROUTE_SAME(3, RK_PC7, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-d11m1 */
771 RK_MUXROUTE_SAME(2, RK_PB0, 1, 0x184, BIT(16 + 7)), /* cif-vsyncm0 */
772 RK_MUXROUTE_SAME(3, RK_PD1, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-vsyncm1 */
773 RK_MUXROUTE_SAME(2, RK_PB1, 1, 0x184, BIT(16 + 7)), /* cif-hrefm0 */
774 RK_MUXROUTE_SAME(3, RK_PD2, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-hrefm1 */
775 RK_MUXROUTE_SAME(2, RK_PB2, 1, 0x184, BIT(16 + 7)), /* cif-clkinm0 */
776 RK_MUXROUTE_SAME(3, RK_PD3, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-clkinm1 */
777 RK_MUXROUTE_SAME(2, RK_PB3, 1, 0x184, BIT(16 + 7)), /* cif-clkoutm0 */
778 RK_MUXROUTE_SAME(3, RK_PD0, 3, 0x184, BIT(16 + 7) | BIT(7)), /* cif-clkoutm1 */
779 RK_MUXROUTE_SAME(3, RK_PC6, 2, 0x184, BIT(16 + 8)), /* pdm-m0 */
780 RK_MUXROUTE_SAME(2, RK_PC6, 1, 0x184, BIT(16 + 8) | BIT(8)), /* pdm-m1 */
781 RK_MUXROUTE_SAME(3, RK_PD3, 2, 0x184, BIT(16 + 8)), /* pdm-sdi0m0 */
782 RK_MUXROUTE_SAME(2, RK_PC5, 2, 0x184, BIT(16 + 8) | BIT(8)), /* pdm-sdi0m1 */
783 RK_MUXROUTE_SAME(1, RK_PD3, 2, 0x184, BIT(16 + 10)), /* uart2-rxm0 */
784 RK_MUXROUTE_SAME(2, RK_PB6, 2, 0x184, BIT(16 + 10) | BIT(10)), /* uart2-rxm1 */
785 RK_MUXROUTE_SAME(1, RK_PD2, 2, 0x184, BIT(16 + 10)), /* uart2-txm0 */
786 RK_MUXROUTE_SAME(2, RK_PB4, 2, 0x184, BIT(16 + 10) | BIT(10)), /* uart2-txm1 */
787 RK_MUXROUTE_SAME(0, RK_PC1, 2, 0x184, BIT(16 + 9)), /* uart3-rxm0 */
788 RK_MUXROUTE_SAME(1, RK_PB7, 2, 0x184, BIT(16 + 9) | BIT(9)), /* uart3-rxm1 */
789 RK_MUXROUTE_SAME(0, RK_PC0, 2, 0x184, BIT(16 + 9)), /* uart3-txm0 */
790 RK_MUXROUTE_SAME(1, RK_PB6, 2, 0x184, BIT(16 + 9) | BIT(9)), /* uart3-txm1 */
791 RK_MUXROUTE_SAME(0, RK_PC2, 2, 0x184, BIT(16 + 9)), /* uart3-ctsm0 */
792 RK_MUXROUTE_SAME(1, RK_PB4, 2, 0x184, BIT(16 + 9) | BIT(9)), /* uart3-ctsm1 */
793 RK_MUXROUTE_SAME(0, RK_PC3, 2, 0x184, BIT(16 + 9)), /* uart3-rtsm0 */
794 RK_MUXROUTE_SAME(1, RK_PB5, 2, 0x184, BIT(16 + 9) | BIT(9)), /* uart3-rtsm1 */
895 RK_MUXROUTE_SAME(1, RK_PB2, 1, 0x144, BIT(16 + 3) | BIT(16 + 4)), /* spi-0 */
896 RK_MUXROUTE_SAME(1, RK_PD3, 3, 0x144, BIT(16 + 3) | BIT(16 + 4) | BIT(3)), /* spi-1 */
897 RK_MUXROUTE_SAME(0, RK_PB5, 2, 0x144, BIT(16 + 3) | BIT(16 + 4) | BIT(4)), /* spi-2 */
898 RK_MUXROUTE_SAME(1, RK_PA5, 1, 0x144, BIT(16 + 5)), /* i2s-0 */
899 RK_MUXROUTE_SAME(0, RK_PB6, 1, 0x144, BIT(16 + 5) | BIT(5)), /* i2s-1 */
900 RK_MUXROUTE_SAME(1, RK_PC6, 2, 0x144, BIT(16 + 6)), /* emmc-0 */
901 RK_MUXROUTE_SAME(2, RK_PA4, 2, 0x144, BIT(16 + 6) | BIT(6)), /* emmc-1 */
905 RK_MUXROUTE_SAME(0, RK_PD0, 1, 0xa0, BIT(16 + 11)), /* non-iomuxed emmc/flash pins on flash-dqs */
906 …UTE_SAME(0, RK_PD0, 2, 0xa0, BIT(16 + 11) | BIT(11)), /* non-iomuxed emmc/flash pins on emmc-clk */
910 RK_MUXROUTE_SAME(0, RK_PD2, 1, 0x50, BIT(16)), /* pwm0-0 */
911 RK_MUXROUTE_SAME(3, RK_PC5, 1, 0x50, BIT(16) | BIT(0)), /* pwm0-1 */
912 RK_MUXROUTE_SAME(0, RK_PD3, 1, 0x50, BIT(16 + 1)), /* pwm1-0 */
913 RK_MUXROUTE_SAME(0, RK_PD6, 2, 0x50, BIT(16 + 1) | BIT(1)), /* pwm1-1 */
914 RK_MUXROUTE_SAME(0, RK_PD4, 1, 0x50, BIT(16 + 2)), /* pwm2-0 */
915 RK_MUXROUTE_SAME(1, RK_PB4, 2, 0x50, BIT(16 + 2) | BIT(2)), /* pwm2-1 */
916 RK_MUXROUTE_SAME(3, RK_PD2, 1, 0x50, BIT(16 + 3)), /* pwm3-0 */
917 RK_MUXROUTE_SAME(1, RK_PB3, 2, 0x50, BIT(16 + 3) | BIT(3)), /* pwm3-1 */
918 RK_MUXROUTE_SAME(1, RK_PA1, 1, 0x50, BIT(16 + 4)), /* sdio-0_d0 */
919 RK_MUXROUTE_SAME(3, RK_PA2, 1, 0x50, BIT(16 + 4) | BIT(4)), /* sdio-1_d0 */
920 RK_MUXROUTE_SAME(0, RK_PB5, 2, 0x50, BIT(16 + 5)), /* spi-0_rx */
921 RK_MUXROUTE_SAME(2, RK_PA0, 2, 0x50, BIT(16 + 5) | BIT(5)), /* spi-1_rx */
922 RK_MUXROUTE_SAME(1, RK_PC6, 2, 0x50, BIT(16 + 7)), /* emmc-0_cmd */
923 RK_MUXROUTE_SAME(2, RK_PA4, 2, 0x50, BIT(16 + 7) | BIT(7)), /* emmc-1_cmd */
924 RK_MUXROUTE_SAME(1, RK_PC3, 2, 0x50, BIT(16 + 8)), /* uart2-0_rx */
925 RK_MUXROUTE_SAME(1, RK_PB2, 2, 0x50, BIT(16 + 8) | BIT(8)), /* uart2-1_rx */
926 RK_MUXROUTE_SAME(1, RK_PB2, 1, 0x50, BIT(16 + 11)), /* uart1-0_rx */
927 RK_MUXROUTE_SAME(3, RK_PB5, 1, 0x50, BIT(16 + 11) | BIT(11)), /* uart1-1_rx */
941 RK_MUXROUTE_SAME(1, RK_PA3, 2, 0x308, BIT(16 + 3)), /* i2s-8ch-1-sclktxm0 */
942 RK_MUXROUTE_SAME(1, RK_PA4, 2, 0x308, BIT(16 + 3)), /* i2s-8ch-1-sclkrxm0 */
943 RK_MUXROUTE_SAME(1, RK_PB5, 2, 0x308, BIT(16 + 3) | BIT(3)), /* i2s-8ch-1-sclktxm1 */
944 RK_MUXROUTE_SAME(1, RK_PB6, 2, 0x308, BIT(16 + 3) | BIT(3)), /* i2s-8ch-1-sclkrxm1 */
945 RK_MUXROUTE_SAME(1, RK_PA4, 3, 0x308, BIT(16 + 12) | BIT(16 + 13)), /* pdm-clkm0 */
946 RK_MUXROUTE_SAME(1, RK_PB6, 4, 0x308, BIT(16 + 12) | BIT(16 + 13) | BIT(12)), /* pdm-clkm1 */
947 RK_MUXROUTE_SAME(2, RK_PA6, 2, 0x308, BIT(16 + 12) | BIT(16 + 13) | BIT(13)), /* pdm-clkm2 */
948 RK_MUXROUTE_SAME(2, RK_PA4, 3, 0x600, BIT(16 + 2) | BIT(2)), /* pdm-clkm-m2 */
954 RK_MUXROUTE_SAME(1, RK_PB3, 2, 0x50, BIT(16 + 2) | BIT(2)), /* gmac-m1_rxd0 */
955 RK_MUXROUTE_SAME(1, RK_PB6, 2, 0x50, BIT(16 + 10) | BIT(10)), /* gmac-m1-optimized_rxd3 */
1070 static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin, in rockchip_get_mux_route() argument
1073 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_mux_route()
1074 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_mux_route() local
1078 for (i = 0; i < ctrl->niomux_routes; i++) { in rockchip_get_mux_route()
1079 data = &ctrl->iomux_routes[i]; in rockchip_get_mux_route()
1080 if ((data->bank_num == bank->bank_num) && in rockchip_get_mux_route()
1081 (data->pin == pin) && (data->func == mux)) in rockchip_get_mux_route()
1085 if (i >= ctrl->niomux_routes) in rockchip_get_mux_route()
1088 *loc = data->route_location; in rockchip_get_mux_route()
1089 *reg = data->route_offset; in rockchip_get_mux_route()
1090 *value = data->route_val; in rockchip_get_mux_route()
1095 static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) in rockchip_get_mux() argument
1097 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_mux()
1098 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_mux() local
1099 int iomux_num = (pin / 8); in rockchip_get_mux()
1106 return -EINVAL; in rockchip_get_mux()
1108 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { in rockchip_get_mux()
1109 dev_err(info->dev, "pin %d is unrouted\n", pin); in rockchip_get_mux()
1110 return -EINVAL; in rockchip_get_mux()
1113 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) in rockchip_get_mux()
1116 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rockchip_get_mux()
1117 regmap = info->regmap_pmu; in rockchip_get_mux()
1118 else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU) in rockchip_get_mux()
1119 regmap = (pin % 8 < 4) ? info->regmap_pmu : info->regmap_base; in rockchip_get_mux()
1121 regmap = info->regmap_base; in rockchip_get_mux()
1124 mux_type = bank->iomux[iomux_num].type; in rockchip_get_mux()
1125 reg = bank->iomux[iomux_num].offset; in rockchip_get_mux()
1127 if ((pin % 8) >= 4) in rockchip_get_mux()
1129 bit = (pin % 4) * 4; in rockchip_get_mux()
1132 if ((pin % 8) >= 5) in rockchip_get_mux()
1134 bit = (pin % 8 % 5) * 3; in rockchip_get_mux()
1137 bit = (pin % 8) * 2; in rockchip_get_mux()
1141 if (bank->recalced_mask & BIT(pin)) in rockchip_get_mux()
1142 rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask); in rockchip_get_mux()
1144 if (ctrl->type == RK3576) { in rockchip_get_mux()
1145 if ((bank->bank_num == 0) && (pin >= RK_PB4) && (pin <= RK_PB7)) in rockchip_get_mux()
1149 if (ctrl->type == RK3588) { in rockchip_get_mux()
1150 if (bank->bank_num == 0) { in rockchip_get_mux()
1151 if ((pin >= RK_PB4) && (pin <= RK_PD7)) { in rockchip_get_mux()
1154 reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */ in rockchip_get_mux()
1163 regmap = info->regmap_base; in rockchip_get_mux()
1165 } else if (bank->bank_num > 0) { in rockchip_get_mux()
1178 int pin, int mux) in rockchip_verify_mux() argument
1180 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_verify_mux()
1181 struct device *dev = info->dev; in rockchip_verify_mux()
1182 int iomux_num = (pin / 8); in rockchip_verify_mux()
1185 return -EINVAL; in rockchip_verify_mux()
1187 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { in rockchip_verify_mux()
1188 dev_err(dev, "pin %d is unrouted\n", pin); in rockchip_verify_mux()
1189 return -EINVAL; in rockchip_verify_mux()
1192 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) { in rockchip_verify_mux()
1194 dev_err(dev, "pin %d only supports a gpio mux\n", pin); in rockchip_verify_mux()
1195 return -ENOTSUPP; in rockchip_verify_mux()
1203 * Set a new mux function for a pin.
1209 * All pin settings seem to be 2 bit wide in both the upper and lower
1211 * @bank: pin bank to change
1212 * @pin: pin to change
1215 static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) in rockchip_set_mux() argument
1217 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_mux()
1218 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_set_mux() local
1219 struct device *dev = info->dev; in rockchip_set_mux()
1220 int iomux_num = (pin / 8); in rockchip_set_mux()
1226 ret = rockchip_verify_mux(bank, pin, mux); in rockchip_set_mux()
1230 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) in rockchip_set_mux()
1233 dev_dbg(dev, "setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux); in rockchip_set_mux()
1235 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rockchip_set_mux()
1236 regmap = info->regmap_pmu; in rockchip_set_mux()
1237 else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU) in rockchip_set_mux()
1238 regmap = (pin % 8 < 4) ? info->regmap_pmu : info->regmap_base; in rockchip_set_mux()
1240 regmap = info->regmap_base; in rockchip_set_mux()
1243 mux_type = bank->iomux[iomux_num].type; in rockchip_set_mux()
1244 reg = bank->iomux[iomux_num].offset; in rockchip_set_mux()
1246 if ((pin % 8) >= 4) in rockchip_set_mux()
1248 bit = (pin % 4) * 4; in rockchip_set_mux()
1251 if ((pin % 8) >= 5) in rockchip_set_mux()
1253 bit = (pin % 8 % 5) * 3; in rockchip_set_mux()
1256 bit = (pin % 8) * 2; in rockchip_set_mux()
1260 if (bank->recalced_mask & BIT(pin)) in rockchip_set_mux()
1261 rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask); in rockchip_set_mux()
1263 if (ctrl->type == RK3576) { in rockchip_set_mux()
1264 if ((bank->bank_num == 0) && (pin >= RK_PB4) && (pin <= RK_PB7)) in rockchip_set_mux()
1268 if (ctrl->type == RK3588) { in rockchip_set_mux()
1269 if (bank->bank_num == 0) { in rockchip_set_mux()
1270 if ((pin >= RK_PB4) && (pin <= RK_PD7)) { in rockchip_set_mux()
1272 reg += 0x4000 - 0xC; /* PMU2_IOC_BASE */ in rockchip_set_mux()
1280 reg0 = reg + 0x4000 - 0xC; /* PMU2_IOC_BASE */ in rockchip_set_mux()
1290 regmap = info->regmap_base; in rockchip_set_mux()
1300 } else if (bank->bank_num > 0) { in rockchip_set_mux()
1306 return -EINVAL; in rockchip_set_mux()
1308 if (bank->route_mask & BIT(pin)) { in rockchip_set_mux()
1309 if (rockchip_get_mux_route(bank, pin, mux, &route_location, in rockchip_set_mux()
1316 route_regmap = info->regmap_pmu; in rockchip_set_mux()
1319 route_regmap = info->regmap_base; in rockchip_set_mux()
1347 struct rockchip_pinctrl *info = bank->drvdata; in px30_calc_pull_reg_and_bit()
1350 if (bank->bank_num == 0) { in px30_calc_pull_reg_and_bit()
1351 *regmap = info->regmap_pmu; in px30_calc_pull_reg_and_bit()
1354 *regmap = info->regmap_base; in px30_calc_pull_reg_and_bit()
1358 *reg -= 0x10; in px30_calc_pull_reg_and_bit()
1359 *reg += bank->bank_num * PX30_PULL_BANK_STRIDE; in px30_calc_pull_reg_and_bit()
1379 struct rockchip_pinctrl *info = bank->drvdata; in px30_calc_drv_reg_and_bit()
1382 if (bank->bank_num == 0) { in px30_calc_drv_reg_and_bit()
1383 *regmap = info->regmap_pmu; in px30_calc_drv_reg_and_bit()
1386 *regmap = info->regmap_base; in px30_calc_drv_reg_and_bit()
1390 *reg -= 0x10; in px30_calc_drv_reg_and_bit()
1391 *reg += bank->bank_num * PX30_DRV_BANK_STRIDE; in px30_calc_drv_reg_and_bit()
1412 struct rockchip_pinctrl *info = bank->drvdata; in px30_calc_schmitt_reg_and_bit()
1415 if (bank->bank_num == 0) { in px30_calc_schmitt_reg_and_bit()
1416 *regmap = info->regmap_pmu; in px30_calc_schmitt_reg_and_bit()
1420 *regmap = info->regmap_base; in px30_calc_schmitt_reg_and_bit()
1423 *reg += (bank->bank_num - 1) * PX30_SCHMITT_BANK_STRIDE; in px30_calc_schmitt_reg_and_bit()
1442 struct rockchip_pinctrl *info = bank->drvdata; in rv1108_calc_pull_reg_and_bit()
1445 if (bank->bank_num == 0) { in rv1108_calc_pull_reg_and_bit()
1446 *regmap = info->regmap_pmu; in rv1108_calc_pull_reg_and_bit()
1450 *regmap = info->regmap_base; in rv1108_calc_pull_reg_and_bit()
1452 *reg -= 0x10; in rv1108_calc_pull_reg_and_bit()
1453 *reg += bank->bank_num * RV1108_PULL_BANK_STRIDE; in rv1108_calc_pull_reg_and_bit()
1473 struct rockchip_pinctrl *info = bank->drvdata; in rv1108_calc_drv_reg_and_bit()
1476 if (bank->bank_num == 0) { in rv1108_calc_drv_reg_and_bit()
1477 *regmap = info->regmap_pmu; in rv1108_calc_drv_reg_and_bit()
1480 *regmap = info->regmap_base; in rv1108_calc_drv_reg_and_bit()
1484 *reg -= 0x10; in rv1108_calc_drv_reg_and_bit()
1485 *reg += bank->bank_num * RV1108_DRV_BANK_STRIDE; in rv1108_calc_drv_reg_and_bit()
1506 struct rockchip_pinctrl *info = bank->drvdata; in rv1108_calc_schmitt_reg_and_bit()
1509 if (bank->bank_num == 0) { in rv1108_calc_schmitt_reg_and_bit()
1510 *regmap = info->regmap_pmu; in rv1108_calc_schmitt_reg_and_bit()
1514 *regmap = info->regmap_base; in rv1108_calc_schmitt_reg_and_bit()
1517 *reg += (bank->bank_num - 1) * RV1108_SCHMITT_BANK_STRIDE; in rv1108_calc_schmitt_reg_and_bit()
1536 struct rockchip_pinctrl *info = bank->drvdata; in rv1126_calc_pull_reg_and_bit()
1539 if (bank->bank_num == 0) { in rv1126_calc_pull_reg_and_bit()
1541 *regmap = info->regmap_base; in rv1126_calc_pull_reg_and_bit()
1543 *reg -= (((31 - pin_num) / RV1126_PULL_PINS_PER_REG + 1) * 4); in rv1126_calc_pull_reg_and_bit()
1548 *regmap = info->regmap_pmu; in rv1126_calc_pull_reg_and_bit()
1552 *regmap = info->regmap_base; in rv1126_calc_pull_reg_and_bit()
1553 *reg += (bank->bank_num - 1) * RV1126_PULL_BANK_STRIDE; in rv1126_calc_pull_reg_and_bit()
1573 struct rockchip_pinctrl *info = bank->drvdata; in rv1126_calc_drv_reg_and_bit()
1576 if (bank->bank_num == 0) { in rv1126_calc_drv_reg_and_bit()
1578 *regmap = info->regmap_base; in rv1126_calc_drv_reg_and_bit()
1580 *reg -= (((31 - pin_num) / RV1126_DRV_PINS_PER_REG + 1) * 4); in rv1126_calc_drv_reg_and_bit()
1581 *reg -= 0x4; in rv1126_calc_drv_reg_and_bit()
1586 *regmap = info->regmap_pmu; in rv1126_calc_drv_reg_and_bit()
1589 *regmap = info->regmap_base; in rv1126_calc_drv_reg_and_bit()
1591 *reg += (bank->bank_num - 1) * RV1126_DRV_BANK_STRIDE; in rv1126_calc_drv_reg_and_bit()
1612 struct rockchip_pinctrl *info = bank->drvdata; in rv1126_calc_schmitt_reg_and_bit()
1615 if (bank->bank_num == 0) { in rv1126_calc_schmitt_reg_and_bit()
1617 *regmap = info->regmap_base; in rv1126_calc_schmitt_reg_and_bit()
1619 *reg -= (((31 - pin_num) / RV1126_SCHMITT_PINS_PER_GRF_REG + 1) * 4); in rv1126_calc_schmitt_reg_and_bit()
1623 *regmap = info->regmap_pmu; in rv1126_calc_schmitt_reg_and_bit()
1627 *regmap = info->regmap_base; in rv1126_calc_schmitt_reg_and_bit()
1630 *reg += (bank->bank_num - 1) * RV1126_SCHMITT_BANK_STRIDE; in rv1126_calc_schmitt_reg_and_bit()
1646 struct rockchip_pinctrl *info = bank->drvdata; in rk3308_calc_schmitt_reg_and_bit()
1648 *regmap = info->regmap_base; in rk3308_calc_schmitt_reg_and_bit()
1651 *reg += bank->bank_num * RK3308_SCHMITT_BANK_STRIDE; in rk3308_calc_schmitt_reg_and_bit()
1666 struct rockchip_pinctrl *info = bank->drvdata; in rk2928_calc_pull_reg_and_bit()
1668 *regmap = info->regmap_base; in rk2928_calc_pull_reg_and_bit()
1670 *reg += bank->bank_num * RK2928_PULL_BANK_STRIDE; in rk2928_calc_pull_reg_and_bit()
1684 struct rockchip_pinctrl *info = bank->drvdata; in rk3128_calc_pull_reg_and_bit()
1686 *regmap = info->regmap_base; in rk3128_calc_pull_reg_and_bit()
1688 *reg += bank->bank_num * RK2928_PULL_BANK_STRIDE; in rk3128_calc_pull_reg_and_bit()
1706 struct rockchip_pinctrl *info = bank->drvdata; in rk3188_calc_pull_reg_and_bit()
1709 if (bank->bank_num == 0 && pin_num < 12) { in rk3188_calc_pull_reg_and_bit()
1710 *regmap = info->regmap_pmu ? info->regmap_pmu in rk3188_calc_pull_reg_and_bit()
1711 : bank->regmap_pull; in rk3188_calc_pull_reg_and_bit()
1712 *reg = info->regmap_pmu ? RK3188_PULL_PMU_OFFSET : 0; in rk3188_calc_pull_reg_and_bit()
1717 *regmap = info->regmap_pull ? info->regmap_pull in rk3188_calc_pull_reg_and_bit()
1718 : info->regmap_base; in rk3188_calc_pull_reg_and_bit()
1719 *reg = info->regmap_pull ? 0 : RK3188_PULL_OFFSET; in rk3188_calc_pull_reg_and_bit()
1722 *reg -= 4; in rk3188_calc_pull_reg_and_bit()
1723 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3188_calc_pull_reg_and_bit()
1728 * with the lowest pin being in bits 15:14 and the highest in rk3188_calc_pull_reg_and_bit()
1729 * pin in bits 1:0 in rk3188_calc_pull_reg_and_bit()
1731 *bit = 7 - (pin_num % RK3188_PULL_PINS_PER_REG); in rk3188_calc_pull_reg_and_bit()
1743 struct rockchip_pinctrl *info = bank->drvdata; in rk3288_calc_pull_reg_and_bit()
1746 if (bank->bank_num == 0) { in rk3288_calc_pull_reg_and_bit()
1747 *regmap = info->regmap_pmu; in rk3288_calc_pull_reg_and_bit()
1754 *regmap = info->regmap_base; in rk3288_calc_pull_reg_and_bit()
1758 *reg -= 0x10; in rk3288_calc_pull_reg_and_bit()
1759 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3288_calc_pull_reg_and_bit()
1779 struct rockchip_pinctrl *info = bank->drvdata; in rk3288_calc_drv_reg_and_bit()
1782 if (bank->bank_num == 0) { in rk3288_calc_drv_reg_and_bit()
1783 *regmap = info->regmap_pmu; in rk3288_calc_drv_reg_and_bit()
1790 *regmap = info->regmap_base; in rk3288_calc_drv_reg_and_bit()
1794 *reg -= 0x10; in rk3288_calc_drv_reg_and_bit()
1795 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3288_calc_drv_reg_and_bit()
1811 struct rockchip_pinctrl *info = bank->drvdata; in rk3228_calc_pull_reg_and_bit()
1813 *regmap = info->regmap_base; in rk3228_calc_pull_reg_and_bit()
1815 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3228_calc_pull_reg_and_bit()
1830 struct rockchip_pinctrl *info = bank->drvdata; in rk3228_calc_drv_reg_and_bit()
1832 *regmap = info->regmap_base; in rk3228_calc_drv_reg_and_bit()
1834 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3228_calc_drv_reg_and_bit()
1849 struct rockchip_pinctrl *info = bank->drvdata; in rk3308_calc_pull_reg_and_bit()
1851 *regmap = info->regmap_base; in rk3308_calc_pull_reg_and_bit()
1853 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3308_calc_pull_reg_and_bit()
1868 struct rockchip_pinctrl *info = bank->drvdata; in rk3308_calc_drv_reg_and_bit()
1870 *regmap = info->regmap_base; in rk3308_calc_drv_reg_and_bit()
1872 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3308_calc_drv_reg_and_bit()
1888 struct rockchip_pinctrl *info = bank->drvdata; in rk3368_calc_pull_reg_and_bit()
1891 if (bank->bank_num == 0) { in rk3368_calc_pull_reg_and_bit()
1892 *regmap = info->regmap_pmu; in rk3368_calc_pull_reg_and_bit()
1899 *regmap = info->regmap_base; in rk3368_calc_pull_reg_and_bit()
1903 *reg -= 0x10; in rk3368_calc_pull_reg_and_bit()
1904 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3368_calc_pull_reg_and_bit()
1921 struct rockchip_pinctrl *info = bank->drvdata; in rk3368_calc_drv_reg_and_bit()
1924 if (bank->bank_num == 0) { in rk3368_calc_drv_reg_and_bit()
1925 *regmap = info->regmap_pmu; in rk3368_calc_drv_reg_and_bit()
1932 *regmap = info->regmap_base; in rk3368_calc_drv_reg_and_bit()
1936 *reg -= 0x10; in rk3368_calc_drv_reg_and_bit()
1937 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3368_calc_drv_reg_and_bit()
1955 struct rockchip_pinctrl *info = bank->drvdata; in rk3399_calc_pull_reg_and_bit()
1958 if ((bank->bank_num == 0) || (bank->bank_num == 1)) { in rk3399_calc_pull_reg_and_bit()
1959 *regmap = info->regmap_pmu; in rk3399_calc_pull_reg_and_bit()
1962 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3399_calc_pull_reg_and_bit()
1968 *regmap = info->regmap_base; in rk3399_calc_pull_reg_and_bit()
1972 *reg -= 0x20; in rk3399_calc_pull_reg_and_bit()
1973 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3399_calc_pull_reg_and_bit()
1987 struct rockchip_pinctrl *info = bank->drvdata; in rk3399_calc_drv_reg_and_bit()
1991 if ((bank->bank_num == 0) || (bank->bank_num == 1)) in rk3399_calc_drv_reg_and_bit()
1992 *regmap = info->regmap_pmu; in rk3399_calc_drv_reg_and_bit()
1994 *regmap = info->regmap_base; in rk3399_calc_drv_reg_and_bit()
1996 *reg = bank->drv[drv_num].offset; in rk3399_calc_drv_reg_and_bit()
1997 if ((bank->drv[drv_num].drv_type == DRV_TYPE_IO_1V8_3V0_AUTO) || in rk3399_calc_drv_reg_and_bit()
1998 (bank->drv[drv_num].drv_type == DRV_TYPE_IO_3V3_ONLY)) in rk3399_calc_drv_reg_and_bit()
2018 struct rockchip_pinctrl *info = bank->drvdata; in rk3562_calc_drv_reg_and_bit()
2020 *regmap = info->regmap_base; in rk3562_calc_drv_reg_and_bit()
2021 switch (bank->bank_num) { in rk3562_calc_drv_reg_and_bit()
2043 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3562_calc_drv_reg_and_bit()
2066 struct rockchip_pinctrl *info = bank->drvdata; in rk3562_calc_pull_reg_and_bit()
2068 *regmap = info->regmap_base; in rk3562_calc_pull_reg_and_bit()
2069 switch (bank->bank_num) { in rk3562_calc_pull_reg_and_bit()
2091 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3562_calc_pull_reg_and_bit()
2115 struct rockchip_pinctrl *info = bank->drvdata; in rk3562_calc_schmitt_reg_and_bit()
2117 *regmap = info->regmap_base; in rk3562_calc_schmitt_reg_and_bit()
2118 switch (bank->bank_num) { in rk3562_calc_schmitt_reg_and_bit()
2140 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3562_calc_schmitt_reg_and_bit()
2161 struct rockchip_pinctrl *info = bank->drvdata; in rk3568_calc_pull_reg_and_bit()
2163 if (bank->bank_num == 0) { in rk3568_calc_pull_reg_and_bit()
2164 *regmap = info->regmap_pmu; in rk3568_calc_pull_reg_and_bit()
2166 *reg += bank->bank_num * RK3568_PULL_BANK_STRIDE; in rk3568_calc_pull_reg_and_bit()
2172 *regmap = info->regmap_base; in rk3568_calc_pull_reg_and_bit()
2174 *reg += (bank->bank_num - 1) * RK3568_PULL_BANK_STRIDE; in rk3568_calc_pull_reg_and_bit()
2194 struct rockchip_pinctrl *info = bank->drvdata; in rk3568_calc_drv_reg_and_bit()
2197 if (bank->bank_num == 0) { in rk3568_calc_drv_reg_and_bit()
2198 *regmap = info->regmap_pmu; in rk3568_calc_drv_reg_and_bit()
2205 *regmap = info->regmap_base; in rk3568_calc_drv_reg_and_bit()
2207 *reg += (bank->bank_num - 1) * RK3568_DRV_BANK_STRIDE; in rk3568_calc_drv_reg_and_bit()
2232 struct rockchip_pinctrl *info = bank->drvdata; in rk3576_calc_drv_reg_and_bit()
2234 *regmap = info->regmap_base; in rk3576_calc_drv_reg_and_bit()
2236 if (bank->bank_num == 0 && pin_num < 12) in rk3576_calc_drv_reg_and_bit()
2238 else if (bank->bank_num == 0) in rk3576_calc_drv_reg_and_bit()
2239 *reg = RK3576_DRV_GPIO0_BH_OFFSET - 0xc; in rk3576_calc_drv_reg_and_bit()
2240 else if (bank->bank_num == 1) in rk3576_calc_drv_reg_and_bit()
2242 else if (bank->bank_num == 2) in rk3576_calc_drv_reg_and_bit()
2244 else if (bank->bank_num == 3) in rk3576_calc_drv_reg_and_bit()
2246 else if (bank->bank_num == 4 && pin_num < 16) in rk3576_calc_drv_reg_and_bit()
2248 else if (bank->bank_num == 4 && pin_num < 24) in rk3576_calc_drv_reg_and_bit()
2249 *reg = RK3576_DRV_GPIO4_CL_OFFSET - 0x10; in rk3576_calc_drv_reg_and_bit()
2250 else if (bank->bank_num == 4) in rk3576_calc_drv_reg_and_bit()
2251 *reg = RK3576_DRV_GPIO4_DL_OFFSET - 0x18; in rk3576_calc_drv_reg_and_bit()
2253 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3576_calc_drv_reg_and_bit()
2277 struct rockchip_pinctrl *info = bank->drvdata; in rk3576_calc_pull_reg_and_bit()
2279 *regmap = info->regmap_base; in rk3576_calc_pull_reg_and_bit()
2281 if (bank->bank_num == 0 && pin_num < 12) in rk3576_calc_pull_reg_and_bit()
2283 else if (bank->bank_num == 0) in rk3576_calc_pull_reg_and_bit()
2284 *reg = RK3576_PULL_GPIO0_BH_OFFSET - 0x4; in rk3576_calc_pull_reg_and_bit()
2285 else if (bank->bank_num == 1) in rk3576_calc_pull_reg_and_bit()
2287 else if (bank->bank_num == 2) in rk3576_calc_pull_reg_and_bit()
2289 else if (bank->bank_num == 3) in rk3576_calc_pull_reg_and_bit()
2291 else if (bank->bank_num == 4 && pin_num < 16) in rk3576_calc_pull_reg_and_bit()
2293 else if (bank->bank_num == 4 && pin_num < 24) in rk3576_calc_pull_reg_and_bit()
2294 *reg = RK3576_PULL_GPIO4_CL_OFFSET - 0x8; in rk3576_calc_pull_reg_and_bit()
2295 else if (bank->bank_num == 4) in rk3576_calc_pull_reg_and_bit()
2296 *reg = RK3576_PULL_GPIO4_DL_OFFSET - 0xc; in rk3576_calc_pull_reg_and_bit()
2298 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3576_calc_pull_reg_and_bit()
2323 struct rockchip_pinctrl *info = bank->drvdata; in rk3576_calc_schmitt_reg_and_bit()
2325 *regmap = info->regmap_base; in rk3576_calc_schmitt_reg_and_bit()
2327 if (bank->bank_num == 0 && pin_num < 12) in rk3576_calc_schmitt_reg_and_bit()
2329 else if (bank->bank_num == 0) in rk3576_calc_schmitt_reg_and_bit()
2330 *reg = RK3576_SMT_GPIO0_BH_OFFSET - 0x4; in rk3576_calc_schmitt_reg_and_bit()
2331 else if (bank->bank_num == 1) in rk3576_calc_schmitt_reg_and_bit()
2333 else if (bank->bank_num == 2) in rk3576_calc_schmitt_reg_and_bit()
2335 else if (bank->bank_num == 3) in rk3576_calc_schmitt_reg_and_bit()
2337 else if (bank->bank_num == 4 && pin_num < 16) in rk3576_calc_schmitt_reg_and_bit()
2339 else if (bank->bank_num == 4 && pin_num < 24) in rk3576_calc_schmitt_reg_and_bit()
2340 *reg = RK3576_SMT_GPIO4_CL_OFFSET - 0x8; in rk3576_calc_schmitt_reg_and_bit()
2341 else if (bank->bank_num == 4) in rk3576_calc_schmitt_reg_and_bit()
2342 *reg = RK3576_SMT_GPIO4_DL_OFFSET - 0xc; in rk3576_calc_schmitt_reg_and_bit()
2344 dev_err(info->dev, "unsupported bank_num %d\n", bank->bank_num); in rk3576_calc_schmitt_reg_and_bit()
2465 struct rockchip_pinctrl *info = bank->drvdata; in rk3588_calc_pull_reg_and_bit()
2466 u8 bank_num = bank->bank_num; in rk3588_calc_pull_reg_and_bit()
2467 u32 pin = bank_num * 32 + pin_num; in rk3588_calc_pull_reg_and_bit() local
2470 for (i = ARRAY_SIZE(rk3588_p_regs) - 1; i >= 0; i--) { in rk3588_calc_pull_reg_and_bit()
2471 if (pin >= rk3588_p_regs[i][0]) { in rk3588_calc_pull_reg_and_bit()
2473 *regmap = info->regmap_base; in rk3588_calc_pull_reg_and_bit()
2480 return -EINVAL; in rk3588_calc_pull_reg_and_bit()
2490 struct rockchip_pinctrl *info = bank->drvdata; in rk3588_calc_drv_reg_and_bit()
2491 u8 bank_num = bank->bank_num; in rk3588_calc_drv_reg_and_bit()
2492 u32 pin = bank_num * 32 + pin_num; in rk3588_calc_drv_reg_and_bit() local
2495 for (i = ARRAY_SIZE(rk3588_ds_regs) - 1; i >= 0; i--) { in rk3588_calc_drv_reg_and_bit()
2496 if (pin >= rk3588_ds_regs[i][0]) { in rk3588_calc_drv_reg_and_bit()
2498 *regmap = info->regmap_base; in rk3588_calc_drv_reg_and_bit()
2505 return -EINVAL; in rk3588_calc_drv_reg_and_bit()
2516 struct rockchip_pinctrl *info = bank->drvdata; in rk3588_calc_schmitt_reg_and_bit()
2517 u8 bank_num = bank->bank_num; in rk3588_calc_schmitt_reg_and_bit()
2518 u32 pin = bank_num * 32 + pin_num; in rk3588_calc_schmitt_reg_and_bit() local
2521 for (i = ARRAY_SIZE(rk3588_smt_regs) - 1; i >= 0; i--) { in rk3588_calc_schmitt_reg_and_bit()
2522 if (pin >= rk3588_smt_regs[i][0]) { in rk3588_calc_schmitt_reg_and_bit()
2524 *regmap = info->regmap_base; in rk3588_calc_schmitt_reg_and_bit()
2531 return -EINVAL; in rk3588_calc_schmitt_reg_and_bit()
2535 { 2, 4, 8, 12, -1, -1, -1, -1 },
2536 { 3, 6, 9, 12, -1, -1, -1, -1 },
2537 { 5, 10, 15, 20, -1, -1, -1, -1 },
2545 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_drive_perpin()
2546 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_drive_perpin() local
2547 struct device *dev = info->dev; in rockchip_get_drive_perpin()
2552 int drv_type = bank->drv[pin_num / 8].drv_type; in rockchip_get_drive_perpin()
2554 ret = ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_drive_perpin()
2568 * drive-strength offset is special, as it is in rockchip_get_drive_perpin()
2592 bit -= 16; in rockchip_get_drive_perpin()
2597 return -EINVAL; in rockchip_get_drive_perpin()
2608 return -EINVAL; in rockchip_get_drive_perpin()
2616 data &= (1 << rmask_bits) - 1; in rockchip_get_drive_perpin()
2624 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_drive_perpin()
2625 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_set_drive_perpin() local
2626 struct device *dev = info->dev; in rockchip_set_drive_perpin()
2631 int drv_type = bank->drv[pin_num / 8].drv_type; in rockchip_set_drive_perpin()
2633 dev_dbg(dev, "setting drive of GPIO%d-%d to %d\n", in rockchip_set_drive_perpin()
2634 bank->bank_num, pin_num, strength); in rockchip_set_drive_perpin()
2636 ret = ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_drive_perpin()
2639 if (ctrl->type == RK3588) { in rockchip_set_drive_perpin()
2643 } else if (ctrl->type == RK3562 || in rockchip_set_drive_perpin()
2644 ctrl->type == RK3568) { in rockchip_set_drive_perpin()
2646 ret = (1 << (strength + 1)) - 1; in rockchip_set_drive_perpin()
2648 } else if (ctrl->type == RK3576) { in rockchip_set_drive_perpin()
2654 if (ctrl->type == RV1126) { in rockchip_set_drive_perpin()
2660 ret = -EINVAL; in rockchip_set_drive_perpin()
2686 * drive-strength offset is special, as it is spread in rockchip_set_drive_perpin()
2708 bit -= 16; in rockchip_set_drive_perpin()
2713 return -EINVAL; in rockchip_set_drive_perpin()
2723 return -EINVAL; in rockchip_set_drive_perpin()
2727 /* enable the write to the equivalent lower bits */ in rockchip_set_drive_perpin()
2728 data = ((1 << rmask_bits) - 1) << (bit + 16); in rockchip_set_drive_perpin()
2754 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_pull()
2755 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_pull() local
2756 struct device *dev = info->dev; in rockchip_get_pull()
2763 if (ctrl->type == RK3066B) in rockchip_get_pull()
2766 ret = ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_pull()
2774 switch (ctrl->type) { in rockchip_get_pull()
2792 pull_type = bank->pull_type[pin_num / 8]; in rockchip_get_pull()
2794 data &= (1 << RK3188_PULL_BITS_PER_PIN) - 1; in rockchip_get_pull()
2796 * In the TRM, pull-up being 1 for everything except the GPIO0_D3-D6, in rockchip_get_pull()
2799 if (ctrl->type == RK3568 && bank->bank_num == 0 && pin_num >= 27 && pin_num <= 30) { in rockchip_get_pull()
2807 return -EINVAL; in rockchip_get_pull()
2814 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_pull()
2815 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_set_pull() local
2816 struct device *dev = info->dev; in rockchip_set_pull()
2822 dev_dbg(dev, "setting pull of GPIO%d-%d to %d\n", bank->bank_num, pin_num, pull); in rockchip_set_pull()
2825 if (ctrl->type == RK3066B) in rockchip_set_pull()
2826 return pull ? -EINVAL : 0; in rockchip_set_pull()
2828 ret = ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_pull()
2832 switch (ctrl->type) { in rockchip_set_pull()
2853 pull_type = bank->pull_type[pin_num / 8]; in rockchip_set_pull()
2854 ret = -EINVAL; in rockchip_set_pull()
2863 * In the TRM, pull-up being 1 for everything except the GPIO0_D3-D6, in rockchip_set_pull()
2866 if (ctrl->type == RK3568 && bank->bank_num == 0 && pin_num >= 27 && pin_num <= 30) { in rockchip_set_pull()
2876 /* enable the write to the equivalent lower bits */ in rockchip_set_pull()
2877 data = ((1 << RK3188_PULL_BITS_PER_PIN) - 1) << (bit + 16); in rockchip_set_pull()
2885 return -EINVAL; in rockchip_set_pull()
2901 struct rockchip_pinctrl *info = bank->drvdata; in rk3328_calc_schmitt_reg_and_bit()
2903 *regmap = info->regmap_base; in rk3328_calc_schmitt_reg_and_bit()
2906 *reg += bank->bank_num * RK3328_SCHMITT_BANK_STRIDE; in rk3328_calc_schmitt_reg_and_bit()
2924 struct rockchip_pinctrl *info = bank->drvdata; in rk3568_calc_schmitt_reg_and_bit()
2926 if (bank->bank_num == 0) { in rk3568_calc_schmitt_reg_and_bit()
2927 *regmap = info->regmap_pmu; in rk3568_calc_schmitt_reg_and_bit()
2930 *regmap = info->regmap_base; in rk3568_calc_schmitt_reg_and_bit()
2932 *reg += (bank->bank_num - 1) * RK3568_SCHMITT_BANK_STRIDE; in rk3568_calc_schmitt_reg_and_bit()
2944 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_schmitt()
2945 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_get_schmitt() local
2951 ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_schmitt()
2960 switch (ctrl->type) { in rockchip_get_schmitt()
2963 return data & ((1 << RK3568_SCHMITT_BITS_PER_PIN) - 1); in rockchip_get_schmitt()
2972 int pin_num, int enable) in rockchip_set_schmitt() argument
2974 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_schmitt()
2975 struct rockchip_pin_ctrl *ctrl = info->ctrl; in rockchip_set_schmitt() local
2976 struct device *dev = info->dev; in rockchip_set_schmitt()
2982 dev_dbg(dev, "setting input schmitt of GPIO%d-%d to %d\n", in rockchip_set_schmitt()
2983 bank->bank_num, pin_num, enable); in rockchip_set_schmitt()
2985 ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_schmitt()
2989 /* enable the write to the equivalent lower bits */ in rockchip_set_schmitt()
2990 switch (ctrl->type) { in rockchip_set_schmitt()
2993 data = ((1 << RK3568_SCHMITT_BITS_PER_PIN) - 1) << (bit + 16); in rockchip_set_schmitt()
2995 data |= ((enable ? 0x2 : 0x1) << bit); in rockchip_set_schmitt()
2998 data = BIT(bit + 16) | (enable << bit); in rockchip_set_schmitt()
3014 return info->nfunctions; in rockchip_pmx_get_funcs_count()
3022 return info->functions[selector].name; in rockchip_pmx_get_func_name()
3031 *groups = info->functions[selector].groups; in rockchip_pmx_get_groups()
3032 *num_groups = info->functions[selector].ngroups; in rockchip_pmx_get_groups()
3041 const unsigned int *pins = info->groups[group].pins; in rockchip_pmx_set()
3042 const struct rockchip_pin_config *data = info->groups[group].data; in rockchip_pmx_set()
3043 struct device *dev = info->dev; in rockchip_pmx_set()
3047 dev_dbg(dev, "enable function %s group %s\n", in rockchip_pmx_set()
3048 info->functions[selector].name, info->groups[group].name); in rockchip_pmx_set()
3051 * for each pin in the pin group selected, program the corresponding in rockchip_pmx_set()
3052 * pin function number in the config register. in rockchip_pmx_set()
3054 for (cnt = 0; cnt < info->groups[group].npins; cnt++) { in rockchip_pmx_set()
3056 ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base, in rockchip_pmx_set()
3063 /* revert the already done pin settings */ in rockchip_pmx_set()
3064 for (cnt--; cnt >= 0; cnt--) { in rockchip_pmx_set()
3066 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0); in rockchip_pmx_set()
3084 return rockchip_set_mux(bank, offset - bank->pin_base, RK_FUNC_GPIO); in rockchip_pmx_gpio_set_direction()
3099 static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl, in rockchip_pinconf_pull_valid() argument
3102 switch (ctrl->type) { in rockchip_pinconf_pull_valid()
3129 unsigned int pin, u32 param, u32 arg) in rockchip_pinconf_defer_pin() argument
3135 return -ENOMEM; in rockchip_pinconf_defer_pin()
3137 cfg->pin = pin; in rockchip_pinconf_defer_pin()
3138 cfg->param = param; in rockchip_pinconf_defer_pin()
3139 cfg->arg = arg; in rockchip_pinconf_defer_pin()
3141 list_add_tail(&cfg->head, &bank->deferred_pins); in rockchip_pinconf_defer_pin()
3146 /* set the pin config settings for a specified pin */
3147 static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, in rockchip_pinconf_set() argument
3151 struct rockchip_pin_bank *bank = pin_to_bank(info, pin); in rockchip_pinconf_set()
3152 struct gpio_chip *gpio = &bank->gpio_chip; in rockchip_pinconf_set()
3165 * The lock makes sure that either gpio-probe has completed in rockchip_pinconf_set()
3168 mutex_lock(&bank->deferred_lock); in rockchip_pinconf_set()
3169 if (!gpio || !gpio->direction_output) { in rockchip_pinconf_set()
3170 rc = rockchip_pinconf_defer_pin(bank, pin - bank->pin_base, param, in rockchip_pinconf_set()
3172 mutex_unlock(&bank->deferred_lock); in rockchip_pinconf_set()
3178 mutex_unlock(&bank->deferred_lock); in rockchip_pinconf_set()
3183 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
3192 if (!rockchip_pinconf_pull_valid(info->ctrl, param)) in rockchip_pinconf_set()
3193 return -ENOTSUPP; in rockchip_pinconf_set()
3196 return -EINVAL; in rockchip_pinconf_set()
3198 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
3204 rc = rockchip_set_mux(bank, pin - bank->pin_base, in rockchip_pinconf_set()
3207 return -EINVAL; in rockchip_pinconf_set()
3209 rc = gpio->direction_output(gpio, pin - bank->pin_base, in rockchip_pinconf_set()
3215 rc = rockchip_set_mux(bank, pin - bank->pin_base, in rockchip_pinconf_set()
3218 return -EINVAL; in rockchip_pinconf_set()
3220 rc = gpio->direction_input(gpio, pin - bank->pin_base); in rockchip_pinconf_set()
3225 /* rk3288 is the first with per-pin drive-strength */ in rockchip_pinconf_set()
3226 if (!info->ctrl->drv_calc_reg) in rockchip_pinconf_set()
3227 return -ENOTSUPP; in rockchip_pinconf_set()
3230 pin - bank->pin_base, arg); in rockchip_pinconf_set()
3235 if (!info->ctrl->schmitt_calc_reg) in rockchip_pinconf_set()
3236 return -ENOTSUPP; in rockchip_pinconf_set()
3239 pin - bank->pin_base, arg); in rockchip_pinconf_set()
3244 return -ENOTSUPP; in rockchip_pinconf_set()
3252 /* get the pin config settings for a specified pin */
3253 static int rockchip_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, in rockchip_pinconf_get() argument
3257 struct rockchip_pin_bank *bank = pin_to_bank(info, pin); in rockchip_pinconf_get()
3258 struct gpio_chip *gpio = &bank->gpio_chip; in rockchip_pinconf_get()
3265 if (rockchip_get_pull(bank, pin - bank->pin_base) != param) in rockchip_pinconf_get()
3266 return -EINVAL; in rockchip_pinconf_get()
3274 if (!rockchip_pinconf_pull_valid(info->ctrl, param)) in rockchip_pinconf_get()
3275 return -ENOTSUPP; in rockchip_pinconf_get()
3277 if (rockchip_get_pull(bank, pin - bank->pin_base) != param) in rockchip_pinconf_get()
3278 return -EINVAL; in rockchip_pinconf_get()
3283 rc = rockchip_get_mux(bank, pin - bank->pin_base); in rockchip_pinconf_get()
3285 return -EINVAL; in rockchip_pinconf_get()
3287 if (!gpio || !gpio->get) { in rockchip_pinconf_get()
3292 rc = gpio->get(gpio, pin - bank->pin_base); in rockchip_pinconf_get()
3299 /* rk3288 is the first with per-pin drive-strength */ in rockchip_pinconf_get()
3300 if (!info->ctrl->drv_calc_reg) in rockchip_pinconf_get()
3301 return -ENOTSUPP; in rockchip_pinconf_get()
3303 rc = rockchip_get_drive_perpin(bank, pin - bank->pin_base); in rockchip_pinconf_get()
3310 if (!info->ctrl->schmitt_calc_reg) in rockchip_pinconf_get()
3311 return -ENOTSUPP; in rockchip_pinconf_get()
3313 rc = rockchip_get_schmitt(bank, pin - bank->pin_base); in rockchip_pinconf_get()
3320 return -ENOTSUPP; in rockchip_pinconf_get()
3336 { .compatible = "rockchip,gpio-bank" },
3337 { .compatible = "rockchip,rk3188-gpio-bank0" },
3350 info->nfunctions++; in rockchip_pinctrl_child_count()
3351 info->ngroups += of_get_child_count(child); in rockchip_pinctrl_child_count()
3360 struct device *dev = info->dev; in rockchip_pinctrl_parse_groups()
3371 grp->name = np->name; in rockchip_pinctrl_parse_groups()
3374 * the binding format is rockchip,pins = <bank pin mux CONFIG>, in rockchip_pinctrl_parse_groups()
3381 return dev_err_probe(dev, -EINVAL, in rockchip_pinctrl_parse_groups()
3382 … "%pOF: rockchip,pins: expected one or more of <bank pin mux CONFIG>, got %d args instead\n", in rockchip_pinctrl_parse_groups()
3385 grp->npins = size / 4; in rockchip_pinctrl_parse_groups()
3387 grp->pins = devm_kcalloc(dev, grp->npins, sizeof(*grp->pins), GFP_KERNEL); in rockchip_pinctrl_parse_groups()
3388 grp->data = devm_kcalloc(dev, grp->npins, sizeof(*grp->data), GFP_KERNEL); in rockchip_pinctrl_parse_groups()
3389 if (!grp->pins || !grp->data) in rockchip_pinctrl_parse_groups()
3390 return -ENOMEM; in rockchip_pinctrl_parse_groups()
3401 grp->pins[j] = bank->pin_base + be32_to_cpu(*list++); in rockchip_pinctrl_parse_groups()
3402 grp->data[j].func = be32_to_cpu(*list++); in rockchip_pinctrl_parse_groups()
3406 return -EINVAL; in rockchip_pinctrl_parse_groups()
3410 &grp->data[j].configs, &grp->data[j].nconfigs); in rockchip_pinctrl_parse_groups()
3423 struct device *dev = info->dev; in rockchip_pinctrl_parse_functions()
3432 func = &info->functions[index]; in rockchip_pinctrl_parse_functions()
3435 func->name = np->name; in rockchip_pinctrl_parse_functions()
3436 func->ngroups = of_get_child_count(np); in rockchip_pinctrl_parse_functions()
3437 if (func->ngroups <= 0) in rockchip_pinctrl_parse_functions()
3440 func->groups = devm_kcalloc(dev, func->ngroups, sizeof(*func->groups), GFP_KERNEL); in rockchip_pinctrl_parse_functions()
3441 if (!func->groups) in rockchip_pinctrl_parse_functions()
3442 return -ENOMEM; in rockchip_pinctrl_parse_functions()
3445 func->groups[i] = child->name; in rockchip_pinctrl_parse_functions()
3446 grp = &info->groups[grp_index++]; in rockchip_pinctrl_parse_functions()
3458 struct device *dev = &pdev->dev; in rockchip_pinctrl_parse_dt()
3459 struct device_node *np = dev->of_node; in rockchip_pinctrl_parse_dt()
3465 dev_dbg(dev, "nfunctions = %d\n", info->nfunctions); in rockchip_pinctrl_parse_dt()
3466 dev_dbg(dev, "ngroups = %d\n", info->ngroups); in rockchip_pinctrl_parse_dt()
3468 info->functions = devm_kcalloc(dev, info->nfunctions, sizeof(*info->functions), GFP_KERNEL); in rockchip_pinctrl_parse_dt()
3469 if (!info->functions) in rockchip_pinctrl_parse_dt()
3470 return -ENOMEM; in rockchip_pinctrl_parse_dt()
3472 info->groups = devm_kcalloc(dev, info->ngroups, sizeof(*info->groups), GFP_KERNEL); in rockchip_pinctrl_parse_dt()
3473 if (!info->groups) in rockchip_pinctrl_parse_dt()
3474 return -ENOMEM; in rockchip_pinctrl_parse_dt()
3495 struct pinctrl_desc *ctrldesc = &info->pctl; in rockchip_pinctrl_register()
3498 struct device *dev = &pdev->dev; in rockchip_pinctrl_register()
3500 int pin, bank, ret; in rockchip_pinctrl_register() local
3503 ctrldesc->name = "rockchip-pinctrl"; in rockchip_pinctrl_register()
3504 ctrldesc->owner = THIS_MODULE; in rockchip_pinctrl_register()
3505 ctrldesc->pctlops = &rockchip_pctrl_ops; in rockchip_pinctrl_register()
3506 ctrldesc->pmxops = &rockchip_pmx_ops; in rockchip_pinctrl_register()
3507 ctrldesc->confops = &rockchip_pinconf_ops; in rockchip_pinctrl_register()
3509 pindesc = devm_kcalloc(dev, info->ctrl->nr_pins, sizeof(*pindesc), GFP_KERNEL); in rockchip_pinctrl_register()
3511 return -ENOMEM; in rockchip_pinctrl_register()
3513 ctrldesc->pins = pindesc; in rockchip_pinctrl_register()
3514 ctrldesc->npins = info->ctrl->nr_pins; in rockchip_pinctrl_register()
3517 for (bank = 0, k = 0; bank < info->ctrl->nr_banks; bank++) { in rockchip_pinctrl_register()
3518 pin_bank = &info->ctrl->pin_banks[bank]; in rockchip_pinctrl_register()
3520 pin_names = devm_kasprintf_strarray(dev, pin_bank->name, pin_bank->nr_pins); in rockchip_pinctrl_register()
3524 for (pin = 0; pin < pin_bank->nr_pins; pin++, k++) { in rockchip_pinctrl_register()
3525 pdesc->number = k; in rockchip_pinctrl_register()
3526 pdesc->name = pin_names[pin]; in rockchip_pinctrl_register()
3530 INIT_LIST_HEAD(&pin_bank->deferred_pins); in rockchip_pinctrl_register()
3531 mutex_init(&pin_bank->deferred_lock); in rockchip_pinctrl_register()
3538 info->pctl_dev = devm_pinctrl_register(dev, ctrldesc, info); in rockchip_pinctrl_register()
3539 if (IS_ERR(info->pctl_dev)) in rockchip_pinctrl_register()
3540 return dev_err_probe(dev, PTR_ERR(info->pctl_dev), "could not register pinctrl driver\n"); in rockchip_pinctrl_register()
3552 struct device *dev = &pdev->dev; in rockchip_pinctrl_get_soc_data()
3553 struct device_node *node = dev->of_node; in rockchip_pinctrl_get_soc_data()
3555 struct rockchip_pin_ctrl *ctrl; in rockchip_pinctrl_get_soc_data() local
3560 ctrl = (struct rockchip_pin_ctrl *)match->data; in rockchip_pinctrl_get_soc_data()
3562 grf_offs = ctrl->grf_mux_offset; in rockchip_pinctrl_get_soc_data()
3563 pmu_offs = ctrl->pmu_mux_offset; in rockchip_pinctrl_get_soc_data()
3564 drv_pmu_offs = ctrl->pmu_drv_offset; in rockchip_pinctrl_get_soc_data()
3565 drv_grf_offs = ctrl->grf_drv_offset; in rockchip_pinctrl_get_soc_data()
3566 bank = ctrl->pin_banks; in rockchip_pinctrl_get_soc_data()
3567 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_pinctrl_get_soc_data()
3570 raw_spin_lock_init(&bank->slock); in rockchip_pinctrl_get_soc_data()
3571 bank->drvdata = d; in rockchip_pinctrl_get_soc_data()
3572 bank->pin_base = ctrl->nr_pins; in rockchip_pinctrl_get_soc_data()
3573 ctrl->nr_pins += bank->nr_pins; in rockchip_pinctrl_get_soc_data()
3577 struct rockchip_iomux *iom = &bank->iomux[j]; in rockchip_pinctrl_get_soc_data()
3578 struct rockchip_drv *drv = &bank->drv[j]; in rockchip_pinctrl_get_soc_data()
3581 if (bank_pins >= bank->nr_pins) in rockchip_pinctrl_get_soc_data()
3585 if (iom->offset >= 0) { in rockchip_pinctrl_get_soc_data()
3586 if ((iom->type & IOMUX_SOURCE_PMU) || in rockchip_pinctrl_get_soc_data()
3587 (iom->type & IOMUX_L_SOURCE_PMU)) in rockchip_pinctrl_get_soc_data()
3588 pmu_offs = iom->offset; in rockchip_pinctrl_get_soc_data()
3590 grf_offs = iom->offset; in rockchip_pinctrl_get_soc_data()
3592 iom->offset = ((iom->type & IOMUX_SOURCE_PMU) || in rockchip_pinctrl_get_soc_data()
3593 (iom->type & IOMUX_L_SOURCE_PMU)) ? in rockchip_pinctrl_get_soc_data()
3598 if (drv->offset >= 0) { in rockchip_pinctrl_get_soc_data()
3599 if (iom->type & IOMUX_SOURCE_PMU) in rockchip_pinctrl_get_soc_data()
3600 drv_pmu_offs = drv->offset; in rockchip_pinctrl_get_soc_data()
3602 drv_grf_offs = drv->offset; in rockchip_pinctrl_get_soc_data()
3604 drv->offset = (iom->type & IOMUX_SOURCE_PMU) ? in rockchip_pinctrl_get_soc_data()
3609 i, j, iom->offset, drv->offset); in rockchip_pinctrl_get_soc_data()
3615 inc = (iom->type & (IOMUX_WIDTH_4BIT | in rockchip_pinctrl_get_soc_data()
3618 if ((iom->type & IOMUX_SOURCE_PMU) || (iom->type & IOMUX_L_SOURCE_PMU)) in rockchip_pinctrl_get_soc_data()
3625 * 3bit drive-strenth'es are spread over two registers. in rockchip_pinctrl_get_soc_data()
3627 if ((drv->drv_type == DRV_TYPE_IO_1V8_3V0_AUTO) || in rockchip_pinctrl_get_soc_data()
3628 (drv->drv_type == DRV_TYPE_IO_3V3_ONLY)) in rockchip_pinctrl_get_soc_data()
3633 if (iom->type & IOMUX_SOURCE_PMU) in rockchip_pinctrl_get_soc_data()
3641 /* calculate the per-bank recalced_mask */ in rockchip_pinctrl_get_soc_data()
3642 for (j = 0; j < ctrl->niomux_recalced; j++) { in rockchip_pinctrl_get_soc_data()
3643 int pin = 0; in rockchip_pinctrl_get_soc_data() local
3645 if (ctrl->iomux_recalced[j].num == bank->bank_num) { in rockchip_pinctrl_get_soc_data()
3646 pin = ctrl->iomux_recalced[j].pin; in rockchip_pinctrl_get_soc_data()
3647 bank->recalced_mask |= BIT(pin); in rockchip_pinctrl_get_soc_data()
3651 /* calculate the per-bank route_mask */ in rockchip_pinctrl_get_soc_data()
3652 for (j = 0; j < ctrl->niomux_routes; j++) { in rockchip_pinctrl_get_soc_data()
3653 int pin = 0; in rockchip_pinctrl_get_soc_data() local
3655 if (ctrl->iomux_routes[j].bank_num == bank->bank_num) { in rockchip_pinctrl_get_soc_data()
3656 pin = ctrl->iomux_routes[j].pin; in rockchip_pinctrl_get_soc_data()
3657 bank->route_mask |= BIT(pin); in rockchip_pinctrl_get_soc_data()
3662 return ctrl; in rockchip_pinctrl_get_soc_data()
3673 int ret = pinctrl_force_sleep(info->pctl_dev); in rockchip_pinctrl_suspend()
3682 if (info->ctrl->type == RK3288) { in rockchip_pinctrl_suspend()
3683 ret = regmap_read(info->regmap_base, RK3288_GRF_GPIO6C_IOMUX, in rockchip_pinctrl_suspend()
3686 pinctrl_force_default(info->pctl_dev); in rockchip_pinctrl_suspend()
3699 if (info->ctrl->type == RK3288) { in rockchip_pinctrl_resume()
3700 ret = regmap_write(info->regmap_base, RK3288_GRF_GPIO6C_IOMUX, in rockchip_pinctrl_resume()
3707 return pinctrl_force_default(info->pctl_dev); in rockchip_pinctrl_resume()
3716 struct device *dev = &pdev->dev; in rockchip_pinctrl_probe()
3717 struct device_node *np = dev->of_node, *node; in rockchip_pinctrl_probe()
3718 struct rockchip_pin_ctrl *ctrl; in rockchip_pinctrl_probe() local
3723 if (!dev->of_node) in rockchip_pinctrl_probe()
3724 return dev_err_probe(dev, -ENODEV, "device tree node not found\n"); in rockchip_pinctrl_probe()
3728 return -ENOMEM; in rockchip_pinctrl_probe()
3730 info->dev = dev; in rockchip_pinctrl_probe()
3732 ctrl = rockchip_pinctrl_get_soc_data(info, pdev); in rockchip_pinctrl_probe()
3733 if (!ctrl) in rockchip_pinctrl_probe()
3734 return dev_err_probe(dev, -EINVAL, "driver data not available\n"); in rockchip_pinctrl_probe()
3735 info->ctrl = ctrl; in rockchip_pinctrl_probe()
3739 info->regmap_base = syscon_node_to_regmap(node); in rockchip_pinctrl_probe()
3741 if (IS_ERR(info->regmap_base)) in rockchip_pinctrl_probe()
3742 return PTR_ERR(info->regmap_base); in rockchip_pinctrl_probe()
3748 rockchip_regmap_config.max_register = resource_size(res) - 4; in rockchip_pinctrl_probe()
3750 info->regmap_base = in rockchip_pinctrl_probe()
3753 /* to check for the old dt-bindings */ in rockchip_pinctrl_probe()
3754 info->reg_size = resource_size(res); in rockchip_pinctrl_probe()
3757 if (ctrl->type == RK3188 && info->reg_size < 0x200) { in rockchip_pinctrl_probe()
3762 rockchip_regmap_config.max_register = resource_size(res) - 4; in rockchip_pinctrl_probe()
3763 rockchip_regmap_config.name = "rockchip,pinctrl-pull"; in rockchip_pinctrl_probe()
3764 info->regmap_pull = in rockchip_pinctrl_probe()
3772 info->regmap_pmu = syscon_node_to_regmap(node); in rockchip_pinctrl_probe()
3774 if (IS_ERR(info->regmap_pmu)) in rockchip_pinctrl_probe()
3775 return PTR_ERR(info->regmap_pmu); in rockchip_pinctrl_probe()
3784 ret = of_platform_populate(np, NULL, NULL, &pdev->dev); in rockchip_pinctrl_probe()
3798 of_platform_depopulate(&pdev->dev); in rockchip_pinctrl_remove()
3800 for (i = 0; i < info->ctrl->nr_banks; i++) { in rockchip_pinctrl_remove()
3801 bank = &info->ctrl->pin_banks[i]; in rockchip_pinctrl_remove()
3803 mutex_lock(&bank->deferred_lock); in rockchip_pinctrl_remove()
3804 while (!list_empty(&bank->deferred_pins)) { in rockchip_pinctrl_remove()
3805 cfg = list_first_entry(&bank->deferred_pins, in rockchip_pinctrl_remove()
3807 list_del(&cfg->head); in rockchip_pinctrl_remove()
3810 mutex_unlock(&bank->deferred_lock); in rockchip_pinctrl_remove()
3840 .label = "PX30-GPIO",
3864 .label = "RV1108-GPIO",
3904 .label = "RV1126-GPIO",
3927 .label = "RK2928-GPIO",
3942 .label = "RK3036-GPIO",
3960 .label = "RK3066a-GPIO",
3976 .label = "RK3066b-GPIO",
3991 .label = "RK3128-GPIO",
4011 .label = "RK3188-GPIO",
4029 .label = "RK3228-GPIO",
4073 .label = "RK3288-GPIO",
4109 .label = "RK3308-GPIO",
4138 .label = "RK3328-GPIO",
4164 .label = "RK3368-GPIO",
4184 -1,
4185 -1,
4228 .label = "RK3399-GPIO",
4276 .label = "RK3562-GPIO",
4309 .label = "RK3568-GPIO",
4346 .label = "RK3576-GPIO",
4369 .label = "RK3588-GPIO",
4377 { .compatible = "rockchip,px30-pinctrl",
4379 { .compatible = "rockchip,rv1108-pinctrl",
4381 { .compatible = "rockchip,rv1126-pinctrl",
4383 { .compatible = "rockchip,rk2928-pinctrl",
4385 { .compatible = "rockchip,rk3036-pinctrl",
4387 { .compatible = "rockchip,rk3066a-pinctrl",
4389 { .compatible = "rockchip,rk3066b-pinctrl",
4391 { .compatible = "rockchip,rk3128-pinctrl",
4393 { .compatible = "rockchip,rk3188-pinctrl",
4395 { .compatible = "rockchip,rk3228-pinctrl",
4397 { .compatible = "rockchip,rk3288-pinctrl",
4399 { .compatible = "rockchip,rk3308-pinctrl",
4401 { .compatible = "rockchip,rk3328-pinctrl",
4403 { .compatible = "rockchip,rk3368-pinctrl",
4405 { .compatible = "rockchip,rk3399-pinctrl",
4407 { .compatible = "rockchip,rk3562-pinctrl",
4409 { .compatible = "rockchip,rk3568-pinctrl",
4411 { .compatible = "rockchip,rk3576-pinctrl",
4413 { .compatible = "rockchip,rk3588-pinctrl",
4422 .name = "rockchip-pinctrl",
4440 MODULE_DESCRIPTION("ROCKCHIP Pin Controller Driver");
4442 MODULE_ALIAS("platform:pinctrl-rockchip");