Lines Matching +full:mclk0 +full:- +full:pins

1 // SPDX-License-Identifier: GPL-2.0-only
7 * pull-down, pull-up, drive strength and muxing.
10 * that is pin-dependent. Functions are declared statically in this driver.
12 * We create pinctrl groups that are 1:1 equivalent to pins: each group has a
15 * We use eq5p_ as prefix, as-in "EyeQ5 Pinctrl", but way shorter.
33 #include <linux/pinctrl/pinconf-generic.h>
39 #include "pinctrl-utils.h"
198 PINCTRL_PINFUNCTION("mclk0", mclk0_groups, ARRAY_SIZE(mclk0_groups)),
205 void __iomem *ptr = pctrl->base + eq5p_regs[bank][reg]; in eq5p_update_bits()
213 u32 val = readl(pctrl->base + eq5p_regs[bank][reg]); in eq5p_test_bit()
234 return pin - EQ5P_PIN_OFFSET_BANK_B; in eq5p_pin_to_offset()
245 return pctldev->desc->pins[selector].name; in eq5p_pinctrl_get_group_name()
250 const unsigned int **pins, in eq5p_pinctrl_get_group_pins() argument
253 *pins = &pctldev->desc->pins[selector].number; in eq5p_pinctrl_get_group_pins()
284 val_ds = readl(pctrl->base + eq5p_regs[bank][EQ5P_DS_HIGH]); in eq5p_pinconf_get()
285 offset -= 32; in eq5p_pinconf_get()
287 val_ds = readl(pctrl->base + eq5p_regs[bank][EQ5P_DS_LOW]); in eq5p_pinconf_get()
292 return -ENOTSUPP; in eq5p_pinconf_get()
304 const char *pin_name = pctrl->desc.pins[pin].name; in eq5p_pinctrl_pin_dbg_show()
314 * First, let's get the function name. All pins have only two functions: in eq5p_pinctrl_pin_dbg_show()
324 /* Groups and pins are the same thing for us. */ in eq5p_pinctrl_pin_dbg_show()
339 * should never occur as all pins have exactly two functions. in eq5p_pinctrl_pin_dbg_show()
403 const char *group_name = pctldev->desc->pins[pin].name; in eq5p_pinmux_set_mux()
409 dev_dbg(pctldev->dev, "func=%s group=%s\n", func_name, group_name); in eq5p_pinmux_set_mux()
444 dev_err(pctldev->dev, "Unsupported drive strength: %u\n", arg); in eq5p_pinconf_set_drive_strength()
445 return -EINVAL; in eq5p_pinconf_set_drive_strength()
452 offset -= 32; in eq5p_pinconf_set_drive_strength()
467 const char *pin_name = pctldev->desc->pins[pin].name; in eq5p_pinconf_set()
470 struct device *dev = pctldev->dev; in eq5p_pinconf_set()
491 return -ENOTSUPP; in eq5p_pinconf_set()
502 return -ENOTSUPP; in eq5p_pinconf_set()
517 return -ENOTSUPP; in eq5p_pinconf_set()
528 /* Pins and groups are equivalent in this driver. */
536 struct device *dev = &adev->dev; in eq5p_probe()
543 return -ENOMEM; in eq5p_probe()
545 pctrl->base = (void __iomem *)dev_get_platdata(dev); in eq5p_probe()
546 pctrl->desc.name = dev_name(dev); in eq5p_probe()
547 pctrl->desc.pins = eq5p_pins; in eq5p_probe()
548 pctrl->desc.npins = ARRAY_SIZE(eq5p_pins); in eq5p_probe()
549 pctrl->desc.pctlops = &eq5p_pinctrl_ops; in eq5p_probe()
550 pctrl->desc.pmxops = &eq5p_pinmux_ops; in eq5p_probe()
551 pctrl->desc.confops = &eq5p_pinconf_ops; in eq5p_probe()
552 pctrl->desc.owner = THIS_MODULE; in eq5p_probe()
554 ret = devm_pinctrl_register_and_init(dev, &pctrl->desc, pctrl, &pctldev); in eq5p_probe()