Lines Matching refs:npcm_gpio_set
118 static void npcm_gpio_set(struct gpio_chip *gc, void __iomem *reg, in npcm_gpio_set() function
241 npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_POL, gpio); in npcmgpio_set_irq_type()
245 npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_EVBE, gpio); in npcmgpio_set_irq_type()
248 npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_POL, gpio); in npcmgpio_set_irq_type()
261 npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_EVTYP, gpio); in npcmgpio_set_irq_type()
1890 npcm_gpio_set(&bank->gc, OSRC_Offset, gpio); in npcm8xx_set_slew_rate()
1951 npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_ODSC, gpio); in npcm8xx_set_drive_strength()
2105 npcm_gpio_set(&bank->gc, DBNCS_offset, in debounce_timing_setting()
2113 npcm_gpio_set(&bank->gc, DBNCS_offset, debounce_select); in debounce_timing_setting()
2174 npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_DBNC, in npcm_set_debounce()
2264 npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_PD, gpio); in npcm8xx_config_set_one()
2268 npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_PU, gpio); in npcm8xx_config_set_one()
2282 npcm_gpio_set(&bank->gc, bank->base + NPCM8XX_GP_N_OTYP, gpio); in npcm8xx_config_set_one()