48 #define PINCTRL_CONF_DESC(p, offset, mask)				\  argument
334 	u32 offset;  member
348 		u32 offset;  member
350 		u32 val;  member
2273 	u32 offset = gpio % AIROHA_PIN_BANK_SIZE;  in airoha_gpio_set()  local
2283 	u32 val, pin = gpio % AIROHA_PIN_BANK_SIZE;  in airoha_gpio_get()  local
2310 	u8 offset = data->hwirq % AIROHA_REG_GPIOCTRL_NUM_PIN;  in airoha_irq_unmask()  local
2315 	u32 val = BIT(2 * offset);  in airoha_irq_unmask()  local
2347 	u8 offset = data->hwirq % AIROHA_REG_GPIOCTRL_NUM_PIN;  in airoha_irq_mask()  local
2397 			u32 offset = irq + i * AIROHA_PIN_BANK_SIZE;  in airoha_irq_handler()  local
2572 				   int conf_size, int pin, u32 *val)  in airoha_pinctrl_get_conf()
2590 				   int conf_size, int pin, u32 val)  in airoha_pinctrl_set_conf()
2606 #define airoha_pinctrl_get_pullup_conf(pinctrl, pin, val)			\  argument
2610 #define airoha_pinctrl_get_pulldown_conf(pinctrl, pin, val)			\  argument
2614 #define airoha_pinctrl_get_drive_e2_conf(pinctrl, pin, val)			\  argument
2618 #define airoha_pinctrl_get_drive_e4_conf(pinctrl, pin, val)			\  argument
2622 #define airoha_pinctrl_get_pcie_rst_od_conf(pinctrl, pin, val)			\  argument
2626 #define airoha_pinctrl_set_pullup_conf(pinctrl, pin, val)			\  argument
2630 #define airoha_pinctrl_set_pulldown_conf(pinctrl, pin, val)			\  argument
2634 #define airoha_pinctrl_set_drive_e2_conf(pinctrl, pin, val)			\  argument
2638 #define airoha_pinctrl_set_drive_e4_conf(pinctrl, pin, val)			\  argument
2642 #define airoha_pinctrl_set_pcie_rst_od_conf(pinctrl, pin, val)			\  argument
2650 	u32 val, mask;  in airoha_pinconf_get_direction()  local