Lines Matching +full:bit +full:- +full:shift
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2017 Broadcom
9 * chipCommonG GPIO controller, and the always-on GPIO controller. Basic
30 #include <linux/pinctrl/pinconf-generic.h>
34 #include "../pinctrl-utils.h"
68 #define GPIO_DRV_STRENGTH_BIT_MASK ((1 << GPIO_DRV_STRENGTH_BITS) - 1)
125 * Mapping from PINCONF pins to GPIO pins is 1-to-1
133 * iproc_set_bit - set or clear one bit (corresponding to the GPIO pin) in a
145 unsigned int shift = IPROC_GPIO_SHIFT(gpio); in iproc_set_bit() local
148 val = readl(chip->base + offset); in iproc_set_bit()
150 val |= BIT(shift); in iproc_set_bit()
152 val &= ~BIT(shift); in iproc_set_bit()
153 writel(val, chip->base + offset); in iproc_set_bit()
160 unsigned int shift = IPROC_GPIO_SHIFT(gpio); in iproc_get_bit() local
162 return !!(readl(chip->base + offset) & BIT(shift)); in iproc_get_bit()
170 int i, bit; in iproc_gpio_irq_handler() local
175 for (i = 0; i < chip->num_banks; i++) { in iproc_gpio_irq_handler()
176 unsigned long val = readl(chip->base + (i * GPIO_BANK_SIZE) + in iproc_gpio_irq_handler()
179 for_each_set_bit(bit, &val, NGPIOS_PER_BANK) { in iproc_gpio_irq_handler()
180 unsigned pin = NGPIOS_PER_BANK * i + bit; in iproc_gpio_irq_handler()
186 writel(BIT(bit), chip->base + (i * GPIO_BANK_SIZE) + in iproc_gpio_irq_handler()
189 generic_handle_domain_irq(gc->irq.domain, pin); in iproc_gpio_irq_handler()
201 unsigned gpio = d->hwirq; in iproc_gpio_irq_ack()
204 unsigned int shift = IPROC_GPIO_SHIFT(gpio); in iproc_gpio_irq_ack() local
205 u32 val = BIT(shift); in iproc_gpio_irq_ack()
207 writel(val, chip->base + offset); in iproc_gpio_irq_ack()
211 * iproc_gpio_irq_set_mask - mask/unmask a GPIO interrupt
231 raw_spin_lock_irqsave(&chip->lock, flags); in iproc_gpio_irq_mask()
233 raw_spin_unlock_irqrestore(&chip->lock, flags); in iproc_gpio_irq_mask()
244 raw_spin_lock_irqsave(&chip->lock, flags); in iproc_gpio_irq_unmask()
246 raw_spin_unlock_irqrestore(&chip->lock, flags); in iproc_gpio_irq_unmask()
253 unsigned gpio = d->hwirq; in iproc_gpio_irq_set_type()
281 dev_err(chip->dev, "invalid GPIO IRQ type 0x%x\n", in iproc_gpio_irq_set_type()
283 return -EINVAL; in iproc_gpio_irq_set_type()
286 raw_spin_lock_irqsave(&chip->lock, flags); in iproc_gpio_irq_set_type()
298 raw_spin_unlock_irqrestore(&chip->lock, flags); in iproc_gpio_irq_set_type()
300 dev_dbg(chip->dev, in iproc_gpio_irq_set_type()
312 seq_puts(p, dev_name(chip->dev)); in iproc_gpio_irq_print_chip()
335 if (!chip->pinmux_is_supported) in iproc_gpio_request()
345 if (!chip->pinmux_is_supported) in iproc_gpio_free()
356 raw_spin_lock_irqsave(&chip->lock, flags); in iproc_gpio_direction_input()
358 raw_spin_unlock_irqrestore(&chip->lock, flags); in iproc_gpio_direction_input()
360 dev_dbg(chip->dev, "gpio:%u set input\n", gpio); in iproc_gpio_direction_input()
371 raw_spin_lock_irqsave(&chip->lock, flags); in iproc_gpio_direction_output()
374 raw_spin_unlock_irqrestore(&chip->lock, flags); in iproc_gpio_direction_output()
376 dev_dbg(chip->dev, "gpio:%u set output, value:%d\n", gpio, val); in iproc_gpio_direction_output()
385 unsigned int shift = IPROC_GPIO_SHIFT(gpio); in iproc_gpio_get_direction() local
387 if (readl(chip->base + offset) & BIT(shift)) in iproc_gpio_get_direction()
398 raw_spin_lock_irqsave(&chip->lock, flags); in iproc_gpio_set()
400 raw_spin_unlock_irqrestore(&chip->lock, flags); in iproc_gpio_set()
402 dev_dbg(chip->dev, "gpio:%u set, value:%d\n", gpio, val); in iproc_gpio_set()
410 unsigned int shift = IPROC_GPIO_SHIFT(gpio); in iproc_gpio_get() local
412 return !!(readl(chip->base + offset) & BIT(shift)); in iproc_gpio_get()
431 if (!chip->nr_pinconf_disable) in iproc_pinconf_param_is_disabled()
434 for (i = 0; i < chip->nr_pinconf_disable; i++) in iproc_pinconf_param_is_disabled()
435 if (chip->pinconf_disable[i] == param) in iproc_pinconf_param_is_disabled()
445 unsigned int bit, nbits = 0; in iproc_pinconf_disable_map_create() local
448 for_each_set_bit(bit, &disable_mask, map_size) in iproc_pinconf_disable_map_create()
458 chip->pinconf_disable = devm_kcalloc(chip->dev, nbits, in iproc_pinconf_disable_map_create()
459 sizeof(*chip->pinconf_disable), in iproc_pinconf_disable_map_create()
461 if (!chip->pinconf_disable) in iproc_pinconf_disable_map_create()
462 return -ENOMEM; in iproc_pinconf_disable_map_create()
464 chip->nr_pinconf_disable = nbits; in iproc_pinconf_disable_map_create()
468 for_each_set_bit(bit, &disable_mask, map_size) in iproc_pinconf_disable_map_create()
469 chip->pinconf_disable[nbits++] = iproc_pinconf_disable_map[bit]; in iproc_pinconf_disable_map_create()
501 unsigned int shift; in iproc_gpio_set_pull() local
504 raw_spin_lock_irqsave(&chip->lock, flags); in iproc_gpio_set_pull()
505 if (chip->io_ctrl_type == IOCTRL_TYPE_CDRU) { in iproc_gpio_set_pull()
506 base = chip->io_ctrl; in iproc_gpio_set_pull()
507 shift = IPROC_GPIO_SHIFT(gpio); in iproc_gpio_set_pull()
512 /* no pull-up or pull-down */ in iproc_gpio_set_pull()
513 val_1 &= ~BIT(shift); in iproc_gpio_set_pull()
514 val_2 &= ~BIT(shift); in iproc_gpio_set_pull()
516 val_1 |= BIT(shift); in iproc_gpio_set_pull()
517 val_2 &= ~BIT(shift); in iproc_gpio_set_pull()
519 val_1 &= ~BIT(shift); in iproc_gpio_set_pull()
520 val_2 |= BIT(shift); in iproc_gpio_set_pull()
536 raw_spin_unlock_irqrestore(&chip->lock, flags); in iproc_gpio_set_pull()
537 dev_dbg(chip->dev, "gpio:%u set pullup:%d\n", gpio, pull_up); in iproc_gpio_set_pull()
547 unsigned int shift; in iproc_gpio_get_pull() local
550 raw_spin_lock_irqsave(&chip->lock, flags); in iproc_gpio_get_pull()
551 if (chip->io_ctrl_type == IOCTRL_TYPE_CDRU) { in iproc_gpio_get_pull()
552 base = chip->io_ctrl; in iproc_gpio_get_pull()
553 shift = IPROC_GPIO_SHIFT(gpio); in iproc_gpio_get_pull()
555 val_1 = readl(base + IPROC_GPIO_PULL_UP_OFFSET) & BIT(shift); in iproc_gpio_get_pull()
556 val_2 = readl(base + IPROC_GPIO_PULL_DN_OFFSET) & BIT(shift); in iproc_gpio_get_pull()
565 raw_spin_unlock_irqrestore(&chip->lock, flags); in iproc_gpio_get_pull()
568 #define DRV_STRENGTH_OFFSET(gpio, bit, type) ((type) == IOCTRL_TYPE_AON ? \ argument
569 ((2 - (bit)) * 4 + IPROC_GPIO_DRV_CTRL_OFFSET) : \
571 ((bit) * 4 + IPROC_GPIO_DRV_CTRL_OFFSET) : \
572 ((bit) * 4 + IPROC_GPIO_REG(gpio, IPROC_GPIO_ASIU_DRV0_CTRL_OFFSET)))
578 unsigned int i, offset, shift; in iproc_gpio_set_strength() local
584 return -ENOTSUPP; in iproc_gpio_set_strength()
586 if (chip->io_ctrl) { in iproc_gpio_set_strength()
587 base = chip->io_ctrl; in iproc_gpio_set_strength()
589 base = chip->base; in iproc_gpio_set_strength()
592 shift = IPROC_GPIO_SHIFT(gpio); in iproc_gpio_set_strength()
594 dev_dbg(chip->dev, "gpio:%u set drive strength:%d mA\n", gpio, in iproc_gpio_set_strength()
597 raw_spin_lock_irqsave(&chip->lock, flags); in iproc_gpio_set_strength()
598 strength = (strength / 2) - 1; in iproc_gpio_set_strength()
600 offset = DRV_STRENGTH_OFFSET(gpio, i, chip->io_ctrl_type); in iproc_gpio_set_strength()
602 val &= ~BIT(shift); in iproc_gpio_set_strength()
603 val |= ((strength >> i) & 0x1) << shift; in iproc_gpio_set_strength()
606 raw_spin_unlock_irqrestore(&chip->lock, flags); in iproc_gpio_set_strength()
615 unsigned int i, offset, shift; in iproc_gpio_get_strength() local
619 if (chip->io_ctrl) { in iproc_gpio_get_strength()
620 base = chip->io_ctrl; in iproc_gpio_get_strength()
622 base = chip->base; in iproc_gpio_get_strength()
625 shift = IPROC_GPIO_SHIFT(gpio); in iproc_gpio_get_strength()
627 raw_spin_lock_irqsave(&chip->lock, flags); in iproc_gpio_get_strength()
630 offset = DRV_STRENGTH_OFFSET(gpio, i, chip->io_ctrl_type); in iproc_gpio_get_strength()
631 val = readl(base + offset) & BIT(shift); in iproc_gpio_get_strength()
632 val >>= shift; in iproc_gpio_get_strength()
638 raw_spin_unlock_irqrestore(&chip->lock, flags); in iproc_gpio_get_strength()
654 return -ENOTSUPP; in iproc_pin_config_get()
662 return -EINVAL; in iproc_pin_config_get()
669 return -EINVAL; in iproc_pin_config_get()
676 return -EINVAL; in iproc_pin_config_get()
687 return -ENOTSUPP; in iproc_pin_config_get()
690 return -ENOTSUPP; in iproc_pin_config_get()
700 int ret = -ENOTSUPP; in iproc_pin_config_set()
706 return -ENOTSUPP; in iproc_pin_config_set()
736 dev_err(chip->dev, "invalid configuration\n"); in iproc_pin_config_set()
737 return -ENOTSUPP; in iproc_pin_config_set()
755 * Here a local pinctrl device is created with simple 1-to-1 pin mapping to the
760 struct pinctrl_desc *pctldesc = &chip->pctldesc; in iproc_gpio_register_pinconf()
762 struct gpio_chip *gc = &chip->gc; in iproc_gpio_register_pinconf()
765 pins = devm_kcalloc(chip->dev, gc->ngpio, sizeof(*pins), GFP_KERNEL); in iproc_gpio_register_pinconf()
767 return -ENOMEM; in iproc_gpio_register_pinconf()
769 for (i = 0; i < gc->ngpio; i++) { in iproc_gpio_register_pinconf()
771 pins[i].name = devm_kasprintf(chip->dev, GFP_KERNEL, in iproc_gpio_register_pinconf()
772 "gpio-%d", i); in iproc_gpio_register_pinconf()
774 return -ENOMEM; in iproc_gpio_register_pinconf()
777 pctldesc->name = dev_name(chip->dev); in iproc_gpio_register_pinconf()
778 pctldesc->pctlops = &iproc_pctrl_ops; in iproc_gpio_register_pinconf()
779 pctldesc->pins = pins; in iproc_gpio_register_pinconf()
780 pctldesc->npins = gc->ngpio; in iproc_gpio_register_pinconf()
781 pctldesc->confops = &iproc_pconf_ops; in iproc_gpio_register_pinconf()
783 chip->pctl = devm_pinctrl_register(chip->dev, pctldesc, chip); in iproc_gpio_register_pinconf()
784 if (IS_ERR(chip->pctl)) { in iproc_gpio_register_pinconf()
785 dev_err(chip->dev, "unable to register pinctrl device\n"); in iproc_gpio_register_pinconf()
786 return PTR_ERR(chip->pctl); in iproc_gpio_register_pinconf()
793 { .compatible = "brcm,iproc-gpio" },
794 { .compatible = "brcm,cygnus-ccm-gpio" },
795 { .compatible = "brcm,cygnus-asiu-gpio" },
796 { .compatible = "brcm,cygnus-crmu-gpio" },
797 { .compatible = "brcm,iproc-nsp-gpio" },
798 { .compatible = "brcm,iproc-stingray-gpio" },
804 struct device *dev = &pdev->dev; in iproc_gpio_probe()
814 if (of_device_is_compatible(dev->of_node, "brcm,iproc-nsp-gpio")) in iproc_gpio_probe()
815 pinconf_disable_mask = BIT(IPROC_PINCONF_DRIVE_STRENGTH); in iproc_gpio_probe()
817 else if (of_device_is_compatible(dev->of_node, in iproc_gpio_probe()
818 "brcm,iproc-stingray-gpio")) in iproc_gpio_probe()
823 return -ENOMEM; in iproc_gpio_probe()
825 chip->dev = dev; in iproc_gpio_probe()
828 chip->base = devm_platform_ioremap_resource(pdev, 0); in iproc_gpio_probe()
829 if (IS_ERR(chip->base)) { in iproc_gpio_probe()
831 return PTR_ERR(chip->base); in iproc_gpio_probe()
836 chip->io_ctrl = devm_ioremap_resource(dev, res); in iproc_gpio_probe()
837 if (IS_ERR(chip->io_ctrl)) in iproc_gpio_probe()
838 return PTR_ERR(chip->io_ctrl); in iproc_gpio_probe()
839 if (of_device_is_compatible(dev->of_node, in iproc_gpio_probe()
840 "brcm,cygnus-ccm-gpio")) in iproc_gpio_probe()
846 chip->io_ctrl_type = io_ctrl_type; in iproc_gpio_probe()
848 if (of_property_read_u32(dev->of_node, "ngpios", &ngpios)) { in iproc_gpio_probe()
849 dev_err(&pdev->dev, "missing ngpios DT property\n"); in iproc_gpio_probe()
850 return -ENODEV; in iproc_gpio_probe()
853 raw_spin_lock_init(&chip->lock); in iproc_gpio_probe()
855 gc = &chip->gc; in iproc_gpio_probe()
856 gc->base = -1; in iproc_gpio_probe()
857 gc->ngpio = ngpios; in iproc_gpio_probe()
858 chip->num_banks = (ngpios + NGPIOS_PER_BANK - 1) / NGPIOS_PER_BANK; in iproc_gpio_probe()
859 gc->label = dev_name(dev); in iproc_gpio_probe()
860 gc->parent = dev; in iproc_gpio_probe()
861 gc->request = iproc_gpio_request; in iproc_gpio_probe()
862 gc->free = iproc_gpio_free; in iproc_gpio_probe()
863 gc->direction_input = iproc_gpio_direction_input; in iproc_gpio_probe()
864 gc->direction_output = iproc_gpio_direction_output; in iproc_gpio_probe()
865 gc->get_direction = iproc_gpio_get_direction; in iproc_gpio_probe()
866 gc->set = iproc_gpio_set; in iproc_gpio_probe()
867 gc->get = iproc_gpio_get; in iproc_gpio_probe()
869 chip->pinmux_is_supported = of_property_read_bool(dev->of_node, in iproc_gpio_probe()
870 "gpio-ranges"); in iproc_gpio_probe()
877 girq = &gc->irq; in iproc_gpio_probe()
879 girq->parent_handler = iproc_gpio_irq_handler; in iproc_gpio_probe()
880 girq->num_parents = 1; in iproc_gpio_probe()
881 girq->parents = devm_kcalloc(dev, 1, in iproc_gpio_probe()
882 sizeof(*girq->parents), in iproc_gpio_probe()
884 if (!girq->parents) in iproc_gpio_probe()
885 return -ENOMEM; in iproc_gpio_probe()
886 girq->parents[0] = irq; in iproc_gpio_probe()
887 girq->default_type = IRQ_TYPE_NONE; in iproc_gpio_probe()
888 girq->handler = handle_bad_irq; in iproc_gpio_probe()
923 .name = "iproc-gpio",