173 static inline void hi3670_apb_phy_writel(struct hi3670_pcie_phy *phy, u32 val,  in hi3670_apb_phy_writel()
185 					  u32 val, u32 mask, u32 reg)  in hi3670_apb_phy_updatel()
196 						u32 val, u32 reg)  in kirin_apb_natural_phy_writel()
209 	u32 val;  in hi3670_pcie_phy_oe_enable()  local
240 	u32 val;  in hi3670_pcie_set_eyeparam()  local
285 	u32 val;  in hi3670_pcie_natural_cfg()  local
342 	u32 val;  in hi3670_pcie_pll_ctrl()  local
379 static void hi3670_pcie_hp_debounce_gt(struct hi3670_pcie_phy *phy, bool open)  in hi3670_pcie_hp_debounce_gt()
391 static void hi3670_pcie_phyref_gt(struct hi3670_pcie_phy *phy, bool open)  in hi3670_pcie_phyref_gt()
393 	unsigned int val;  in hi3670_pcie_phyref_gt()  local
410 	unsigned int val;  in hi3670_pcie_oe_ctrl()  local
434 static void hi3670_pcie_ioref_gt(struct hi3670_pcie_phy *phy, bool open)  in hi3670_pcie_ioref_gt()
436 	unsigned int val;  in hi3670_pcie_ioref_gt()  local
511 	u32 val;  in is_pipe_clk_stable()  local
533 	unsigned int val = NOC_PW_MASK;  in hi3670_pcie_noc_power()  local
668 	int val, ret;  in hi3670_pcie_phy_power_on()  local