1 // SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
13 #include <linux/phy/phy-mipi-dphy.h>
81 	struct cdns_dphy_rx *dphy = phy_get_drvdata(phy);  in cdns_dphy_rx_power_on()  local
83 	/* Start RX state machine. */  in cdns_dphy_rx_power_on()
87 	       dphy->regs + DPHY_CMN_SSM);  in cdns_dphy_rx_power_on()
94 	struct cdns_dphy_rx *dphy = phy_get_drvdata(phy);  in cdns_dphy_rx_power_off()  local
96 	writel(0, dphy->regs + DPHY_CMN_SSM);  in cdns_dphy_rx_power_off()
106 	/* Since CSI-2 clock is DDR, the bit rate is twice the clock rate. */  in cdns_dphy_rx_get_band_ctrl()
110 		return -EOPNOTSUPP;  in cdns_dphy_rx_get_band_ctrl()
116 	return -EOPNOTSUPP;  in cdns_dphy_rx_get_band_ctrl()
128 static int cdns_dphy_rx_wait_lane_ready(struct cdns_dphy_rx *dphy,  in cdns_dphy_rx_wait_lane_ready()  argument
135 	void __iomem *reg = dphy->regs;  in cdns_dphy_rx_wait_lane_ready()
171 	struct cdns_dphy_rx *dphy = phy_get_drvdata(phy);  in cdns_dphy_rx_configure()  local
172 	unsigned int reg, lanes = opts->mipi_dphy.lanes;  in cdns_dphy_rx_configure()
178 	if (soc && soc->data)  in cdns_dphy_rx_configure()
179 		soc_data = soc->data;  in cdns_dphy_rx_configure()
180 	if (!soc || (soc_data && !soc_data->has_hw_cmn_rstb)) {  in cdns_dphy_rx_configure()
182 		writel(reg, dphy->regs + DPHY_LANE);  in cdns_dphy_rx_configure()
187 		return -EINVAL;  in cdns_dphy_rx_configure()
189 	band_ctrl = cdns_dphy_rx_get_band_ctrl(opts->mipi_dphy.hs_clk_rate);  in cdns_dphy_rx_configure()
195 	writel(reg, dphy->regs + DPHY_BAND_CFG);  in cdns_dphy_rx_configure()
198 	 * Set the required power island phase 2 time. This is mandated by DPHY  in cdns_dphy_rx_configure()
202 	writel(reg, dphy->regs + DPHY_POWER_ISLAND_EN_DATA);  in cdns_dphy_rx_configure()
204 	writel(reg, dphy->regs + DPHY_POWER_ISLAND_EN_CLK);  in cdns_dphy_rx_configure()
206 	ret = cdns_dphy_rx_wait_lane_ready(dphy, lanes);  in cdns_dphy_rx_configure()
208 		dev_err(dphy->dev, "DPHY wait for lane ready timeout\n");  in cdns_dphy_rx_configure()
221 		return -EINVAL;  in cdns_dphy_rx_validate()
223 	ret = cdns_dphy_rx_get_band_ctrl(opts->mipi_dphy.hs_clk_rate);  in cdns_dphy_rx_validate()
227 	return phy_mipi_dphy_config_validate(&opts->mipi_dphy);  in cdns_dphy_rx_validate()
239 	struct device *dev = &pdev->dev;  in cdns_dphy_rx_probe()
241 	struct cdns_dphy_rx *dphy;  in cdns_dphy_rx_probe()  local
243 	dphy = devm_kzalloc(dev, sizeof(*dphy), GFP_KERNEL);  in cdns_dphy_rx_probe()
244 	if (!dphy)  in cdns_dphy_rx_probe()
245 		return -ENOMEM;  in cdns_dphy_rx_probe()
247 	dev_set_drvdata(dev, dphy);  in cdns_dphy_rx_probe()
248 	dphy->dev = dev;  in cdns_dphy_rx_probe()
250 	dphy->regs = devm_platform_ioremap_resource(pdev, 0);  in cdns_dphy_rx_probe()
251 	if (IS_ERR(dphy->regs))  in cdns_dphy_rx_probe()
252 		return PTR_ERR(dphy->regs);  in cdns_dphy_rx_probe()
254 	dphy->phy = devm_phy_create(dev, NULL, &cdns_dphy_rx_ops);  in cdns_dphy_rx_probe()
255 	if (IS_ERR(dphy->phy)) {  in cdns_dphy_rx_probe()
256 		dev_err(dev, "Failed to create PHY: %ld\n", PTR_ERR(dphy->phy));  in cdns_dphy_rx_probe()
257 		return PTR_ERR(dphy->phy);  in cdns_dphy_rx_probe()
260 	phy_set_drvdata(dphy->phy, dphy);  in cdns_dphy_rx_probe()
272 	{ .compatible = "cdns,dphy-rx" },
280 		.name		= "cdns-mipi-dphy-rx",
287 MODULE_DESCRIPTION("Cadence D-PHY Rx Driver");