Lines Matching +full:cpu +full:- +full:cfg
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2022-2024 Arm Limited
3 // NI-700 Network-on-Chip PMU driver
9 #include <linux/io-64-nonatomic-lo-hi.h>
62 #define NI_EVENT_TYPE(event) FIELD_GET(NI_CONFIG_TYPE, (event)->attr.config)
63 #define NI_EVENT_NODEID(event) FIELD_GET(NI_CONFIG_NODEID, (event)->attr.config)
64 #define NI_EVENT_EVENTID(event) FIELD_GET(NI_CONFIG_EVENTID, (event)->attr.config)
107 int cpu; member
124 #define cd_to_ni(cd) container_of((cd), struct arm_ni, cds[(cd)->id])
128 for (struct arm_ni_unit *u = cd->units; u < cd->units + cd->num_units; u++)
148 if (eattr->type == NI_PMU) in arm_ni_event_show()
149 return sysfs_emit(buf, "type=0x%x\n", eattr->type); in arm_ni_event_show()
151 return sysfs_emit(buf, "type=0x%x,eventid=?,nodeid=?\n", eattr->type); in arm_ni_event_show()
164 if (unit->type == eattr->type && unit->ns) in arm_ni_event_attr_is_visible()
165 return attr->mode; in arm_ni_event_attr_is_visible()
203 return sysfs_emit(buf, "config:%*pbl\n", 64, &fmt->field); in arm_ni_format_show()
223 return cpumap_print_to_pagebuf(true, buf, cpumask_of(cd->cpu)); in arm_ni_cpumask_show()
233 u32 reg = readl_relaxed(ni->base + NI_PERIPHERAL_ID2); in arm_ni_identifier_show()
236 return sysfs_emit(buf, "%03x%02x\n", ni->part, version); in arm_ni_identifier_show()
261 writel_relaxed(NI_PMCR_ENABLE, pmu_to_cd(pmu)->pmu_base + NI_PMCR); in arm_ni_pmu_enable()
266 writel_relaxed(0, pmu_to_cd(pmu)->pmu_base + NI_PMCR); in arm_ni_pmu_disable()
280 val->ccnt++; in arm_ni_val_count_event()
281 return val->ccnt <= 1; in arm_ni_val_count_event()
284 val->evcnt++; in arm_ni_val_count_event()
285 return val->evcnt <= NI_NUM_COUNTERS; in arm_ni_val_count_event()
290 struct perf_event *sibling, *leader = event->group_leader; in arm_ni_validate_group()
298 return -EINVAL; in arm_ni_validate_group()
302 return -EINVAL; in arm_ni_validate_group()
309 struct arm_ni_cd *cd = pmu_to_cd(event->pmu); in arm_ni_event_init()
311 if (event->attr.type != event->pmu->type) in arm_ni_event_init()
312 return -ENOENT; in arm_ni_event_init()
315 return -EINVAL; in arm_ni_event_init()
317 event->cpu = cd->cpu; in arm_ni_event_init()
322 if (unit->type == NI_EVENT_TYPE(event) && in arm_ni_event_init()
323 unit->id == NI_EVENT_NODEID(event) && unit->ns) { in arm_ni_event_init()
324 event->hw.config_base = (unsigned long)unit; in arm_ni_event_init()
328 return -EINVAL; in arm_ni_event_init()
336 u_new = readl_relaxed(cd->pmu_base + NI_PMCCNTR_U); in arm_ni_read_ccnt()
339 l = readl_relaxed(cd->pmu_base + NI_PMCCNTR_L); in arm_ni_read_ccnt()
340 u_new = readl_relaxed(cd->pmu_base + NI_PMCCNTR_U); in arm_ni_read_ccnt()
341 } while (u_new != u_old && --retries); in arm_ni_read_ccnt()
349 struct arm_ni_cd *cd = pmu_to_cd(event->pmu); in arm_ni_event_read()
350 struct hw_perf_event *hw = &event->hw; in arm_ni_event_read()
352 bool ccnt = hw->idx == NI_CCNT_IDX; in arm_ni_event_read()
355 prev = local64_read(&hw->prev_count); in arm_ni_event_read()
359 count = readl_relaxed(cd->pmu_base + NI_PMEVCNTR(hw->idx)); in arm_ni_event_read()
360 } while (local64_cmpxchg(&hw->prev_count, prev, count) != prev); in arm_ni_event_read()
362 count -= prev; in arm_ni_event_read()
365 local64_add(count, &event->count); in arm_ni_event_read()
370 struct arm_ni_cd *cd = pmu_to_cd(event->pmu); in arm_ni_event_start()
372 writel_relaxed(1U << event->hw.idx, cd->pmu_base + NI_PMCNTENSET); in arm_ni_event_start()
377 struct arm_ni_cd *cd = pmu_to_cd(event->pmu); in arm_ni_event_stop()
379 writel_relaxed(1U << event->hw.idx, cd->pmu_base + NI_PMCNTENCLR); in arm_ni_event_stop()
386 local64_set(&cd->ccnt->hw.prev_count, S64_MIN); in arm_ni_init_ccnt()
387 lo_hi_writeq_relaxed(S64_MIN, cd->pmu_base + NI_PMCCNTR_L); in arm_ni_init_ccnt()
392 local64_set(&cd->evcnt[idx]->hw.prev_count, S32_MIN); in arm_ni_init_evcnt()
393 writel_relaxed(S32_MIN, cd->pmu_base + NI_PMEVCNTR(idx)); in arm_ni_init_evcnt()
398 struct arm_ni_cd *cd = pmu_to_cd(event->pmu); in arm_ni_event_add()
399 struct hw_perf_event *hw = &event->hw; in arm_ni_event_add()
405 if (cd->ccnt) in arm_ni_event_add()
406 return -ENOSPC; in arm_ni_event_add()
407 hw->idx = NI_CCNT_IDX; in arm_ni_event_add()
408 cd->ccnt = event; in arm_ni_event_add()
411 hw->idx = 0; in arm_ni_event_add()
412 while (cd->evcnt[hw->idx]) { in arm_ni_event_add()
413 if (++hw->idx == NI_NUM_COUNTERS) in arm_ni_event_add()
414 return -ENOSPC; in arm_ni_event_add()
416 cd->evcnt[hw->idx] = event; in arm_ni_event_add()
417 unit = (void *)hw->config_base; in arm_ni_event_add()
418 unit->event[hw->idx] = NI_EVENT_EVENTID(event); in arm_ni_event_add()
419 arm_ni_init_evcnt(cd, hw->idx); in arm_ni_event_add()
420 lo_hi_writeq_relaxed(le64_to_cpu(unit->pmusel), unit->pmusela); in arm_ni_event_add()
424 writel_relaxed(reg, cd->pmu_base + NI_PMEVTYPER(hw->idx)); in arm_ni_event_add()
433 struct arm_ni_cd *cd = pmu_to_cd(event->pmu); in arm_ni_event_del()
434 struct hw_perf_event *hw = &event->hw; in arm_ni_event_del()
438 if (hw->idx == NI_CCNT_IDX) in arm_ni_event_del()
439 cd->ccnt = NULL; in arm_ni_event_del()
441 cd->evcnt[hw->idx] = NULL; in arm_ni_event_del()
448 u32 reg = readl_relaxed(cd->pmu_base + NI_PMOVSCLR); in arm_ni_handle_irq()
452 if (!(WARN_ON(!cd->ccnt))) { in arm_ni_handle_irq()
453 arm_ni_event_read(cd->ccnt); in arm_ni_handle_irq()
461 if (!(WARN_ON(!cd->evcnt[i]))) { in arm_ni_handle_irq()
462 arm_ni_event_read(cd->evcnt[i]); in arm_ni_handle_irq()
466 writel_relaxed(reg, cd->pmu_base + NI_PMOVSCLR); in arm_ni_handle_irq()
472 struct arm_ni_cd *cd = ni->cds + node->id; in arm_ni_init_cd()
476 cd->id = node->id; in arm_ni_init_cd()
477 cd->num_units = node->num_components; in arm_ni_init_cd()
478 cd->units = devm_kcalloc(ni->dev, cd->num_units, sizeof(*(cd->units)), GFP_KERNEL); in arm_ni_init_cd()
479 if (!cd->units) in arm_ni_init_cd()
480 return -ENOMEM; in arm_ni_init_cd()
482 for (int i = 0; i < cd->num_units; i++) { in arm_ni_init_cd()
483 u32 reg = readl_relaxed(node->base + NI_CHILD_PTR(i)); in arm_ni_init_cd()
484 void __iomem *unit_base = ni->base + reg; in arm_ni_init_cd()
485 struct arm_ni_unit *unit = cd->units + i; in arm_ni_init_cd()
488 unit->type = FIELD_GET(NI_NODE_TYPE_NODE_TYPE, reg); in arm_ni_init_cd()
489 unit->id = FIELD_GET(NI_NODE_TYPE_NODE_ID, reg); in arm_ni_init_cd()
491 switch (unit->type) { in arm_ni_init_cd()
495 dev_info(ni->dev, "No access to PMU %d\n", cd->id); in arm_ni_init_cd()
496 devm_kfree(ni->dev, cd->units); in arm_ni_init_cd()
499 unit->ns = true; in arm_ni_init_cd()
500 cd->pmu_base = unit_base; in arm_ni_init_cd()
507 unit->pmusela = unit_base + NI700_PMUSELA; in arm_ni_init_cd()
508 writel_relaxed(1, unit->pmusela); in arm_ni_init_cd()
509 if (readl_relaxed(unit->pmusela) != 1) in arm_ni_init_cd()
510 dev_info(ni->dev, "No access to node 0x%04x%04x\n", unit->id, unit->type); in arm_ni_init_cd()
512 unit->ns = true; in arm_ni_init_cd()
516 * e.g. FMU - thankfully bits 3:2 of FMU_ERR_FR0 are RES0 so in arm_ni_init_cd()
519 dev_dbg(ni->dev, "Mystery node 0x%04x%04x\n", unit->id, unit->type); in arm_ni_init_cd()
524 res_start += cd->pmu_base - ni->base; in arm_ni_init_cd()
525 if (!devm_request_mem_region(ni->dev, res_start, SZ_4K, dev_name(ni->dev))) { in arm_ni_init_cd()
526 dev_err(ni->dev, "Failed to request PMU region 0x%llx\n", res_start); in arm_ni_init_cd()
527 return -EBUSY; in arm_ni_init_cd()
531 cd->pmu_base + NI_PMCR); in arm_ni_init_cd()
532 writel_relaxed(U32_MAX, cd->pmu_base + NI_PMCNTENCLR); in arm_ni_init_cd()
533 writel_relaxed(U32_MAX, cd->pmu_base + NI_PMOVSCLR); in arm_ni_init_cd()
534 writel_relaxed(U32_MAX, cd->pmu_base + NI_PMINTENSET); in arm_ni_init_cd()
536 cd->irq = platform_get_irq(to_platform_device(ni->dev), cd->id); in arm_ni_init_cd()
537 if (cd->irq < 0) in arm_ni_init_cd()
538 return cd->irq; in arm_ni_init_cd()
540 err = devm_request_irq(ni->dev, cd->irq, arm_ni_handle_irq, in arm_ni_init_cd()
542 dev_name(ni->dev), cd); in arm_ni_init_cd()
546 cd->cpu = cpumask_local_spread(0, dev_to_node(ni->dev)); in arm_ni_init_cd()
547 cd->pmu = (struct pmu) { in arm_ni_init_cd()
549 .parent = ni->dev, in arm_ni_init_cd()
563 name = devm_kasprintf(ni->dev, GFP_KERNEL, "arm_ni_%d_cd_%d", ni->id, cd->id); in arm_ni_init_cd()
565 return -ENOMEM; in arm_ni_init_cd()
567 err = cpuhp_state_add_instance_nocalls(arm_ni_hp_state, &cd->cpuhp_node); in arm_ni_init_cd()
571 err = perf_pmu_register(&cd->pmu, name, -1); in arm_ni_init_cd()
573 cpuhp_state_remove_instance_nocalls(arm_ni_hp_state, &cd->cpuhp_node); in arm_ni_init_cd()
582 node->base = base; in arm_ni_probe_domain()
583 node->type = FIELD_GET(NI_NODE_TYPE_NODE_TYPE, reg); in arm_ni_probe_domain()
584 node->id = FIELD_GET(NI_NODE_TYPE_NODE_ID, reg); in arm_ni_probe_domain()
585 node->num_components = readl_relaxed(base + NI_CHILD_NODE_INFO); in arm_ni_probe_domain()
590 struct arm_ni_node cfg, vd, pd, cd; in arm_ni_probe() local
604 base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); in arm_ni_probe()
606 return -ENOMEM; in arm_ni_probe()
608 arm_ni_probe_domain(base, &cfg); in arm_ni_probe()
609 if (cfg.type != NI_GLOBAL) in arm_ni_probe()
610 return -ENODEV; in arm_ni_probe()
612 reg = readl_relaxed(cfg.base + NI_PERIPHERAL_ID0); in arm_ni_probe()
614 reg = readl_relaxed(cfg.base + NI_PERIPHERAL_ID1); in arm_ni_probe()
622 dev_WARN(&pdev->dev, "Unknown part number: 0x%03x, this may go badly\n", part); in arm_ni_probe()
627 for (int v = 0; v < cfg.num_components; v++) { in arm_ni_probe()
628 reg = readl_relaxed(cfg.base + NI_CHILD_PTR(v)); in arm_ni_probe()
637 ni = devm_kzalloc(&pdev->dev, struct_size(ni, cds, num_cds), GFP_KERNEL); in arm_ni_probe()
639 return -ENOMEM; in arm_ni_probe()
641 ni->dev = &pdev->dev; in arm_ni_probe()
642 ni->base = base; in arm_ni_probe()
643 ni->num_cds = num_cds; in arm_ni_probe()
644 ni->part = part; in arm_ni_probe()
645 ni->id = atomic_fetch_inc(&id); in arm_ni_probe()
647 for (int v = 0; v < cfg.num_components; v++) { in arm_ni_probe()
648 reg = readl_relaxed(cfg.base + NI_CHILD_PTR(v)); in arm_ni_probe()
658 ret = arm_ni_init_cd(ni, &cd, res->start); in arm_ni_probe()
672 for (int i = 0; i < ni->num_cds; i++) { in arm_ni_remove()
673 struct arm_ni_cd *cd = ni->cds + i; in arm_ni_remove()
675 if (!cd->pmu_base) in arm_ni_remove()
678 writel_relaxed(0, cd->pmu_base + NI_PMCR); in arm_ni_remove()
679 writel_relaxed(U32_MAX, cd->pmu_base + NI_PMINTENCLR); in arm_ni_remove()
680 perf_pmu_unregister(&cd->pmu); in arm_ni_remove()
681 cpuhp_state_remove_instance_nocalls(arm_ni_hp_state, &cd->cpuhp_node); in arm_ni_remove()
687 { .compatible = "arm,ni-700" },
703 .name = "arm-ni",
711 static void arm_ni_pmu_migrate(struct arm_ni_cd *cd, unsigned int cpu) in arm_ni_pmu_migrate() argument
713 perf_pmu_migrate_context(&cd->pmu, cd->cpu, cpu); in arm_ni_pmu_migrate()
714 irq_set_affinity(cd->irq, cpumask_of(cpu)); in arm_ni_pmu_migrate()
715 cd->cpu = cpu; in arm_ni_pmu_migrate()
718 static int arm_ni_pmu_online_cpu(unsigned int cpu, struct hlist_node *cpuhp_node) in arm_ni_pmu_online_cpu() argument
724 node = dev_to_node(cd_to_ni(cd)->dev); in arm_ni_pmu_online_cpu()
725 if (cpu_to_node(cd->cpu) != node && cpu_to_node(cpu) == node) in arm_ni_pmu_online_cpu()
726 arm_ni_pmu_migrate(cd, cpu); in arm_ni_pmu_online_cpu()
730 static int arm_ni_pmu_offline_cpu(unsigned int cpu, struct hlist_node *cpuhp_node) in arm_ni_pmu_offline_cpu() argument
737 if (cpu != cd->cpu) in arm_ni_pmu_offline_cpu()
740 node = dev_to_node(cd_to_ni(cd)->dev); in arm_ni_pmu_offline_cpu()
741 target = cpumask_any_and_but(cpumask_of_node(node), cpu_online_mask, cpu); in arm_ni_pmu_offline_cpu()
743 target = cpumask_any_but(cpu_online_mask, cpu); in arm_ni_pmu_offline_cpu()
779 MODULE_DESCRIPTION("Arm NI-700 PMU driver");