3  * PCI VPD support
41 /* VPD access through PCI 2.2+ VPD capability */
69 				pci_warn(dev, "failed VPD read at offset %zu\n",  in pci_vpd_size()
93 	pci_info(dev, "invalid VPD tag %#04x (size %zu) at offset %zu%s\n",  in pci_vpd_size()
101 	struct pci_vpd *vpd = &dev->vpd;  in pci_vpd_available()  local
103 	if (!vpd->cap)  in pci_vpd_available()
106 	if (vpd->len == 0 && check_size) {  in pci_vpd_available()
107 		vpd->len = pci_vpd_size(dev);  in pci_vpd_available()
108 		if (vpd->len == PCI_VPD_SZ_INVALID) {  in pci_vpd_available()
109 			vpd->cap = 0;  in pci_vpd_available()
120  * hardware. Since the VPD is often implemented by serial attachment to an
128 	struct pci_vpd *vpd = &dev->vpd;  in pci_vpd_wait()  local
135 		ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR,  in pci_vpd_wait()
151 …pci_warn(dev, "VPD access failed.  This is likely a firmware bug on this device.  Contact the card…  in pci_vpd_wait()
158 	struct pci_vpd *vpd = &dev->vpd;  in pci_vpd_read()  local
170 	max_len = check_size ? vpd->len : PCI_VPD_MAX_SIZE;  in pci_vpd_read()
180 	if (mutex_lock_killable(&vpd->lock))  in pci_vpd_read()
192 		ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,  in pci_vpd_read()
200 		ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA, &val);  in pci_vpd_read()
215 	mutex_unlock(&vpd->lock);  in pci_vpd_read()
222 	struct pci_vpd *vpd = &dev->vpd;  in pci_vpd_write()  local
234 	max_len = check_size ? vpd->len : PCI_VPD_MAX_SIZE;  in pci_vpd_write()
239 	if (mutex_lock_killable(&vpd->lock))  in pci_vpd_write()
243 		ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA,  in pci_vpd_write()
247 		ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,  in pci_vpd_write()
260 	mutex_unlock(&vpd->lock);  in pci_vpd_write()
266 	if (dev->vpd.len == PCI_VPD_SZ_INVALID)  in pci_vpd_init()
269 	dev->vpd.cap = pci_find_capability(dev, PCI_CAP_ID_VPD);  in pci_vpd_init()
270 	mutex_init(&dev->vpd.lock);  in pci_vpd_init()
320 static const BIN_ATTR(vpd, 0600, vpd_read, vpd_write, 0);
332 	if (!pdev->vpd.cap)  in vpd_attr_is_visible()
352 	len = dev->vpd.len;  in pci_vpd_alloc()
438  * @pos:	offset in VPD space
476  * @pos:	offset in VPD space
522 	const u8 *vpd = buf;  in pci_vpd_check_csum()  local
528 	if (rv_start == -ENOENT) /* no checksum in VPD */  in pci_vpd_check_csum()
537 		csum += vpd[rv_start--];  in pci_vpd_check_csum()
545  * Quirk non-zero PCI functions to route VPD access through function 0 for
546  * devices that share VPD resources between functions.  The functions are
560 	if (f0->vpd.cap && dev->class == f0->class &&  in quirk_f0_vpd_link()
570  * If a device follows the VPD format spec, the PCI core will not read or
571  * write past the VPD End Tag.  But some vendors do not follow the VPD
574  * so we don't touch VPD at all.
578 	dev->vpd.len = PCI_VPD_SZ_INVALID;  in quirk_blacklist_vpd()
579 	pci_warn(dev, FW_BUG "disabling VPD access (can't determine size of non-standard VPD format)\n");  in quirk_blacklist_vpd()
607 	 * If this is a T3-based adapter, there's a 1KB VPD area at offset  in quirk_chelsio_extend_vpd()
608 	 * 0xc00 which contains the preferred VPD values.  If this is a T4 or  in quirk_chelsio_extend_vpd()
609 	 * later based adapter, the special VPD is at offset 0x400 for the  in quirk_chelsio_extend_vpd()
610 	 * Physical Functions (the SR-IOV Virtual Functions have no VPD  in quirk_chelsio_extend_vpd()
611 	 * Capabilities).  The PCI VPD Access core routines will normally  in quirk_chelsio_extend_vpd()
612 	 * compute the size of the VPD by parsing the VPD Data Structure at  in quirk_chelsio_extend_vpd()
614 	 * to accesses these other VPD areas which are beyond those computed  in quirk_chelsio_extend_vpd()
618 		dev->vpd.len = 8192;  in quirk_chelsio_extend_vpd()
620 		dev->vpd.len = 2048;  in quirk_chelsio_extend_vpd()