Lines Matching +full:pcie +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe host controller driver for Freescale Layerscape SoCs
26 #include "pcie-designware.h"
29 #define PCIE_STRFMR1 0x71c /* Symbol Timer & Filter Mask Register1 */
30 #define PCIE_ABSERR 0x8d0 /* Bridge Slave Error Response Register */
31 #define PCIE_ABSERR_SETTING 0x9401 /* Forward error of non-posted request */
34 #define LS_PCIE_PF_MCR 0x2c
35 #define PF_MCR_PTOMR BIT(0)
39 #define SCFG_PEXPMWRCR(idx) (0x5c + (idx) * 0x64)
41 #define SCFG_PEXSFTRSTCR 0x190
45 #define SCFG_PEXPMECR 0x144
46 #define PEXPME(idx) BIT(31 - (idx) * 4)
49 #define LS_PCIE_LDBG 0x7fc
72 #define ls_pcie_pf_lut_readl_addr(addr) ls_pcie_pf_lut_readl(pcie, addr)
73 #define to_ls_pcie(x) dev_get_drvdata((x)->dev)
75 static bool ls_pcie_is_bridge(struct ls_pcie *pcie) in ls_pcie_is_bridge() argument
77 struct dw_pcie *pci = pcie->pci; in ls_pcie_is_bridge()
80 header_type = ioread8(pci->dbi_base + PCI_HEADER_TYPE); in ls_pcie_is_bridge()
86 /* Clear multi-function bit */
87 static void ls_pcie_clear_multifunction(struct ls_pcie *pcie) in ls_pcie_clear_multifunction() argument
89 struct dw_pcie *pci = pcie->pci; in ls_pcie_clear_multifunction()
91 iowrite8(PCI_HEADER_TYPE_BRIDGE, pci->dbi_base + PCI_HEADER_TYPE); in ls_pcie_clear_multifunction()
95 static void ls_pcie_drop_msg_tlp(struct ls_pcie *pcie) in ls_pcie_drop_msg_tlp() argument
98 struct dw_pcie *pci = pcie->pci; in ls_pcie_drop_msg_tlp()
100 val = ioread32(pci->dbi_base + PCIE_STRFMR1); in ls_pcie_drop_msg_tlp()
101 val &= 0xDFFFFFFF; in ls_pcie_drop_msg_tlp()
102 iowrite32(val, pci->dbi_base + PCIE_STRFMR1); in ls_pcie_drop_msg_tlp()
105 /* Forward error response of outbound non-posted requests */
106 static void ls_pcie_fix_error_response(struct ls_pcie *pcie) in ls_pcie_fix_error_response() argument
108 struct dw_pcie *pci = pcie->pci; in ls_pcie_fix_error_response()
110 iowrite32(PCIE_ABSERR_SETTING, pci->dbi_base + PCIE_ABSERR); in ls_pcie_fix_error_response()
113 static u32 ls_pcie_pf_lut_readl(struct ls_pcie *pcie, u32 off) in ls_pcie_pf_lut_readl() argument
115 if (pcie->big_endian) in ls_pcie_pf_lut_readl()
116 return ioread32be(pcie->pf_lut_base + off); in ls_pcie_pf_lut_readl()
118 return ioread32(pcie->pf_lut_base + off); in ls_pcie_pf_lut_readl()
121 static void ls_pcie_pf_lut_writel(struct ls_pcie *pcie, u32 off, u32 val) in ls_pcie_pf_lut_writel() argument
123 if (pcie->big_endian) in ls_pcie_pf_lut_writel()
124 iowrite32be(val, pcie->pf_lut_base + off); in ls_pcie_pf_lut_writel()
126 iowrite32(val, pcie->pf_lut_base + off); in ls_pcie_pf_lut_writel()
132 struct ls_pcie *pcie = to_ls_pcie(pci); in ls_pcie_send_turnoff_msg() local
136 val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_PF_MCR); in ls_pcie_send_turnoff_msg()
138 ls_pcie_pf_lut_writel(pcie, LS_PCIE_PF_MCR, val); in ls_pcie_send_turnoff_msg()
145 dev_err(pcie->pci->dev, "PME_Turn_off timeout\n"); in ls_pcie_send_turnoff_msg()
151 struct ls_pcie *pcie = to_ls_pcie(pci); in ls_pcie_exit_from_l2() local
159 val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_PF_MCR); in ls_pcie_exit_from_l2()
161 ls_pcie_pf_lut_writel(pcie, LS_PCIE_PF_MCR, val); in ls_pcie_exit_from_l2()
172 dev_err(pcie->pci->dev, "L2 exit timeout\n"); in ls_pcie_exit_from_l2()
180 struct ls_pcie *pcie = to_ls_pcie(pci); in ls_pcie_host_init() local
182 ls_pcie_fix_error_response(pcie); in ls_pcie_host_init()
185 ls_pcie_clear_multifunction(pcie); in ls_pcie_host_init()
188 ls_pcie_drop_msg_tlp(pcie); in ls_pcie_host_init()
190 return 0; in ls_pcie_host_init()
208 regmap_write_bits(scfg, reg, mask, 0); in scfg_pcie_send_turnoff_msg()
214 struct ls_pcie *pcie = to_ls_pcie(pci); in ls1021a_pcie_send_turnoff_msg() local
216 scfg_pcie_send_turnoff_msg(pcie->scfg, SCFG_PEXPMWRCR(pcie->index), PMXMTTURNOFF); in ls1021a_pcie_send_turnoff_msg()
223 regmap_write_bits(scfg, reg, mask, 0); in scfg_pcie_exit_from_l2()
225 return 0; in scfg_pcie_exit_from_l2()
231 struct ls_pcie *pcie = to_ls_pcie(pci); in ls1021a_pcie_exit_from_l2() local
233 return scfg_pcie_exit_from_l2(pcie->scfg, SCFG_PEXSFTRSTCR, PEXSR(pcie->index)); in ls1021a_pcie_exit_from_l2()
239 struct ls_pcie *pcie = to_ls_pcie(pci); in ls1043a_pcie_send_turnoff_msg() local
241 scfg_pcie_send_turnoff_msg(pcie->scfg, SCFG_PEXPMECR, PEXPME(pcie->index)); in ls1043a_pcie_send_turnoff_msg()
247 struct ls_pcie *pcie = to_ls_pcie(pci); in ls1043a_pcie_exit_from_l2() local
256 val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_LDBG); in ls1043a_pcie_exit_from_l2()
258 ls_pcie_pf_lut_writel(pcie, LS_PCIE_LDBG, val); in ls1043a_pcie_exit_from_l2()
260 val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_LDBG); in ls1043a_pcie_exit_from_l2()
262 ls_pcie_pf_lut_writel(pcie, LS_PCIE_LDBG, val); in ls1043a_pcie_exit_from_l2()
264 val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_LDBG); in ls1043a_pcie_exit_from_l2()
266 ls_pcie_pf_lut_writel(pcie, LS_PCIE_LDBG, val); in ls1043a_pcie_exit_from_l2()
268 val = ls_pcie_pf_lut_readl(pcie, LS_PCIE_LDBG); in ls1043a_pcie_exit_from_l2()
270 ls_pcie_pf_lut_writel(pcie, LS_PCIE_LDBG, val); in ls1043a_pcie_exit_from_l2()
272 return 0; in ls1043a_pcie_exit_from_l2()
298 .pf_lut_off = 0x10000,
306 .pf_lut_off = 0xc0000,
313 { .compatible = "fsl,ls1012a-pcie", .data = &layerscape_drvdata },
314 { .compatible = "fsl,ls1021a-pcie", .data = &ls1021a_drvdata },
315 { .compatible = "fsl,ls1028a-pcie", .data = &layerscape_drvdata },
316 { .compatible = "fsl,ls1043a-pcie", .data = &ls1043a_drvdata },
317 { .compatible = "fsl,ls1046a-pcie", .data = &layerscape_drvdata },
318 { .compatible = "fsl,ls2080a-pcie", .data = &layerscape_drvdata },
319 { .compatible = "fsl,ls2085a-pcie", .data = &layerscape_drvdata },
320 { .compatible = "fsl,ls2088a-pcie", .data = &layerscape_drvdata },
321 { .compatible = "fsl,ls1088a-pcie", .data = &layerscape_drvdata },
327 struct device *dev = &pdev->dev; in ls_pcie_probe()
329 struct ls_pcie *pcie; in ls_pcie_probe() local
333 pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL); in ls_pcie_probe()
334 if (!pcie) in ls_pcie_probe()
335 return -ENOMEM; in ls_pcie_probe()
339 return -ENOMEM; in ls_pcie_probe()
341 pcie->drvdata = of_device_get_match_data(dev); in ls_pcie_probe()
343 pci->dev = dev; in ls_pcie_probe()
344 pcie->pci = pci; in ls_pcie_probe()
345 pci->pp.ops = pcie->drvdata->ops; in ls_pcie_probe()
348 pci->dbi_base = devm_pci_remap_cfg_resource(dev, dbi_base); in ls_pcie_probe()
349 if (IS_ERR(pci->dbi_base)) in ls_pcie_probe()
350 return PTR_ERR(pci->dbi_base); in ls_pcie_probe()
352 pcie->big_endian = of_property_read_bool(dev->of_node, "big-endian"); in ls_pcie_probe()
354 pcie->pf_lut_base = pci->dbi_base + pcie->drvdata->pf_lut_off; in ls_pcie_probe()
356 if (pcie->drvdata->scfg_support) { in ls_pcie_probe()
357 pcie->scfg = in ls_pcie_probe()
358 syscon_regmap_lookup_by_phandle_args(dev->of_node, in ls_pcie_probe()
359 "fsl,pcie-scfg", 1, in ls_pcie_probe()
361 if (IS_ERR(pcie->scfg)) { in ls_pcie_probe()
363 return PTR_ERR(pcie->scfg); in ls_pcie_probe()
366 pcie->index = index[1]; in ls_pcie_probe()
369 if (!ls_pcie_is_bridge(pcie)) in ls_pcie_probe()
370 return -ENODEV; in ls_pcie_probe()
372 platform_set_drvdata(pdev, pcie); in ls_pcie_probe()
374 return dw_pcie_host_init(&pci->pp); in ls_pcie_probe()
379 struct ls_pcie *pcie = dev_get_drvdata(dev); in ls_pcie_suspend_noirq() local
381 if (!pcie->drvdata->pm_support) in ls_pcie_suspend_noirq()
382 return 0; in ls_pcie_suspend_noirq()
384 return dw_pcie_suspend_noirq(pcie->pci); in ls_pcie_suspend_noirq()
389 struct ls_pcie *pcie = dev_get_drvdata(dev); in ls_pcie_resume_noirq() local
392 if (!pcie->drvdata->pm_support) in ls_pcie_resume_noirq()
393 return 0; in ls_pcie_resume_noirq()
395 ret = pcie->drvdata->exit_from_l2(&pcie->pci->pp); in ls_pcie_resume_noirq()
399 return dw_pcie_resume_noirq(pcie->pci); in ls_pcie_resume_noirq()
409 .name = "layerscape-pcie",