1 // SPDX-License-Identifier: GPL-2.0
3  * pci-j721e - PCIe controller driver for TI's J721E SoCs
5  * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
10 #include <linux/clk-provider.h>
25 #include "pcie-cadence.h"
27 #define cdns_pcie_to_rc(p) container_of(p, struct cdns_pcie_rc, pcie)
29 #define ENABLE_REG_SYS_2	0x108
30 #define STATUS_REG_SYS_2	0x508
31 #define STATUS_CLR_REG_SYS_2	0x708
35 #define J721E_PCIE_USER_CMD_STATUS	0x4
36 #define LINK_TRAINING_ENABLE		BIT(0)
38 #define J721E_PCIE_USER_LINKSTATUS	0x14
39 #define LINK_STATUS			GENMASK(1, 0)
51 #define ACSPCIE_PAD_DISABLE_MASK	GENMASK(1, 0)
52 #define GENERATION_SEL_MASK		GENMASK(1, 0)
81 static inline u32 j721e_pcie_user_readl(struct j721e_pcie *pcie, u32 offset)  in j721e_pcie_user_readl()  argument
83 	return readl(pcie->user_cfg_base + offset);  in j721e_pcie_user_readl()
86 static inline void j721e_pcie_user_writel(struct j721e_pcie *pcie, u32 offset,  in j721e_pcie_user_writel()  argument
89 	writel(value, pcie->user_cfg_base + offset);  in j721e_pcie_user_writel()
92 static inline u32 j721e_pcie_intd_readl(struct j721e_pcie *pcie, u32 offset)  in j721e_pcie_intd_readl()  argument
94 	return readl(pcie->intd_cfg_base + offset);  in j721e_pcie_intd_readl()
97 static inline void j721e_pcie_intd_writel(struct j721e_pcie *pcie, u32 offset,  in j721e_pcie_intd_writel()  argument
100 	writel(value, pcie->intd_cfg_base + offset);  in j721e_pcie_intd_writel()
105 	struct j721e_pcie *pcie = priv;  in j721e_pcie_link_irq_handler()  local
106 	struct device *dev = pcie->cdns_pcie->dev;  in j721e_pcie_link_irq_handler()
109 	reg = j721e_pcie_intd_readl(pcie, STATUS_REG_SYS_2);  in j721e_pcie_link_irq_handler()
110 	if (!(reg & pcie->linkdown_irq_regfield))  in j721e_pcie_link_irq_handler()
115 	j721e_pcie_intd_writel(pcie, STATUS_CLR_REG_SYS_2, pcie->linkdown_irq_regfield);  in j721e_pcie_link_irq_handler()
119 static void j721e_pcie_config_link_irq(struct j721e_pcie *pcie)  in j721e_pcie_config_link_irq()  argument
123 	reg = j721e_pcie_intd_readl(pcie, ENABLE_REG_SYS_2);  in j721e_pcie_config_link_irq()
124 	reg |= pcie->linkdown_irq_regfield;  in j721e_pcie_config_link_irq()
125 	j721e_pcie_intd_writel(pcie, ENABLE_REG_SYS_2, reg);  in j721e_pcie_config_link_irq()
130 	struct j721e_pcie *pcie = dev_get_drvdata(cdns_pcie->dev);  in j721e_pcie_start_link()  local
133 	reg = j721e_pcie_user_readl(pcie, J721E_PCIE_USER_CMD_STATUS);  in j721e_pcie_start_link()
135 	j721e_pcie_user_writel(pcie, J721E_PCIE_USER_CMD_STATUS, reg);  in j721e_pcie_start_link()
137 	return 0;  in j721e_pcie_start_link()
142 	struct j721e_pcie *pcie = dev_get_drvdata(cdns_pcie->dev);  in j721e_pcie_stop_link()  local
145 	reg = j721e_pcie_user_readl(pcie, J721E_PCIE_USER_CMD_STATUS);  in j721e_pcie_stop_link()
147 	j721e_pcie_user_writel(pcie, J721E_PCIE_USER_CMD_STATUS, reg);  in j721e_pcie_stop_link()
152 	struct j721e_pcie *pcie = dev_get_drvdata(cdns_pcie->dev);  in j721e_pcie_link_up()  local
155 	reg = j721e_pcie_user_readl(pcie, J721E_PCIE_USER_LINKSTATUS);  in j721e_pcie_link_up()
169 static int j721e_pcie_set_mode(struct j721e_pcie *pcie, struct regmap *syscon,  in j721e_pcie_set_mode()  argument
172 	struct device *dev = pcie->cdns_pcie->dev;  in j721e_pcie_set_mode()
174 	u32 mode = pcie->mode;  in j721e_pcie_set_mode()
175 	u32 val = 0;  in j721e_pcie_set_mode()
176 	int ret = 0;  in j721e_pcie_set_mode()
183 		dev_err(dev, "failed to set pcie mode\n");  in j721e_pcie_set_mode()
188 static int j721e_pcie_set_link_speed(struct j721e_pcie *pcie,  in j721e_pcie_set_link_speed()  argument
191 	struct device *dev = pcie->cdns_pcie->dev;  in j721e_pcie_set_link_speed()
192 	struct device_node *np = dev->of_node;  in j721e_pcie_set_link_speed()
194 	u32 val = 0;  in j721e_pcie_set_link_speed()
201 	val = link_speed - 1;  in j721e_pcie_set_link_speed()
209 static int j721e_pcie_set_lane_count(struct j721e_pcie *pcie,  in j721e_pcie_set_lane_count()  argument
212 	struct device *dev = pcie->cdns_pcie->dev;  in j721e_pcie_set_lane_count()
213 	u32 lanes = pcie->num_lanes;  in j721e_pcie_set_lane_count()
215 	u32 val = 0;  in j721e_pcie_set_lane_count()
218 	if (pcie->max_lanes == 4)  in j721e_pcie_set_lane_count()
221 	val = LANE_COUNT(lanes - 1);  in j721e_pcie_set_lane_count()
229 static int j721e_enable_acspcie_refclk(struct j721e_pcie *pcie,  in j721e_enable_acspcie_refclk()  argument
232 	struct device *dev = pcie->cdns_pcie->dev;  in j721e_enable_acspcie_refclk()
233 	struct device_node *node = dev->of_node;  in j721e_enable_acspcie_refclk()
240 					       "ti,syscon-acspcie-proxy-ctrl",  in j721e_enable_acspcie_refclk()
241 					       1, 0, &args);  in j721e_enable_acspcie_refclk()
244 			"ti,syscon-acspcie-proxy-ctrl has invalid arguments\n");  in j721e_enable_acspcie_refclk()
249 	val = ~(args.args[0]);  in j721e_enable_acspcie_refclk()
250 	ret = regmap_update_bits(syscon, 0, mask, val);  in j721e_enable_acspcie_refclk()
256 	return 0;  in j721e_enable_acspcie_refclk()
259 static int j721e_pcie_ctrl_init(struct j721e_pcie *pcie)  in j721e_pcie_ctrl_init()  argument
261 	struct device *dev = pcie->cdns_pcie->dev;  in j721e_pcie_ctrl_init()
262 	struct device_node *node = dev->of_node;  in j721e_pcie_ctrl_init()
264 	unsigned int offset = 0;  in j721e_pcie_ctrl_init()
268 	syscon = syscon_regmap_lookup_by_phandle(node, "ti,syscon-pcie-ctrl");  in j721e_pcie_ctrl_init()
270 		dev_err(dev, "Unable to get ti,syscon-pcie-ctrl regmap\n");  in j721e_pcie_ctrl_init()
275 	ret = of_parse_phandle_with_fixed_args(node, "ti,syscon-pcie-ctrl", 1,  in j721e_pcie_ctrl_init()
276 					       0, &args);  in j721e_pcie_ctrl_init()
278 		offset = args.args[0];  in j721e_pcie_ctrl_init()
280 	ret = j721e_pcie_set_mode(pcie, syscon, offset);  in j721e_pcie_ctrl_init()
281 	if (ret < 0) {  in j721e_pcie_ctrl_init()
286 	ret = j721e_pcie_set_link_speed(pcie, syscon, offset);  in j721e_pcie_ctrl_init()
287 	if (ret < 0) {  in j721e_pcie_ctrl_init()
292 	ret = j721e_pcie_set_lane_count(pcie, syscon, offset);  in j721e_pcie_ctrl_init()
293 	if (ret < 0) {  in j721e_pcie_ctrl_init()
294 		dev_err(dev, "Failed to set num-lanes\n");  in j721e_pcie_ctrl_init()
300 						"ti,syscon-acspcie-proxy-ctrl");  in j721e_pcie_ctrl_init()
302 		return 0;  in j721e_pcie_ctrl_init()
304 	return j721e_enable_acspcie_refclk(pcie, syscon);  in j721e_pcie_ctrl_init()
399 		.compatible = "ti,j721e-pcie-host",
403 		.compatible = "ti,j721e-pcie-ep",
407 		.compatible = "ti,j7200-pcie-host",
411 		.compatible = "ti,j7200-pcie-ep",
415 		.compatible = "ti,am64-pcie-host",
419 		.compatible = "ti,am64-pcie-ep",
423 		.compatible = "ti,j784s4-pcie-host",
427 		.compatible = "ti,j784s4-pcie-ep",
431 		.compatible = "ti,j722s-pcie-host",
439 	struct device *dev = &pdev->dev;  in j721e_pcie_probe()
440 	struct device_node *node = dev->of_node;  in j721e_pcie_probe()
444 	struct j721e_pcie *pcie;  in j721e_pcie_probe()  local
457 		return -EINVAL;  in j721e_pcie_probe()
459 	mode = (u32)data->mode;  in j721e_pcie_probe()
461 	pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);  in j721e_pcie_probe()
462 	if (!pcie)  in j721e_pcie_probe()
463 		return -ENOMEM;  in j721e_pcie_probe()
468 			return -ENODEV;  in j721e_pcie_probe()
472 			return -ENOMEM;  in j721e_pcie_probe()
474 		if (!data->byte_access_allowed)  in j721e_pcie_probe()
475 			bridge->ops = &cdns_ti_pcie_host_ops;  in j721e_pcie_probe()
477 		rc->quirk_retrain_flag = data->quirk_retrain_flag;  in j721e_pcie_probe()
478 		rc->quirk_detect_quiet_flag = data->quirk_detect_quiet_flag;  in j721e_pcie_probe()
480 		cdns_pcie = &rc->pcie;  in j721e_pcie_probe()
481 		cdns_pcie->dev = dev;  in j721e_pcie_probe()
482 		cdns_pcie->ops = &j721e_pcie_ops;  in j721e_pcie_probe()
483 		pcie->cdns_pcie = cdns_pcie;  in j721e_pcie_probe()
487 			return -ENODEV;  in j721e_pcie_probe()
491 			return -ENOMEM;  in j721e_pcie_probe()
493 		ep->quirk_detect_quiet_flag = data->quirk_detect_quiet_flag;  in j721e_pcie_probe()
494 		ep->quirk_disable_flr = data->quirk_disable_flr;  in j721e_pcie_probe()
496 		cdns_pcie = &ep->pcie;  in j721e_pcie_probe()
497 		cdns_pcie->dev = dev;  in j721e_pcie_probe()
498 		cdns_pcie->ops = &j721e_pcie_ops;  in j721e_pcie_probe()
499 		pcie->cdns_pcie = cdns_pcie;  in j721e_pcie_probe()
503 		return 0;  in j721e_pcie_probe()
506 	pcie->mode = mode;  in j721e_pcie_probe()
507 	pcie->linkdown_irq_regfield = data->linkdown_irq_regfield;  in j721e_pcie_probe()
512 	pcie->intd_cfg_base = base;  in j721e_pcie_probe()
517 	pcie->user_cfg_base = base;  in j721e_pcie_probe()
519 	ret = of_property_read_u32(node, "num-lanes", &num_lanes);  in j721e_pcie_probe()
520 	if (ret || num_lanes > data->max_lanes) {  in j721e_pcie_probe()
521 		dev_warn(dev, "num-lanes property not provided or invalid, setting num-lanes to 1\n");  in j721e_pcie_probe()
525 	pcie->num_lanes = num_lanes;  in j721e_pcie_probe()
526 	pcie->max_lanes = data->max_lanes;  in j721e_pcie_probe()
529 		return -EINVAL;  in j721e_pcie_probe()
532 	if (irq < 0)  in j721e_pcie_probe()
535 	dev_set_drvdata(dev, pcie);  in j721e_pcie_probe()
538 	if (ret < 0) {  in j721e_pcie_probe()
543 	ret = j721e_pcie_ctrl_init(pcie);  in j721e_pcie_probe()
544 	if (ret < 0) {  in j721e_pcie_probe()
549 	ret = devm_request_irq(dev, irq, j721e_pcie_link_irq_handler, 0,  in j721e_pcie_probe()
550 			       "j721e-pcie-link-down-irq", pcie);  in j721e_pcie_probe()
551 	if (ret < 0) {  in j721e_pcie_probe()
556 	j721e_pcie_config_link_irq(pcie);  in j721e_pcie_probe()
565 		pcie->reset_gpio = gpiod;  in j721e_pcie_probe()
584 		pcie->refclk = clk;  in j721e_pcie_probe()
599 		if (ret < 0) {  in j721e_pcie_probe()
600 			clk_disable_unprepare(pcie->refclk);  in j721e_pcie_probe()
613 		if (ret < 0)  in j721e_pcie_probe()
619 	return 0;  in j721e_pcie_probe()
633 	struct j721e_pcie *pcie = platform_get_drvdata(pdev);  in j721e_pcie_remove()  local
634 	struct cdns_pcie *cdns_pcie = pcie->cdns_pcie;  in j721e_pcie_remove()
635 	struct device *dev = &pdev->dev;  in j721e_pcie_remove()
637 	clk_disable_unprepare(pcie->refclk);  in j721e_pcie_remove()
645 	struct j721e_pcie *pcie = dev_get_drvdata(dev);  in j721e_pcie_suspend_noirq()  local
647 	if (pcie->mode == PCI_MODE_RC) {  in j721e_pcie_suspend_noirq()
648 		gpiod_set_value_cansleep(pcie->reset_gpio, 0);  in j721e_pcie_suspend_noirq()
649 		clk_disable_unprepare(pcie->refclk);  in j721e_pcie_suspend_noirq()
652 	cdns_pcie_disable_phy(pcie->cdns_pcie);  in j721e_pcie_suspend_noirq()
654 	return 0;  in j721e_pcie_suspend_noirq()
659 	struct j721e_pcie *pcie = dev_get_drvdata(dev);  in j721e_pcie_resume_noirq()  local
660 	struct cdns_pcie *cdns_pcie = pcie->cdns_pcie;  in j721e_pcie_resume_noirq()
663 	ret = j721e_pcie_ctrl_init(pcie);  in j721e_pcie_resume_noirq()
664 	if (ret < 0)  in j721e_pcie_resume_noirq()
667 	j721e_pcie_config_link_irq(pcie);  in j721e_pcie_resume_noirq()
673 	ret = cdns_pcie_enable_phy(pcie->cdns_pcie);  in j721e_pcie_resume_noirq()
674 	if (ret < 0)  in j721e_pcie_resume_noirq()
677 	if (pcie->mode == PCI_MODE_RC) {  in j721e_pcie_resume_noirq()
680 		ret = clk_prepare_enable(pcie->refclk);  in j721e_pcie_resume_noirq()
681 		if (ret < 0)  in j721e_pcie_resume_noirq()
691 		if (pcie->reset_gpio) {  in j721e_pcie_resume_noirq()
693 			gpiod_set_value_cansleep(pcie->reset_gpio, 1);  in j721e_pcie_resume_noirq()
697 		if (ret < 0) {  in j721e_pcie_resume_noirq()
698 			clk_disable_unprepare(pcie->refclk);  in j721e_pcie_resume_noirq()
707 			rc->avail_ib_bar[bar] = true;  in j721e_pcie_resume_noirq()
711 			clk_disable_unprepare(pcie->refclk);  in j721e_pcie_resume_noirq()
716 	return 0;  in j721e_pcie_resume_noirq()
727 		.name	= "j721e-pcie",