1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/nvmem-provider.h>
45 #define OTPC_CMD_MASK  (BIT(OTPC_COMMAND_COMMAND_WIDTH) - 1)
46 #define OTPC_ADDR_MASK (BIT(OTPC_CPUADDR_REG_OTPC_CPU_ADDRESS_WIDTH) - 1)
52 	/* 128 bit row / 4 words support. */
54 	/* 128 bit row / 4 words support. */
114 		return -EAGAIN;  in poll_cpu_status()
157 	u32 address = offset / priv->config->word_size;  in bcm_otpc_read()
161 		set_command(priv->base, OTPC_CMD_READ);  in bcm_otpc_read()
162 		set_cpu_address(priv->base, address++);  in bcm_otpc_read()
163 		set_start_bit(priv->base);  in bcm_otpc_read()
164 		ret = poll_cpu_status(priv->base, OTPC_STAT_CMD_DONE);  in bcm_otpc_read()
166 			dev_err(priv->dev, "otp read error: 0x%x", ret);  in bcm_otpc_read()
167 			return -EIO;  in bcm_otpc_read()
170 		for (i = 0; i < priv->map->otpc_row_size; i++) {  in bcm_otpc_read()
171 			*buf++ = readl(priv->base +  in bcm_otpc_read()
172 					priv->map->data_r_offset[i]);  in bcm_otpc_read()
176 		reset_start_bit(priv->base);  in bcm_otpc_read()
188 	u32 address = offset / priv->config->word_size;  in bcm_otpc_write()
191 	if (offset % priv->config->word_size)  in bcm_otpc_write()
192 		return -EINVAL;  in bcm_otpc_write()
194 	ret = enable_ocotp_program(priv->base);  in bcm_otpc_write()
196 		return -EIO;  in bcm_otpc_write()
199 		set_command(priv->base, OTPC_CMD_PROGRAM);  in bcm_otpc_write()
200 		set_cpu_address(priv->base, address++);  in bcm_otpc_write()
201 		for (i = 0; i < priv->map->otpc_row_size; i++) {  in bcm_otpc_write()
202 			writel(*buf, priv->base + priv->map->data_w_offset[i]);  in bcm_otpc_write()
206 		set_start_bit(priv->base);  in bcm_otpc_write()
207 		ret = poll_cpu_status(priv->base, OTPC_STAT_CMD_DONE);  in bcm_otpc_write()
208 		reset_start_bit(priv->base);  in bcm_otpc_write()
210 			dev_err(priv->dev, "otp write error: 0x%x", ret);  in bcm_otpc_write()
211 			return -EIO;  in bcm_otpc_write()
215 	disable_ocotp_program(priv->base);  in bcm_otpc_write()
221 	.name = "bcm-ocotp",
224 	.stride = 4,
231 	{ .compatible = "brcm,ocotp-v2", .data = &otp_map_v2 },
245 	struct device *dev = &pdev->dev;  in bcm_otpc_probe()
253 		return -ENOMEM;  in bcm_otpc_probe()
255 	priv->map = device_get_match_data(dev);  in bcm_otpc_probe()
256 	if (!priv->map)  in bcm_otpc_probe()
257 		return -ENODEV;  in bcm_otpc_probe()
260 	priv->base = devm_platform_ioremap_resource(pdev, 0);  in bcm_otpc_probe()
261 	if (IS_ERR(priv->base)) {  in bcm_otpc_probe()
263 		return PTR_ERR(priv->base);  in bcm_otpc_probe()
267 	writel(readl(priv->base + OTPC_MODE_REG_OFFSET) |  in bcm_otpc_probe()
269 		priv->base + OTPC_MODE_REG_OFFSET);  in bcm_otpc_probe()
270 	reset_start_bit(priv->base);  in bcm_otpc_probe()
273 	err = device_property_read_u32(dev, "brcm,ocotp-size", &num_words);  in bcm_otpc_probe()
276 		return -EINVAL;  in bcm_otpc_probe()
279 		return -EINVAL;  in bcm_otpc_probe()
286 	if (priv->map == &otp_map_v2) {  in bcm_otpc_probe()
288 		bcm_otpc_nvmem_config.stride = 8;  in bcm_otpc_probe()
291 	priv->config = &bcm_otpc_nvmem_config;  in bcm_otpc_probe()
305 		.name	= "brcm-otpc",