Lines Matching +full:gemini +full:- +full:pci
1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
25 Host Software Reset - 32bit RW
26 ------------------------------------------
28 0 SOFT_RESET Soft Reset - When this bit is set,
31 clocks except the CardBus/PCI interface clock.
35 (not self-clearing), the Wlan hardware
48 Host Interrupt Mask Register - 32bit (RW)
49 ------------------------------------------
52 0 - RX0 - Rx first dubble buffer Data Interrupt
53 1 - TXD - Tx Data Interrupt
54 2 - TXXFR - Tx Transfer Interrupt
55 3 - RX1 - Rx second dubble buffer Data Interrupt
56 4 - RXXFR - Rx Transfer Interrupt
57 5 - EVENT_A - Event Mailbox interrupt
58 6 - EVENT_B - Event Mailbox interrupt
59 7 - WNONHST - Wake On Host Interrupt
60 8 - TRACE_A - Debug Trace interrupt
61 9 - TRACE_B - Debug Trace interrupt
62 10 - CDCMP - Command Complete Interrupt
63 11 -
64 12 -
65 13 -
66 14 - ICOMP - Initialization Complete Interrupt
67 16 - SG SE - Soft Gemini - Sense enable interrupt
68 17 - SG SD - Soft Gemini - Sense disable interrupt
69 18 - -
70 19 - -
71 20 - -
72 21- -
79 ------------------------------------------
89 ------------------------------------------
100 ------------------------------------------
111 ------------------------------------------
122 ------------------------------------------
127 assotiated interrupt inactive. (0-no effect)
139 Halt eCPU - 32bit RW
140 ------------------------------------------
141 0 HALT_ECPU Halt Embedded CPU - This bit is the
148 zero-wait-state SSRAM.
152 --------------------
161 EEPROM Burst Read Start - 32bit RW
162 ------------------------------------------
164 0 ACX_EE_START - EEPROM Burst Read Start 0
243 Command Mailbox Pointer - 32bit RW
244 ------------------------------------------
258 Information Mailbox Pointer - 32bit RW
259 ------------------------------------------
274 ------------------------------------------
275 1 EE_READ - EEPROM Read Request 1 - Setting this bit
282 0 EE_WRITE - EEPROM Write Request - Setting this bit
292 EEPROM Address - 32bit RW
293 ------------------------------------------
300 EEPROM Data - 32bit RW
301 ------------------------------------------
309 EEPROM Base Address - 32bit RW
310 ------------------------------------------
312 [23:15] of the 24-bit Wlan hardware memory
320 GPIO Output Values -32bit, RW
321 ------------------------------------------
330 Contention window -32bit, RW
331 ------------------------------------------
335 [06:00] Current contention window value - default is 0x1F
383 Transmit-Descriptor RATE-SET field definitions...
385 Define a new "Rate-Set" for TX path that incorporates the
386 Rate & Modulation info into a single 16-bit field.
389 b15 - Indicates Preamble type (1=SHORT, 0=LONG).
392 Does not apply (set to 0) for RevG-OFDM rates.
393 b14 - Indicates PBCC encoding (1=PBCC, 0=not).
396 Does not apply (set to 0) for RevG-OFDM rates.
397 b13 - Unused (set to 0).
398 b12-b0 - Supported Rate indicator bits as defined below.
429 /* Bit[0] - 0-TCXO, 1-FREF */
431 /* Bit[3:2] - 01-TCXO, 10-FREF */
434 /* Bit[4] - 0-TCXO, 1-FREF */
449 /* Bit[6:5:3] - mask wl write SYS_CLK_CFG[8:5:2:4] */
497 ------------------------------------------